Table of Contents

• FeRAM Recovery up to 200 Periods with Accumulated Endurance 1012 Cycles and an Applicable Array Circuit toward Unlimited eNVM OperationsK.-Y. Hsiang, J. Y. Lee, F. S. Chang, Z.-F. Lou, Z. X. Li, Z.-H. Li, J. H. Chen, C. W. Liu, T.-H. Hou, M. H. Lee. 1-2 [doi]
• Integration of a Stacked Contact MOL for Monolithic CFETVictor Vega-Gonzalez, D. Radisic, Bt Chan, S. Choudhury, S. Wang, A. Mingardi, Q. Toan Le, H. Decoster, Y. Oniki, P. Puttarame, Kevin Vandersmissen, J. P. Soulie, A. Peter, A. Sepulveda, D. Batuk, G. T. Martinez, Olivier Richard, Jürgen Bömmels, S. Biesemans, E. Dentoni Litta, Naoto Horiguchi, S. Park, Zsolt Tokei. 1-2 [doi]
• 218Kauth/s, 3nJ/auth SCA/ML-Resistant Privacy-Preserving Mutual Authentication Accelerator with a Crypto-Double-Coupled PUF in 4nm class CMOSSachin Taneja, Vikram B. Suresh, Raghavan Kumar, Vivek De, Sanu Mathew. 1-2 [doi]
• Aggressively Scaled Atomic Layer Deposited Amorphous InZnOx Thin Film Transistor Exhibiting Prominent Short Channel Characteristics (SS= 69 mV/dec.; DIBL = 27.8 mV/V) and High Gm(802 μS/μm at VDS = 2V)Yan-Kui Liang, June-Yang Zheng, Yu-Lon Lin, Wei-Li Li, Yu-Cheng Lu, Dong-Ru Hsieh, Li-Chi Peng, Tsung-Te Chou, Chi-Chung Kei, Chun Chieh Lu, Huai-Ying Huang, Yuan-Chieh Tseng, Tien-Sheng Chao, Edward Yi Chang, Chun-Hsiung Lin. 1-2 [doi]
• First Stacked Nanosheet FeFET Featuring Memory Window of 1.8V at Record Low Write Voltage of 2V and Endurance >1E11 CyclesYu-Rui Chen, Yi-Chun Liu, Zefu Zhao, Wan-Hsuan Hsieh, Jia-Yang Lee, Chien-Te Tu, Bo-Wei Huang, Jer-Fu Wang, Shee-Jier Chueh, Yifan Xing, Guan-Hua Chen, Hung-Chun Chou, Dong Soo Woo, M. H. Lee, C. W. Liu. 1-2 [doi]
• Pianissimo: A Sub-mW Class DNN Accelerator with Progressive Bit-by-Bit Datapath Architecture for Adaptive Inference at EdgeJunnosuke Suzuki, Jaehoon Yu, Mari Yasunaga, Ángel López García-Arias, Yasuyuki Okoshi, Shungo Kumazawa, Kota Ando, Kazushi Kawamura, Thiem Van Chu, Masato Motomura. 1-2 [doi]
• High Bit Cost Scalability and Reliable Cell Characteristics for 7th Generation 1Tb 4Bit/Cell 3D-NAND FlashKyungmoon Kim, Yujeong Seo, Sejun Park, Woojae Jang, Dongho Yoo, Joonsung Lim, Il Han Park, Jaeduk Lee, Kyungyoon Noh, Sujin Ahn, Sunghoi Hur. 1-2 [doi]
• A 1.9GHz 0.57V Vmin 576Kb embedded product-ready L2 cache in 5nm FinFET technologyN. Jungmann, R. Joshi, E. Kachir, K. Shimanovich, B. He, T. Cohen, T. Miller, D. Leu, Dinesh Kannambadi, I. Wagner, Kenneth Reyer, H. Konen, M. Suleiman, V. Sindhe, Y. Freiman. 1-2 [doi]
• Highly Reliable/Manufacturable 4nm FinFET Platform Technology (SF4X) for HPC Application with Dual-CPP/HP-HD Standard CellsKihwang Son, Seulki Park, Kyunghoon Jung, Jun-Gyu Kim, Younggun Ko, Keonyong Cheon, Changkeun Yoon, Jiho Kim, Jaehun Jeong, Taehun Myung, Changmin Hong, Weonwi Jang, Min-Chul Sun, Sungil Jo, Ju-Youn Kim, Byungmoo Song, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong. 1-2 [doi]
• A Wireless, Mechanically Flexible, 25μm-Thick, 65, 536-Channel Subdural Surface Recording and Stimulating Microelectrode Array with Integrated AntennasNanyu Zeng, Taesung Jung, Mohit Sharma, Guy Eichler, Jason D. Fabbri, R. James Cotton, Eleonora Spinazzi, Brett Youngerman, Luca P. Carloni, Kenneth L. Shepard. 1-2 [doi]
• Thickness-Engineered Extremely-thin Channel High Performance ITO TFTs with Raised S/D Architecture: Record-Low RSD, Highest Moblity (Sub-4 nm TCH Regime), and High VTH TunabilityYuye Kang, Kaizhen Han, Yue Chen, Xiao Gong. 1-2 [doi]
• A Wireless Neural Stimulator IC for Cortical Visual ProsthesisJungho Lee, Joseph G. Letner, Jongyup Lim, Yi Sun, Seokhyeon Jeong, Yejoong Kim, Beomseo Koo, Gabriele Atzeni, Jiawei Liao, Julianna M. Richie, Elena Della Valle, Paras R. Patel, Taekwang Jang, Cynthia A. Chestek, Jamie Phillips, James D. Weiland, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw. 1-2 [doi]
• A 4.8mW, 800Mbps Hybrid Crypto SoC for Post-Quantum Secure Neural InterfacingLiang-Hsin Lin, Zih-Sing Fu, Po-Shao Chen, Bo-Yin Yang, Chia-Hsiang Yang. 1-2 [doi]
• World's First GAA 3nm Foundry platform Technology (SF3) with Novel Multi-Bridge-Channel-FET (MBCFET™) ProcessJaehun Jeong, Sanghyeon Lee, Sada-Aki Masuoka, Shincheol Min, Sanghoon Lee, Seungkwon Kim, Taehun Myung, Byungha Choi, Chang-Woo Sohn, Sung Won Kim, Jeongmin Choi, Jungmin Park, Hyungjong Lee, Taeyoung Kim, Seokhoon Kim, Yuri Yasuda-Masuoka, Ja-Hum Ku, Gitae Jeong. 1-2 [doi]
• ECC-Less Multi-Level SRAM Physically Unclonable Function and 127% PUF-to-Memory Capacity Ratio with No Bitcell Modification in 28nmJoydeep Basu, Sachin Taneja, Viveka Konandur Rajanna, Tianqi Wang, Massimo Alioto. 1-2 [doi]
• Molybdenum Nitride as a Scalable and Thermally Stable pWFM for CFETHiroaki Arimura, S. Brus, Jacopo Franco, Y. Oniki, A. Vandooren, T. Conard, B. T. Chan, B. Kannan, M. Samiee, W. Li, P. Deminskyi, E. Shero, J. Bakke, N. Jourdan, G. Alessio Verni, J. W. Maes, M. Givens, Lars-Åke Ragnarsson, Jérôme Mitard, E. Dentoni Litta, N. Horiguchi. 1-2 [doi]
• Towards DTCO in High Temperature GaN-on-Si Technology: Arithmetic Logic Unit at 300 °C and CAD Framework up to 500 °CQingyun Xie, Mengyang Yuan, John Niroula, Bejoy Sikder, Shisong Luo, Kai Fu, Nitul S. Rajput, Ayan Biswas Pranta, Pradyot Yadav, Yuji Zhao, Nadim Chowdhury, Tomás Palacios. 1-2 [doi]
• Front-side and Back-side Power Delivery Network Guidelines for 2nm node High Perf Computing and Mobile SoC applicationsJ. Lee, J. Jeong, S. Lee, S. Lee, J. Lim, S. C. Song, S. Ekbote, N. Stevens-Yu, D. Greenlaw, R.-H. Baek. 1-2 [doi]
• A 28 nm 66.8 TOPS/W Sparsity-Aware Dynamic-Precision Deep-Learning ProcessorHan-Gyeol Mun, Hyunwoo Son, SeungHyun Moon, Jaehyun Park, Byungjun Kim, Jae-Yoon Sim. 1-2 [doi]
• Building high performance transistors on carbon nanotube channelGregory Pitner, Nathaniel Safron, Tzu-Ang Chao, Shengman Li, Sheng-Kai Su, Gilad Zeevi, Qing Lin, Hsin-Yuan Chiu, Matthias Passlack, Zichen Zhang, D. Mahaveer Sathaiya, Aslan Wei, Carlo Gilardi, Edward Chen, San Lin Liew, Vincent D.-H. Hou, Chung-Wei Wu, Jeff Wu, Zhiwei Lin, Jeffrey Fagan, Ming Zheng, Han Wang, Subhasish Mitra, H.-S. Philip Wong, Iuliana P. Radu. 1-2 [doi]
• A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BWSundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems. 1-2 [doi]
• nd-order Highpass Δ∑ Capacitance-to-Digital ConverterYoontae Jung, Sein Oh, Jimin Koo, Seunga Park, Ji-Hoon Suh, Donghee Cho, Sohmyung Ha, Minkyu Je. 1-2 [doi]
• PPA and Scaling Potential of Backside Power Options in N2 and A14 Nanosheet TechnologyS. Yang, Pieter Schuddinck, Marie Garcia Bardon, Yang Xiang, Anabela Veloso, B. T. Chan, Gioele Mirabelli, Gaspard Hiblot, Geert Hellings, Julien Ryckaert. 1-2 [doi]
• Demonstration of crystalline IGZO transistor with high thermal stability for memory applicationsWhayoung Kim, Jaehyeon Kim, Dongjin Ko, Jun-Hwe Cha, Gyeongcheol Park, Youngbae Ahn, Jong-Young Lee, Minchul Sung, Hyejung Choi, Seung Wook Ryu, Seiyon Kim, Myung Hee Na, Seonyong Cha. 1-2 [doi]
• 2 Contact Resistivity in Nonplanar FETsN. Breil, B.-C. Lee, J. Avila Avendano, J. Jewell, M. Vellaikal, E. Newman, E. M. Bazizi, A. Pal, L. Liu, Oleg Gluschenkov, A. Greene, S. Mochizuki, N. Loubet, B. Colombeau, B. Haran. 1-2 [doi]
• 2 AIB 2.0 Interface to Provide Versatile Workload AccelerationWei Tang 0010, Sung-gun Cho, Tim Tri Hoang, Jacob Botimer, Wei Qiang Zhu, Ching-Chi Chang, Cheng-Hsun Lu, Junkang Zhu, Yaoyu Tao, Tianyu Wei, Naomi Kavi Motwani, Mani Yalamanchi, Ramya Yarlagadda, Sirisha Kale, Mark Flannigan, Allen Chan, Thungoc Tran, Sergey Y. Shumarayev, Zhengya Zhang. 1-2 [doi]
• 3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM with 0.5V-1.4V Wide Voltage Range Operation in 3nm FinFET for HPC ApplicationsYoshiaki Osada, Takaaki Nakazato, Koji Nii, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li, Hidehiro Fujiwara, Hung-Jen Liao, Tsung-Yung Jonathan Chang. 1-2 [doi]
• 2 bit density with 3.2Gbps interface and 205MB/s program throughputMario Sako, T. Nakajima, Fumihiro Kono, T. Nakano, Masaki Fujiu, Junji Musha, Dai Nakamura, Naoaki Kanagawa, Y. Shimizu, Kosuke Yanagidaira, Tetsuaki Utsumi, T. Kawano, Yoshikazu Hosomura, Hiroki Yabe, M. Kano, Hiroshi Sugawara, A. H. Sravan, K. Hayashi, Toshiyuki Kouchi, Y. Watanabe. 1-2 [doi]
• An Indirect Time-of-Flight CMOS Image Sensor Achieving Sub-ms Motion Lagging and 60fps Depth Image from On-chip ISPJiheon Park, Daeyun Kim, Hoyong Lee, Seung-chul Shin, Myoungoh Ki, Bumsik Chung, Myunghan Bae, Myeonggyun Kye, Jonghan Ahn, Inho Song, Sunhwa Lee, Jaeil An, Il-Pyeong Hwang, Taemin An, Young-Gu Jin, Youngchan Kim, Youngsun Oh, Juhyun Ko, Haechang Lee, JoonSeo Yim. 1-2 [doi]
• Towards low damage and fab-compatible top-contacts in MX2 transistors using a combined synchronous pulse atomic layer etch and wet-chemical etch approachS. Kundu, D. H. van Doip, Tom Schram, Quentin Smets, S. Banerjee, Benjamin Groven, Daire Cott, S. Decoster, P. Bezard, F. Lazzarino, K. Banerjee, S. Ghosh, J. F. de Mamelfe, Pierre Morin, Cesar J. Lockhart de la Rosa, Inge Asselberghs, Gouri Sankar Kar. 1-2 [doi]
• NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile DevicesWooyoung Jo, Sangjin Kim, Juhyoung Lee, Donghyeon Han, Sangyeob Kim, SeungYoon Choi, Hoi-Jun Yoo. 1-2 [doi]
• Bumpless Build Cube (BBCube) 3D: Heterogeneous 3D Integration Using WoW and CoW to Provide TB/s Bandwidth with Lowest Bit Access EnergyNorio Chujo, Koji Sakui, Shinji Sugatani, Hiroyuki Ryoson, Tomoji Nakamura, Takayuki Ohba. 1-2 [doi]
• A CMOS/Microfluidics Point-of-Care SoC employing Square-Wave Voltcoulometry for Biosensing with Aptamers and CRISPR-Cas12a EnzymesYan-Ting Hsiao, Shu-Yan Chuang, Hung-Yu Hou, Yun-Chun Su, Hsiu-Cheng Yeh, Hsin-Tzu Song, Yun-Jui Chang, Wei-Yang Weng, Ya-Chen Tsai, Pin-Yu Lin, Sih-Ying Chen, Yen-Ju Lin, Mei-Wei Lin, Jun-Chau Chien. 1-2 [doi]
• Upcoming Challenges of ESD Reliability in DTCO with BS-PDN Routing via BPRsW. C. Chen, S. H. Chen, Anabela Veloso, Kateryna Serbulova, Geert Hellings, Guido Groeseneken. 1-2 [doi]
• BEOL Interconnect Innovation: Materials, Process and Systems Co-optimization for 3nm Node and BeyondGaurav Thareja, Ashish Pal, Xingye Wang, Sefa Dag, Shi You, Shashank Sharma, Qing Zhu, Carmen L. Cervantes, Shinjae Hwang, Matthew Spuller, Ben Ng, Pradeep S. Kumar, Norman Tam, Max Gage, Sameer Deshpande, Zhiyuan Wu, Alexander Jansen, Liton Dey, Feng Chen, Xianjin Xie, Keyvan Kashefizadeh, Vinod Reddy, Andy Lo, Zhebo Chen, Sidney Huey, Jianshe Tang, He Ren, Mehul Naik, Brian Brown, Sree Kesapragada, Buvna Ayyagari-Sangamalli, El Mehdi Bazizi, Xianmin Tang. 1-2 [doi]
• Long-time-constant leaky-integrating oxygen-vacancy drift-diffusion FET for human-interactive spiking reservoir computingHisashi Inoue, Hiroto Tamura, Ai Kitoh, Xiangyu Chen, Zolboo Byambadorj, Takeaki Yajima, Yasushi Hotta, Tetsuya Iizuka, Gouhei Tanaka, Isao H. Inoue. 1-2 [doi]
• Wireless Body-Area Network Transceiver ICs with Concurrent Body-Coupled Powering and Communication using Single ElectrodeJiamin Li, Yilong Dong, Longyang Lin, Joanne Si Ying Tan, Fong Jia Yi, Jerald Yoo. 1-2 [doi]
• First Demonstration of Work Function-Engineered BEOL-Compatible IGZO Non-Volatile MFMIS AFeFETs and Their Co-Integration with Volatile-AFeFETsZijie Zheng, Leming Jiao, Zuopu Zhou, Yuxuan Wang, Long Liu, Kaizhen Han, Chen Sun, Qiwen Kong, Dong Zhang, Xiaolin Wang, Kai Ni, Xiao Gong. 1-2 [doi]
• QLC Programmable 3D Ferroelectric NAND Flash Memory by Memory Window Expansion using Cell Stack EngineeringSunghyun Yoon, Sung-In Hong, Daehyun Kim, Garam Choi, Young-Mo Kim, Kyunghoon Min, Seiyon Kim, Myung Hee Na, Seonyong Cha. 1-2 [doi]
• A 320 x 320 1/5" BSI-CMOS stacked event sensor for low-power vision applicationsGuillaume Schon, Denis Bourke, Pierre-Antoine Doisneau, Thomas Finateu, Adrien Gonzalez, Naoyuki Hanajima, Tahar Hitana, Lucas Janse Van Vuuren, Moataz Kadry, Charles Laurent, Florian Le Goff, Daniel Matolin, Adel Mezaour, Benoît Michel, Thulaxan Naguleswaran, Tjaart Opperman, Patrice Perrin, Etienne Reynaud, Farzaneh Shahrokhi, Hiba Tahachouite, Chen Tianfan, Gerd Van den Branden, Akli Ziram, Jean-Luc Jaffard, Christoph Posch. 1-2 [doi]
• A 169mW Fully-Integrated Ultrasound Imaging Processor Supporting Advanced Modes for Hand-Held DevicesYi-Lin Lo, Yu-Chen Lo, Chia-Hsiang Yang. 1-2 [doi]
• A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off ComputingKenta Suzuki, Keizo Hiraga, Kazuhiro Bessho, Kimiyoshi Usami, Taku Umebayashi. 1-2 [doi]
• The chalcogenide-based memory technology continues: beyond 20nm 4-deck 256Gb cross-point memoryJaeyun Yi, Myoungsub Kim, Jungwon Seo, Namkyun Park, Seungyun Lee, Jongil Kim, Gapsok Do, Hongjin Jang, Hyochol Koo, Sunglae Cho, Sujin Chae, Taehoon Kim, Myung Hee Na, Seonyong Cha. 1-2 [doi]
• A 3-320 fJ/conv.step Continuous Time Level Crossing ADC with Dynamic Self-Biasing Comparators Achieving 61.4 dB-SNDRMartijn Timmermans, Marco Fattori, Pieter Harpe, Yao-Hong Liu, Eugenio Cantatore. 1-2 [doi]
• An 8.7 mW/TX, 21 mW/RX 6-to-9GHz IEEE 802.15.4a/4z Compliant IR-UWB Transceiver with Pulse Pre-Emphasis achieving 14mm Ranging PrecisionMinyoung Song, Erwin Allebes, Chris Marshall, Anoop Narayan Bhat, Elbert Bechthum, Johan Dijkhuis, Stefano Traferro, Evgenii Tiurin, Peter Vis, Johan H. C. van den Heuvel, Mohieddine El Soussi, Pepijn Boer, Alireza Sheikh, Bernard Meyer, Jiang Liu 0001, Stan van der Ven, Nick Winkel, Martijn Hijdra, Gururaja Kasanadi Ramachandra, Yunus Baykal, Huib Visser, Peng Zhang, Arjan Breeschoten, Yao-Hong Liu, Christian Bachmann. 1-2 [doi]
• Catching the Missing EM Consequence in Soft Breakdown Reliability in Advanced FinFETs: Impacts of Self-heating, On-State TDDB, and Layout DependenceZuoyuan Dong, Zixuan Sun, Xin Yang, Xiaomei Li, Yongkang Xue, Chen Luo, Puyang Cai, Zirui Wang, Shuying Wang, Yewei Zhang, Chaolun Wang, Pengpeng Ren, Zhigang Ji, Xing Wu, Runsheng Wang, Ru Huang. 1-2 [doi]
• A Wireless Sensor-Brain Interface System for Tracking and Guiding Animal Behaviors Through Goal-Directed Closed-loop NeuromodulationYi Zhu, Yuhan Hou, Jack Ji, Aaron Zhou, Andrew G. Richardson, Xilin Liu. 1-2 [doi]
• A 2048-channel, 125μW/ch DAC Controlling a 9, 216-element Optical Phased Array Coherent Solid-State LiDARBenjamin R. Moss, Christopher V. Poulton, Matthew J. Byrd, Peter Russo, Oleg Shatrovoy, David Paquette, Andrew Reardon, Michael R. Watts. 1-2 [doi]
• Cold-FeFET as Embedded Non-Volatile Memory with Unlimited Cycling EnduranceSharadindu Gopal Kirtania, Khandker Akif Aabrar, Asif I. Khan, Shimeng Yu, S. Datta. 1-2 [doi]
• Circuit designs for practical-scale fault-tolerant quantum computingYasunari Suzuki, Yosuke Ueno, Wang Liao, Masamitsu Tanaka, Teruo Tanimoto. 1-2 [doi]
• A Mobile OLED Source-Driver IC featuring Ultra-Compact 3-Stage-Cascaded 10-Bit DAC and 42V/μs-Slew-Rate True-DC-Interpolative Super-OTA BufferSeunghwa Shin, Gyeong-Gu Kang, Gyu-Wan Lim, Hyun-Sik Kim. 1-2 [doi]
• Comprehensive 300 mm process for Silicon spin qubits with modular integrationA. Elsayed, Clement Godfrin, Nard I. Dumoulin Stuyck, M. M. K. Shehata, Stefan Kubicek, S. Massar, Yann Canvel, Julien Jussot, Andriy Hikavyy, Roger Loo, George Simion, Massimo Mongillo, D. Wan, Bogdan Govoreanu, R. Li, Iuliana P. Radu, P. Van Dorpe, Kristiaan De Greve. 1-2 [doi]
• th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip PackageYoungmin Jo, Anil Kavala, Tongsung Kim, Byung-Kwan Chun, Jungjune Park, Taesung Lee, Jungmin Seo, Manjae Yang, Taehyeon Park, Hyunjin Kwon, Cheolhui Lee, Younghoon Son, Junghwan Kwak, Younggyu Lee, Hwan-Seok Ku, Dae-Hoon Na, Changyeon Yu, Jonghoon Park, Jae-Hwan Kim, Hyojin Kwon, Chan Ho Kim, Moon Ki Jung, Chanjin Park, Donghyun Seo, Moosung Kim, Seungjae Lee, Jin-yub Lee, Dongku Kang, Chiweon Yoon, Sunghoi Hur. 1-2 [doi]
• A 16-channel Active-Matrix Mini-LED Driver with an USI-B for EMI noise reductionY. Kwon, Y. Kwak, Y. Choi, K. Kim, S. Kim, W. Jang, J. Park, K. Ryu, S. Yoo, H. W. Lim, J. Y. Lee. 1-2 [doi]
• Record Transconductance in Leff~30 nm Self-Aligned Replacement Gate ETSOI nFETs Using Low EOT Negative Capacitance HfO2-ZrO2 Superlattice Gate StackL. C. Wang, W. Li, N. Shanker, S. S. Cheema, S. L. Hsu, S. Volkman, U. Sikder, C. Garg, J. H. Park, Y.-H. Liao, Y. K. Lin, C. Hu, S. Salahuddin. 1-2 [doi]
• 2 High-Density IntegrationZuopu Zhou, Leming Jiao, Qiwen Kong, Zijie Zheng, Kaizhen Han, Yue Chen, Chen Sun, Bich-Yen Nguyen, Xiao Gong. 1-2 [doi]
• Quantum Dots Array on Ultra-Thin SOI Nanowires with Ferromagnetic Cobalt Barrier Gates for Enhanced Spin Qubit ControlFabio Bersano, Michele Aldeghi, Eloi Collette, Michele Ghini, Franco De Palma, Fabian Oppliger, Pasquale Scarlino, Floris Braakman, Martino Poggio, Heike Riel, Gian Salis, Rolf Allenspach, Adrian M. Ionescu. 1-2 [doi]
• Quantum Computing from Hype to Game ChangerHiroyuki Mizuno. 1-4 [doi]
• A 12-nm 0.62-1.61 mW Ultra-Low Power Digital CIM-based Deep-Learning System for End-to-End Always-on VisionEn-Jui Chang, Cheng-Xin Xue, Chetan Deshpande, Gajanan Jedhe, Jenwei Liang, Chih-Chung Cheng, Hung-Wei Lin, Chia-Da Lee, Sushil Kumar, Kim Soon Jway, Zijie Guo, Ritesh Garg, Allen-CL Lu, Chien-Hung Lin, Meng-Han Hsieh, Tsung-Yao Lin, Chih-Cheng Chen. 1-2 [doi]
• A Six-Word Story on the Future of VLSI: AI-driven, Software-defined, and Uncomfortably ExcitingParthasarathy Ranganathan. 1-4 [doi]
• Enabling High-Speed, High-Resolution Space-based Focal Plane Arrays with Analog In-Memory ComputingT. Patrick Xiao, W. S. Wahby, Christopher H. Bennett, Park Hays, V. Agrawal, Matthew J. Marinella, S. Agarwal. 1-2 [doi]
• Exploring Power Savings of Gate-All-Around Cryogenic TechnologyVictor Moroz, Alexei Svizhenko, Munkang Choi, Plamen Asenov, JaeHyun Lee. 1-2 [doi]
• Characterizing and Reducing the Layout Dependent Effect and Gate Resistance to Enable Multiple-Vt Scaling for a 3nm CMOS TechnologyC. A. Lu, H. P. Lee, H. C. Chen, Y.-C. Lin, Y. H. Chung, S. H. Wang, J. Y. Yeh, V. S. Chang, M. C. Chiang, W. Chang, H. C. Chung, C. F. Cheng, H. H. Hsu, H. H. Liu, William P. N. Chen, C. Y. Lin. 1-2 [doi]
• A Sub-500fJ/bit 3D Direct Bond Silicon Photonic Transceiver in 12nm FinFETPo-Hsuan Chang, Anirban Samanta, Peng Yan, Mingye Fu, Yu Zhang, Mehmet Berkay On, Ankur Kumar, Hyungryul Kang, Il-Min Yi, Dedeepya Annabattuni, David Scott, Robert Patti, Yang-Hang Fan, Yuanming Zhu, S. J. Ben Yoo, Samuel Palermo. 1-2 [doi]
• 2D Materials in the BEOLC. H. Naylor, Kirby Maxey, C. Jezewski, K. P. O'Brien, A. V. Penumatcha, M. S. Kavrik, B. Agrawal, C. V. Littlefield, J. Lux, B. Barley, J. R. Weber, A. Sen Gupta, C. J. Dorow, N. Arefin, S. King, R. Chebiam, J. Plombon, S. B. Clendenning, U. E. Avci, M. Kobrinsky, M. Metz. 1-2 [doi]
• First Observation of Ultra-high Polarization (~ 108 μC/cm²) in Nanometer Scaled High Performance Ferroelectric HZO Capacitors with Mo ElectrodesF. Huang, B. Saini, L. Wan, H. Lu, X. He, S. Qin, W. Tsai, A. Gruverman, Andrew C. Meng, H.-S. Philip Wong, P. C. McIntyre, S. S. Wong. 1-2 [doi]
• A 2.5mW 12MHz-BW 69dB SNDR Passive Bandpass ΔΣ ADC with Highpass Noise-Shaping SAR QuantizersSein Oh, Seunga Park, Yoontae Jung, Jimin Koo, Donghee Cho, Sohmyung Ha, Minkyu Je. 1-2 [doi]
• Nanosheet-based Complementary Field-Effect Transistors (CFETs) at 48nm Gate Pitch, and Middle Dielectric Isolation to enable CFET Inner Spacer Formation and Multi-Vt PatterningHans Mertens, M. Hosseini, Thomas Chiarella, D. Zhou, S. Wang, G. Mannaert, E. Dupuy, D. Radisic, Z. Tao, Y. Oniki, Andriy Hikavyy, R. Rosseel, A. Mingardi, S. Choudhury, P. Puttarame Gowda, F. Sebaai, A. Peter, Kevin Vandersmissen, J. P. Soulie, An De Keersgieter, L. Petersen Barbosa Lima, C. Cavalcante, D. Batuk, G. T. Martinez, J. Geypen, F. Seidel, K. Paulussen, P. Favia, Jürgen Bömmels, Roger Loo, P. Wong, A. Sepulveda Marquez, B. T. Chan, Jérôme Mitard, S. Subramanian, S. Demuynck, E. Dentoni Litta, N. Horiguchi, S. Samavedam, S. Biesemans. 1-2 [doi]
• Overcoming Negative nFET VTH by Defect-Compensated Low-Thermal Budget ITO-IGZO Hetero-Oxide Channel to Achieve Record Mobility and Enhancement-mode OperationSonu Hooda, Chun-Kuei Chen, Manohar Lal, Shih-Hao Tsai, Evgeny Zamburg, Aaron Voon-Yew Thean. 1-2 [doi]
• An 11.4-to-16.4GHz FMCW Digital PLL with Cycle-slipping Compensation and Back-tracking DPD Achieving 0.034% RMS Frequency Error under 3.4-GHz Chirp Bandwidth and 960-MHz/μs Chirp SlopeAngxiao Yan, Wei Deng 0001, Haikun Jia, Shiyan Sun, Chao Tang, Bufan Zhu, Yu Fu, Hongzhuo Liu, Baoyong Chi. 1-2 [doi]
• A 6.5nW, -73.5dBm Sensitivity, Cryptographic Wake-Up Receiver with a PUF-based OTP and Temperature-Insensitive Code RecoveryJaehan Park, Cheonhoo Jeon, Donggyu Minn, Heesung Roh, Jae-Yoon Sim. 1-2 [doi]
• A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery LoopMohamed Badr Younis, Mostafa Gamal Ahmed, Tianyu Wang 0006, Ahmed E. AbdelRahman, Mahmoud A. Khalil, Anup P. Jose, Pavan Kumar Hanumolu. 1-2 [doi]
• Highly Reliable and Manufacturable MRAM embedded in 14nm FinFET nodeS. Ko, J. H. Park, J. H. Bak, H. Jung, J. Shim, D. S. Kim, W. Lim, D. E. Jeong, J. H. Lee, K. Lee, J. H. Park, Y. Kim, C. Kim, J.-H. Jeong, C.-Y. Lee, S.-H. Han, Y. Ji, S.-H. Hwang, H. J. Shin, K. Lee, Y. J. Song, Y. G. Shin, J. H. Song. 1-2 [doi]
• A 3nm 256Mb SRAM in FinFET Technology with New Array Banking Architecture and Write-Assist Circuitry Scheme for High-Density and Low-VMIN ApplicationsJonathan Chang, Yen-Huei Chen, Gary Chan, Kuo-Cheng Lin, Po-Sheng Wang, Yangsyu Lin, Sevic Chen, Peijiun Lin, Ching-Wei Wu, Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Atul Katoch, Robin Lee, Hung-Jen Liao, Jhon-Jhy Liaw, Shien-Yang Michael Wu, Quincy Li. 1-2 [doi]
• A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFETIl-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo. 1-2 [doi]
• A 65nm 60mW Dual-Loop Adaptive Digital Beamformer with Optimized Sidelobe Cancellation and On-Chip DOA Estimation for mm-Wave ApplicationsSigang Ryu, Adou Sangbone Assoa, Shota Konno, Arijit Raychowdhury. 1-2 [doi]
• A 0.32pJ/b 90Gbps PAM4 Optical Receiver Front-End with Automatic Gain Control in 12nm CMOS FinFETMilad Haghi Kashani, Hossein Shakiba, Ali Sheikholeslami. 1-2 [doi]
• 14nm DRAM Development and ManufacturingKanguk Kim, Youngwoo Son, Hoin Ryu, ByungHyun Lee, Jooncheol Kim, Hyunsu Shin, Joonyoung Kang, Jihun Kim, Shinwoo Jeong, Kyosuk Chae, Dongkak Lee, Ilwoo Jung, Yongkwan Kim, Boyoung Song, Jeonghoon Oh, Jungwoo Song, Seguen Park, Keumjoo Lee, Hyodong Ban, Jiyoung Kim, Jooyoung Lee. 1-2 [doi]
• A back-illuminated 6 μm SPAD depth sensor with PDE 36.5% at 940 nm via combination of dual diffraction structure and 2×2 on-chip lensY. Fujisaki, Hidenobu Tsugawa, K. Sakai, H. Kumagai, R. Nakamura, Tomoharu Ogita, S. Endo, T. Iwase, H. Takase, K. Yokochi, S. Yoshida, S. Shimada, Y. Otake, T. Wakano, H. Hiyama, K. Hagiwara, M. Arakawal, S. Matsumotol, H. Maeda, K. Sugihara, K. Takabayashi, M. Ono, K. Ishibashi, K. Yamamoto. 1-2 [doi]
• Chip Demonstration of a High-Density (43Gb) and High-Search-Bandwidth (300Gb/s) 3D NAND Based In-Memory Search Accelerator for Ternary Content Addressable Memory (TCAM) and Proximity Search of Hamming DistanceChih-Chang Hsieh, Hang-Ting Lue, Yung-Chun Li, Shuo-Nan Hung, Chun-Hsiung Hung, Keh-Chung Wang, Chih-Yuan Lu. 1-2 [doi]
• Scaled contact length with low contact resistance in monolayer 2D channel transistorsWen-Chia Wu, Terry Y. T. Hung, D. Mahaveer Sathaiya, Dongxu Fan, Goutham Arutchelvan, Chen-Feng Hsu, Sheng-Kai Su, Ang-Sheng Chou, Edward Chen, Weisheng Li, Zhihao Yu, Hao Qiu, Ying-Mei Yang, Kuang-I Lin, Yun-Yang Shen, Wen Hao Chang, San Lin Liew, Vincent D.-H. Hou, Jin Cai, Chung-Cheng Wu, Jeff Wu, H.-S. Philip Wong, Xinran Wang, Chao-Hsin Chien, Chao-Ching Cheng, Iuliana P. Radu. 1-2 [doi]
• Cryogenic RF Transistors and Routing Circuits Based on 3D Stackable InGaAs HEMTs with Nb Superconductors for Large-Scale Quantum Signal ProcessingJaeYong Jeong, Seong Kwang Kim, Yoon-Je Suh, Jisung Lee, Joonyoung Choi, Juhyuk Park, Joon Pyo Kim, Bong-Ho Kim, Younjung Jo, Seung Young Park, Jongmin Kim, SangHyeon Kim. 1-2 [doi]
• An Energy-Efficient Impedance-Boosted Discrete-Time Amplifier Achieving 0.34 Noise Efficiency Factor and 389 MΩ Input ImpedanceGabriele Atzeni, Can Livanelioglu, Lavinia Recchioni, Sina Arjmandpour, Taekwang Jang. 1-2 [doi]
• How Fault-Tolerant Quantum Computing Benefits from Cryo-CMOS TechnologyH.-L. Chiang, R. A. Hadi, J. F. Wang, H.-C. Han, J.-J. Wu, H.-H. Hsieh, J.-J. Horng, W. S. Chou, B.-S. Lien, C. H. Chang, Y.-C. Chen, Y. H. Wang, T.-C. Chen, J. C. Liu, Y.-C. Liu, M.-H. Chiang, K.-H. Kao, B. Pulicherla, J. Cai, C. S. Chang, K. W. Su, K.-L. Cheng, T.-J. Yeh, Y.-C. Peng, C. Enz, M.-C. F. Chang, M. F. Chang, H.-S. P. Wong, I. P. Radu. 1-2 [doi]
• Human Activity Recognition SoC for AR/VR with Integrated Neural Sensing, AI Classifier and Chained Infrared Communication for Multi-chip CollaborationYijie Wei, Xi Chen, Jie Gu 0001. 1-2 [doi]
• A -20°C~+107°C 52mk-NETD Reference-cell-free 15-bits ROIC for 80×60 Micro-bolometer Thermal ImagerHsin-Yu, John Carl Joel Salao Marquez, Chih-Cheng Hsieh. 1-2 [doi]
• A Bit-Serial Computing Accelerator for Solving Coupled Partial Differential EquationsJunjie Mu, Chengshuo Yu, Tony Tae-Hyoung Kim, Bongjin Kim. 1-2 [doi]
• A 112-Gb/s 58-mW PAM4 Transmitter in 28-nm CMOS TechnologyMahdi Forghani, Yu Zhao, Pawan K. Khanna, Behzad Razavi. 1-2 [doi]
• A Low-Voltage Area-Efficient TSV I/O for HBM with Data Rate up to 15Gb/s Featuring Overlapped Multiplexing Driver, ISI Compensators and QECTaeryeong Kim, Ji-Young Kim, Jeonghyeok You, Hohyun Chae, Byoung-Mo Moon, Kyomin Sohn, Seong-Ook Jung. 1-2 [doi]
• A 135 GBps/Gbit 0.66 pJ/bit Stacked Embedded DRAM with Multilayer Arrays by Fine Pitch Hybrid Bonding and Mini-TSVSong Wang, Bing Yu, Wenwu Xiao, Fujun Bai, Xiaodong Long, Liang Bai, Xuerong Jia, Fengguo Zuo, Jie Tan, Yixin Guo, Peng Sun, Jun Zhou, Qiong Zhan, Sheng Hu, Yu Zhou, Yi Kang, Qiwei Ren, Xiping Jiang. 1-2 [doi]
• An All-Digital Outphasing Transmitter IC for Ka-Band Bit-to-RF Concurrent Multi-Beam DBF ArrayDong Wang, Jiazheng Zhou, Hui Xu, Ningyuan Zhang, Xiaolei Su, Zhengkun Shen, Haoyun Jiang, Fan Yang 0077, Yixiao Wang, Junhua Liu, Huailin Liao. 1-2 [doi]
• A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power ApplicationsSekeon Kim, Keonhee Cho, Kyeongrim Baek, Hyunjun Kim, Younmee Bae, Mijung Kim, Dongwook Seo, Sangyeop Baeck, Sungjae Lee, Seong-Ook Jung. 1-2 [doi]
• A 64-Gb/s Reference-Less PAM4 CDR with Asymmetrical Linear Phase Detector Soring 231.5-fsrms Clock Jitter and 0.21-pJ/bit Energy Efficiency in 40-nm CMOSZhao Zhang, Zhaoyu Zhang, Yong Chen, Nan Qi, Jian Liu, Nanjian Wu, Liyuan Liu. 1-2 [doi]
• A 2.6 mV/b Resolution, 1.2 GHz Throughput, All-Digital Voltage Droop Monitor Using Coupled Ring Oscillators in Intel 4 CMOSCharles Augustine, Pascal Meinerzhagen, Wootaek Lim, A. Veerabathini, M. Bright, K. Mojjada, Jim Tschanz, Muhammad M. Khellah, Vivek De. 1-2 [doi]
• A 36nW CMOS Temperature Sensor with <0.1K Inaccuracy and Uniform ResolutionWei Wang, Liwen Jiang, Shayok Dutta, Yumin Su, ZhiYu Chen, Zhanghao Yu, Caleb Kemere, Kaiyuan Yang 0001. 1-2 [doi]
• A Fully Synthesizable 100Mbps Edge-Chasing True Random Number GeneratorYan He, Kaiyuan Yang 0001. 1-2 [doi]
• 3-bits-per-cell 2T32CFE nvTCAM by Angstrom-laminated Ferroelectric Layers with 10¹¹ Cycles of Endurance and 4.92V of Ultra-wide Memory-windows for In-memory-searchingE. R. Hsieh, Y. T. Tang, C. R. Liu, S. M. Wang, Y. L. Hsueh, R. Q. Lin, Y. X. Huang, Y. T. Chen. 1-2 [doi]
• Simple Binary In-Te OTS with Sub-nm HfOₓ Buffer Layer for 3D Vertical X-point Memory ApplicationsSanghyun Ban, Jangseop Lee, Taehoon Kim, Hyunsang Hwang. 1-2 [doi]
• A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm TechnologyNick Zhang, Young-Suk Kim, Peter Hsu, Samsoo Kim, Derek Tao, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li, Tsung-Yung Jonathan Chang. 1-2 [doi]
• Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited)Geoffrey W. Burr, Pritish Narayanan, Stefano Ambrogio, Atsuya Okazaki, Hsinyu Tsai, Kohji Hosokawa, Charles Mackin, Akiyo Nomura, Takeo Yasuda, J. Demarest, Kevin Brew, V. Chan, S. Choi, T. Gordon, T. M. Levin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, An Chen, Andrea Fasoli, Jose Luquin, Nicole Saulnier, S. Teehan, Ishtiaq Ahsan, Vijay Narayanan. 1-2 [doi]
• HZO Scaling and Fatigue Recovery in FeFET with Low Voltage Operation: Evidence of Transition from Interface Degradation to Ferroelectric FatigueZuocheng Cai, Kasidit Toprasertpong, Mitsuru Takenaka, Shinichi Takagi. 1-2 [doi]
• A 90 μW at 1 fps and 1.33 mW at 30 fps 120 dB intra-scene dynamic range 640 × 480 stacked image sensor for autonomous vision systemsP.-F. Rüedi, R. Quaglia, H.-R. Graf. 1-2 [doi]
• A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated DevicesKaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi. 1-2 [doi]
• A Sub-THz Full-Duplex Phased-Array Transceiver with Self-Interference Cancellation and LO Feedthrough SuppressionChun Wang, Ibrahim Abdo, Chenxin Liu, Carrel da Gomez, Hans Herdian, Wenqian Wang, Xi Fu, Dongwon You, Abanob Shehata, SungHwan Park, Yun Wang 0008, Jian Pang, Hiroyuki Sakai 0009, Atsushi Shirane, Kenichi Okada. 1-2 [doi]
• A 3.96μm, 124dB Dynamic Range, 6.2mW Stacked Digital Pixel Sensor with Monochrome and Near-Infrared Dual-Channel Global Shutter CaptureSong Chen, Chiao Liu, Lyle Bainbridge, Qing Chao, Ramakrishna Chilukuri, Wei Gao, Andrew P. Hammond, Tsung-Hsun Tsai, Ken Miyauchi, Isao Takayanagi, Masato Nagamatsu, Hirofumi Abe, Kazuya Mori, Masayuki Uno, Toshiyuki Isozaki, Rimon Ikeno, Hsin-Li Chen, Chih-Hao Lin, Wen-Chien Fu, Shou-Gwo Wuu. 1-2 [doi]
• Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 nodeGiuliano Sisto, R. Preston, R. Chen, Gioele Mirabelli, Anita Farokhnejad, Y. Zhou, Ivan Ciofi, Anne Jourdain, A. Veloso, Michele Stucchi, Odysseas Zografos, Pieter Weckx, Geert Hellings, Julien Ryckaert. 1-2 [doi]
• 1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOSY. Okamoto, Y. Komura, T. Mizuguchi, T. Saito, M. Ito, K. Kimura, Tatsuya Onuki, Yoshinori Ando, H. Sawai, T. Murakawa, H. Kunitake, Takanori Matsuzaki, H. Kimura, M. Fujita, M. Ikeda, Shunpei Yamazaki. 1-2 [doi]
• A 4.4 GS/s 220 MHz ΣΔ ADC with a Linearized Back-Gate Controlled GmC FilterJulius Edler, Marcel Runge, Sebastian Linnhoff, Friedel Gerfers. 1-2 [doi]
• Grain Size Reduction of Ferroelectric HZO Enabled by a Novel Solid Phase Epitaxy (SPE) Approach: Working Principle, Experimental Demonstration, and Theoretical UnderstandingDong Zhang, Jixuan Wu, Qiwen Kong, Zuopu Zhou, Long Liu, Kaizhen Han, Chen Sun, Xiaolin Wang, Gan Liu, Leming Jiao, Zijie Zheng, Yuye Kang, Jiezhi Chen, Xiao Gong. 1-2 [doi]
• An Integrated System Scaling Solution for Future High Performance ComputingChih-Hang Tung, Doug C. H. Yu. 1-2 [doi]
• A 1V 20.7μW Four-Stage Amplifier Capable of Driving a 4-to-12nF Capacitive Load with >1.07MHz GBW with an Improved Active ZeroChan-Ho Lee, Hyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Young Jun Jeon, Sung-Wan Hong. 1-2 [doi]
• 4-Layer Wafer on Wafer Stacking Demonstration with Face to Face/Face to Back Stacked Flexibility Using Hybrid Bond/TSV-Middle for Various 3D IntegrationC.-L. Lu, C. H. Chuang, C. H. Huang, S.-C. Lin, Y. H. Chang, W.-Y. Lai, M.-H. Chiu, M. H. Liao, S.-Z. Chang. 1-2 [doi]
• Novel Low Thermal Budget CMOS RMG: Performance and Reliability Benchmark Against Conventional High Thermal Budget Gate Stack SolutionsJacopo Franco, Hiroaki Arimura, J.-F. de Marneffe, S. Brus, Romain Ritzenthaler, E. Dentoni Litta, Kris Croes, Ben Kaczer, N. Horiguchi. 1-2 [doi]
• A 3.36 µm-pitch SPAD photon-counting image sensor using clustered multi-cycle clocked recharging technique with intermediate most-significant-bit readoutTakafumi Takatsuka, Jun Ogi, Y. Ikeda, Kazuki Hizu, Yutaka Inaoka, S. Sakama, I. Watanabe, T. Ishikawa, S. Shimada, J. Suzuki, H. Maeda, K. Toshima, Y. Nonaka, A. Yamamura, H. Ozawa, F. Koga, Yusuke Oike. 1-2 [doi]
• A Pitch-Matched Transceiver ASIC for 3D Ultrasonography with Micro-Beamforming ADCs based on Passive Boxcar Integration and a Multi-Level DatalinkP. Guo, Z. Y. Chang, Emile Noothout, Hendrik J. Vos, Johannes G. Bosch, N. de Jong, Martin D. Verweij, Michiel A. P. Pertijs. 1-2 [doi]
• 216 fps 672 × 512 pixel 3 μm Indirect Time-of-Flight Image Sensor with 1-Frame Depth Acquisition for Motion Artifact SuppressionChihiro Okada, Sozo Yokogawa, Yuhi Yorikado, Katsumi Honda, Naoki Okuno, Ryohei Ikeno, Makoto Yamakoshi, Hiroshi Ito, Shohei Yoshitsune, Masatsugu Desaki, Shota Hida, Atsushi Nose, Hayato Wakabayashi, Fumihiko Koga. 1-2 [doi]
• A 4.1W/mm² Peak Power Density and 77% Peak Efficiency Fully Integrated DC-DC Converter based on Electromagnetically Coupled Class-D LC Oscillators and a Resonant LC Flying Impedance in 22nm FDSOI CMOSAlessandro Novello, Gabriele Atzeni, Tim Keller, Taekwang Jang. 1-2 [doi]
• A 110dB-TCMRR TDM-based 8-Channel Noncontact ECG Recording IC with Suppression of Motion-Induced Coupling in PPKyu-Jin Choi, Seungnam Choi, Jae-Yoon Sim. 1-2 [doi]
• Accelerating Adaptive Parallel Tempering with FPGA-based p-bitsNavid Anjum Aadit, Masoud Mohseni, Kerem Yunus Camsari. 1-2 [doi]
• An 18.8-to-23.3 GHz ADPLL Based on Charge-Steering-Sampling Technique Achieving 75.9 fs RMS Jitter and -252 dB FoMWeichen Tao, Weichen Zhao, Robert Bogdan Staszewski, Fujiang Lin, Yizhe Hu. 1-2 [doi]
• A 2GS/s 11b 8x Interleaved ADC with 9.2 ENOB and 69.9dB SFDR in 28nm CMOSLuca Ricci, Lorenzo Scaletti, Gabriele Bè, Michele Rocco, Luca Bertulessi, Salvatore Levantino, Andrea L. Lacaita, Carlo Samori, Andrea Bonfanti. 1-2 [doi]
• A 150-MS/s Fully Dynamic SAR-Assisted Pipeline ADC Using a Floating Ring Amplifier and Gain-Enhancing Miller Negative-CSeungheun Song, Taewook Kang, Seungjong Lee, Michael P. Flynn. 1-2 [doi]
• TM MI250X Accelerator enabled by Elevated Fanout Bridge Advanced Packaging ArchitectureRaja Swaminathan, Michael J. Schulte, Brett Wilkerson, Gabriel H. Loh, Alan Smith, Norman James. 1-2 [doi]
• 11, SS of 68 mV/dec, Normal-off Operation and High Positive Gate Bias StabilityJie Zhang, Zhuocheng Zhang, Zehao Lin, Ke Xu, Hongyi Dou, Bo Yang, Xinghang Zhang, Haiyan Wang, Peide D. Ye. 1-2 [doi]
• First Demonstration of BEOL-Compatible Write-Enhanced Ferroelectric-Modulated Diode (FMD): New Possibility for Oxide Semiconductor Memory DevicesLeming Jiao, Kaizhen Han, Zuopu Zhou, Zijie Zheng, Xiaolin Wang, Qiwen Kong, Yuye Kang, Jishen Zhang, Long Liu, Xiao Gong. 1-2 [doi]
• A Reference-Sampling PLL with Low-Ripple Double-Sampling PD Achieving -80-dBc Reference Spur and -259-dB FoM with 12-pF Input LoadZunsong Yang, Masaru Osada, Shuowei Li, Yuyang Zhu, Tetsuya Iizuka. 1-2 [doi]
• Self-Referenced Design-Agnostic Laser Voltage Probing Attack Detection with 100% Protection Coverage, 58% Area Overhead for Automated DesignHui Zhang, Longyang Lin, Qiang Fang, Udara Samurdhi Harshanga Kalingage, Massimo Alioto. 1-2 [doi]
• A Reconfigurable Analog FIR Filter Achieving -70dB Rejection with Sharp Transition for Narrowband ReceiversChien-Wei Tseng, Zhen Feng, Zichen Fan, Hyochan An, Yunfan Wang, Hun-Seok Kim, David T. Blaauw. 1-2 [doi]
• A 60fps9.9nJ/frame·pixel CMOS Image Sensor with On-Chip Pixel-wise Conversion Gain Modulation for Per-frame Adaptive DCG-HDR ImagingYi Luo 0005, Shahriar Mirabbasi. 1-2 [doi]
• 5G NR RF PA Supply Modulator Supporting 179ns 0.5-to-5.5V Symbol Power Tracking and Envelope TrackingJun-Suk Bang, Dongsu Kim, Young-Hwan Choo, Ik-Hwan Kim, Seungchan Park, Jeongkwang Lee, Sang-Han Lee, Young-Ho Jung, Jae-Young Ko, Sung-Youb Jung, Jae-Yeol Han, WooSik Kim, Ji-Seon Paek, Jongwoo Lee. 1-2 [doi]
• Epitaxial Strain Control of HfxZr1-xO2 with Sub-nm IGZO Seed Layer Achieving EOT=0.44 nm for DRAM Cell CapacitorSeongho Kim, Young-Keun Park, Gyu Soup Lee, Eui Joong Shin, Woon-San Ko, Hi-Deok Lee, Ga-Won Lee 0001, Byung Jin Cho. 1-2 [doi]
• A Time-Mode-Modulation Digital Quadrature Power Amplifier Based on 1-bit Delta-Sigma Modulator and Transformer Combined FIR FIlterYuncheng Zhang, Zheng Sun, Bangan Liu, Junjun Qiu, Dingxin Xu, Yi Zhang 0092, Xi Fu, Dongwon You, Hongye Huang, Waleed Madany, Ashbir Aviat Fadila, Zezheng Liu, Wenqian Wang, Yuang Xiong, Atsushi Shirane, Kenichi Okada. 1-2 [doi]
• Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-TruncationSangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo. 1-2 [doi]
• 96.48% Peak-Efficiency Continuous-Current Step-Up Battery Charger (CC-SUBC) with Dual Energy-Harvesting Sources for Automotive ApplicationHyo-Jin Park, Joo-Mi Cho, Hyeon-Ji Choi, Chan-Ho Lee, Sung-Wan Hong. 1-2 [doi]
• 2 Body-Driven Temperature-to-Digital Converter and Voltage Reference with 0.6-1.6-V Unregulated Supply for Battery-Less SystemsLuigi Fassio, Orazio Aiello, Massimo Alioto. 1-2 [doi]
• Structural Reliability and Performance Analysis of Backside PDNSunghwan Kim, Geun-Myeong Kim, Seong-Nam Kim, Saetbyeol Ahn, Yoon-Suk Kim, Inkook Jang, Kyoung-Woo Lee, Dae Sin Kim. 1-2 [doi]
• A Class-D Piezoelectric Speaker Driver Using A Quadrature Feedback Chopping Scheme achieving 29dB Large-Signal THD+N ImprovementShoubhik Karmakar, Huajun Zhang, Marco Berkhout, Qinwen Fan. 1-2 [doi]
• Ultrathin Atomic-Layer-Deposited In2O3 Radio-Frequency Transistors with Record High fT of 36 GHz and BEOL CompatibilityDongqi Zheng, Adam Charnas, Jian-Yu Lin, Jackson Anderson, Dana Weinstein, Peide D. Ye. 1-2 [doi]
• A 93.5%-Efficiency 13.56-MHz-Bandwidth Optimal On/Off Tracking Active Rectifier with Fully Digital Feedback-Based Delay Control for Adaptive Efficiency CompensationJisan Ahn, Hyun-Su Lee, Kyeongho Eom, Woojoong Jung, Hyung-Min Lee. 1-2 [doi]
• A 50μW Ring-Type Complementary Inverse-Class-D Oscillator with 191.4dBc/Hz FoM and 205.6dBc/Hz FoMAKai Xu, Bowen Yu, Jun Hu, Yubin Li, Robert Bogdan Staszewski, Hongtao Xu. 1-2 [doi]
• A Wideband CMOS NMR Spectrometer for Multinuclear Molecular FingerprintingAoyang Zhang, Daniel Krüger, Behdad Aghelnejad, Guang Yang, Henry Hinton, Yi-Qiao Song, Donhee Ham. 1-2 [doi]
• Searching for Nonlinearity: Scaling Limits in NAND FlashSiva Sivaram, Alper Ilkbahar. 1-4 [doi]
• 2 9.81 -350 TOPS/W RRAM Compute-in-Memory Macro in 40nm CMOS with Hybrid Offset/IOFF Cancellation and ICELL RBLSL Drop MitigationSamuel D. Spetalnick, Muya Chang, Shota Konno, Brian Crafton, Ashwin Sanjay Lele, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury. 1-2 [doi]
• A 12nm 137 TOPS/W Digital Compute-In-Memory using Foundry 8T SRAM Bitcell supporting 16 Kernel Weight Sets for AI Edge ApplicationsGajanan Jedhe, Chetan Deshpande, Sushil Kumar, Cheng-Xin Xue, Zijie Guo, Ritesh Garg, Kim Soon Jway, En-Jui Chang, Jenwei Liang, Zhe Wan, Zhenhao Pan. 1-2 [doi]
• Novel Strategies for Highly Uniform and Reliable Cell Characteristics of 8th Generation 1Tb 3D-NAND Flash MemoryChanghwan Lee, Min-Tai Yu, Sejun Park, Hoki Lee, Bio Kim, Suhwan Lim, Jaeduk Lee, Sung-Hun Lee, Mincheol Park, Sujin Ahn, Sunghoi Hur. 1-2 [doi]
• SP-PIM: A 22.41TFLOPS/W, 8.81Epochs/Sec Super-Pipelined Processing-In-Memory Accelerator with Local Error Prediction for On-Device LearningJung Hoon Kim, Jaehoon Heo, Wontak Han, Jaeuk Kim, Joo-Young Kim 0001. 1-2 [doi]
• A 26.4mW, 18.6MS/s Image Reconstruction Processor for IoT Compressive SensingYu-Cheng Lin, Chanmin Park, Wenda Zhao, Nan Sun, Youngcheol Chae, Chia-Hsiang Yang. 1-2 [doi]
• A Compact 0.9uW Direct-Conversion Frequency Analyzer for Speech Recognition with Wide-Range Q-Controlable Bandpass RectifierShiro Dosho, Ludovico Minati, Kazuki Maari, Hiroyuki Ito. 1-2 [doi]
• Strategy for 3D Ferroelectric Transistor: Critical Surface Orientation Dependence of HfZrOx on SiSong-Hyeon Kuk, Jae Hoon Han, Bong-Ho Kim, Joon Pyo Kim, Sang-Hyeon Kim. 1-2 [doi]
• High Density Embedded 3D Stackable Via RRAM in Advanced MCU ApplicationsYao-Hung Huang, Yu-Cheng Hsieh, Yu-Cheng Lin, Yue-Der Chih, Eric Wang, Jonathan Chang, Ya-Chin King, Chrong Jung Lin. 1-2 [doi]
• Lg = 60 nm In0.53 Ga0.47 As MBCFETs: From gm_max = 13.7 mS/üm and Q = 180 to virtual-source modelingJ. H. Yoo, H.-B. Jo, I.-G. Lee, S.-M. Choi, J.-M. Baek, S. T. Lee, H. Jang, M. W. Kong, H. H. Kim, H. J. Lee, H.-J. Kim, H.-S. Jeong, W.-S. Park, D.-H. Ko, S. H. Shin, H. M. Kwon, S.-K. Kim, J. G. Kim, J. Yun, T. Kim, K. Y. Shin, T. W. Kim, J. K. Shin, J. H. Lee, C.-S. Shin, K.-S. Seo, D. H. Kim. 1-2 [doi]
• A 720 nW Current Sensor with 0-to-15 V Input Common-Mode Range and ±0.5% Gain Error from -40 to 85 °CRoger Luis Brito Zamparette, Kofi A. A. Makinwa. 1-2 [doi]
• A 14nm 128Mb Embedded MRAM Macro achieved the Best Figure-Of-Merit with 80MHz Read operation and 18.1Mb/mm² implementation at 0.64VGyuseong Kang, Hyunjin Shin, Hyuntaek Jung, Sunkyu Lee, Jaeseung Choi 0001, Sangyeop Baek, Hyunsung Jung, Daeshik Kim, Sohee Hwang, Shinhee Han, Yongsung Ji, Sei Seung Yoon. 1-2 [doi]
• Ultrahigh Bias Stability of ALD In2O3 FETs Enabled by High Temperature O2 AnnealingZhuocheng Zhang, Zehao Lin, Chang Niu, Mengwei Si, Muhammad Ashraful Alam, Peide D. Ye. 1-2 [doi]
• Determining the low-frequency noise source in cryogenic operation of short-channel bulk MOSFETsTakumi Inaba, Hiroshi Oka, Hidehiro Asai, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Shunsuke Shitakata, Koichi Fukuda, Takahiro Mori. 1-2 [doi]
• Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory ArchitectureYiwei Du, Jianshi Tang, Yijun Li, Yue Xi, Bin Gao 0006, He Qian, Huaqiang Wu. 1-2 [doi]
• A 19.8W/29.6W Hybrid Step-Up/Down DC-DC Converter with 97.2% Peak Efficiency for 1-Cell/2-Cell Battery Charger ApplicationsSeongil Yeo, Uyong Hyeon, Mingyeong Kim, Jusung Kim, Kunhee Cho. 1-2 [doi]
• U-MRAM: Transistor-Less, High-Speed (10 ns), Low-Voltage (0.6 V), Field-Free Unipolar MRAM for High-Density Data MemoryMing-Hung Wu, Ming-Chun Hong, Ching Shih, Yao-Jen Chang, Yu-Chen Hsin, Shih-Ching Chiu, Kuan-Ming Chen, Yi-Hui Su, Chih-Yao Wang, Shan-Yi Yang, Guan-Long Chen, Hsin-Han Lee, Sk. Ziaur Rahaman, I-Jung Wang, Chen-Yi Shih, Tsun-Chun Chang, Jeng-Hua Wei, Shyh-Shyuan Sheu, Wei-Chung Lo, Shih-Chieh Chang, Tuo-Hung Hou. 1-2 [doi]
• +-Si/Ge Substrates Achieving Record 2Pr = 84 μC/cm² and Endurance > 1E11Zefu Zhao, Yu-Rui Chen, Yun Wen Chen, Wan-Hsuan Hsieh, Jer-Fu Wang, Jia-Yang Lee, Yifan Xing, Guan-Hua Chen, C. W. Liu. 1-2 [doi]
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• A Highly-Digital PWM-Based Impedance Monitoring IC with 143.2dB DR and 17.7fFrms ResolutionHyeonho Han, Woojun Choi, Jaehyun Kim, Jaesuk Sung, Heonjin Choi, Youngcheol Chae. 1-2 [doi]
• Extremely High-κ Hf0.2Zr0.8O2 Gate Stacks Integrated into Ge0.95Si0.05 Nanowire and Nanosheet nFETs Featuring Respective Record Ion per Footprint of 9200μA/μm and Record Ion per Stack of 360μA at VOV=VDS=0.5VYi-Chun Liu, Yu-Rui Chen, Yun Wen Chen, Hsin-Cheng Lin, Wan-Hsuan Hsieh, Chien-Te Tu, Bo-Wei Huang, Wei-Jen Chen, Chun-Yi Cheng, Shee-Jier Chueh, C. W. Liu. 1-2 [doi]
• A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOSJaehong Jung, Kyungmin Lee, Gunwoo Kong, Baekmin Lim, Seungjin Kim, Seunghyun Oh, Jongwoo Lee. 1-2 [doi]
• Breakthrough Design Technology Co-optimization using BSPDN and Standard Cell Variants for Maximizing Block-level PPASeungyoung Lee, Sungyup Jung, Yunkyeong Jang, Jungho Do, Jisu Yu, Hyeoungyu You, Minjae Jeong, Jinyoung Lim, Jiyun Han, Sangdo Park, Yongdeok Kim, Jooyeon Kwon, Hoonki Kim, Seiseung Yoon. 1-2 [doi]
• Multi-Chiplet Heterogeneous Integration Packaging for Semiconductor System ScalingSurya Bhattacharya, Vempati Srinivasa Rao. 1-4 [doi]
• 2Tuur Van Daele, Filip Tavernier. 1-2 [doi]
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• -21 A/μm in capacitorless DRAM achieved by Reactive Ion Etch of IGZO-TFTAttilio Belmonte, S. Kundu, S. Subhechha, Adrian Vaisman Chasin, Nouredine Rassoul, Harold Dekkers, H. Puliyalil, F. Seidel, P. Carolan, Romain Delhougne, Gouri Sankar Kar. 1-2 [doi]
• Super-Cutoff Analog Building Blocks for pW/Stage Operation and Demonstration of 78-pW Battery-Less Light-Harvested Wake-Up Receiver down to MoonlightJoydeep Basu, Luigi Fassio, Karim Ali, Massimo Alioto. 1-2 [doi]
• Noise Performance Improvements of 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Non-doped Pixel-FinFETsY. Kikuchi, M. Tomita, T. Hayashi, H. Chiba, T. Ogita, T. Okawa, K. Nishida, M. Sugimoto, D. Yoneyama, T. Umeki, H. Oishi, S. Miyake, K. Hiramatsu, H. Kumano, H. Kawashima, N. Yamada, M. Tamura, H. Ohnuma, K. Tatani. 1-2 [doi]
• A prototype 5nm custom sensor SoC for Augmented Reality/Virtual Reality targeting Smartglasses with embedded computer vision, audio, security and MLKarl Kaiser, Dinesh Patil, Edith Beigné. 1-2 [doi]
• A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit TrackingYumito Aoyagi, Makoto Yabuuchi, Tomotaka Tanaka, Yuichiro Ishii, Yoshiaki Osada, Takaaki Nakazato, Koji Nii, Isabel Wang, Yu-Hao Hsu, Hong-Chen Cheng, Hung-Jen Liao, Tsung-Yung Jonathan Chang. 1-2 [doi]
• A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC with Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFETRishabh Mittal, Hajime Shibata, Sharvil Patil, Erik Krommenhoek, Prawal Shrestha, Gabriele Manganaro, Anantha P. Chandrakasan, Hae-Seung Lee. 1-2 [doi]
• A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIMWenao Xie, Haoyang Sang, Beomseok Kwon, Dongseok Im, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo. 1-2 [doi]
• 3 97.3%-Efficiency Outphase Switched-Capacitor Hybrid Buck Converter with Relieved Capacitor Inrush Current and COUT-Free OperationXiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang 0002, Man Kay Law, Pui-In Mak, Rui Paulo Martins. 1-2 [doi]
• Experimental Demonstration of Probabilistic-Bit (p-bit) Utilizing Stochastic Oscillation of Threshold Switch DeviceSeongjae Heo, Dongmin Kim, Wooseok Choi, Sanghyun Ban, Ohhyuk Kwon, Hyunsang Hwang. 1-2 [doi]
• -. pJ/step 14-bit gain-adaptive single-slope column ADC with enhanced HDR function for high-quality imagersLuong Hung, Koji Matsuura, Hiroki Suto, Kazutoshi Kodama, Yosuke Tanaka, Toshiaki Ono, Junichiro Fujimagari, Kentaro Akiyama, Miho Akahide, Yoshiaki Inada. 1-2 [doi]
• Two-Dimensionally Arranged Display Drivers Achieved by OS/Si StructureYusuke Komura, Shoki Miyata, Yuki Okamoto, Yuki Tamatsukuri, Hiroki Inoue, Toshihiko Saito, Munehiro Kozuma, Hidetomo Kobayashi, Tatsuya Onuki, Yuichi Yanagisawa, Toshihiko Takeuchi, Yutaka Okazaki, Hitoshi Kunitake, Daiki Nakamura, Takaaki Nagata, Yasumasa Yamane, Makoto Ikeda, Shih-Ci Yen, Chuan-Hua Chang, Wen-Hsiang Hsieh, Hiroshi Yoshida, Min-Cheng Chen, Ming-Han Liao, Shou-Zen Chang, Shunpei Yamazaki. 1-2 [doi]
• A Fingertip-Mimicking 12×16 200μm-Resolution e-skin Taxel Readout Chip with per-Taxel Spiking Readout and Embedded Receptive Field ProcessingMark Daniel Alea, Ali Safa, Flavio Giacomozzi, Andrea Adami, Inci Rüya Temel, Leandro Lorenzelli, Georges G. E. Gielen. 1-2 [doi]
• Voltage Scaling-Agnostic Counteraction of Side-Channel Neural Net Reverse Engineering via Machine Learning Compensation and Multi-Level ShufflingQiang Fang, Longyang Lin, Hui Zhang, Tianqi Wang, Massimo Alioto. 1-2 [doi]
• A 256 Gbps Heterogeneously Integrated Silicon Photonic Microring-based DWDM Receiver Suitable for In-Package Optical I/OZhe Xuan, Ganesh Balamurugan, Duanni Huang, Ranjeet Kumar, Jahnavi Sharma, Cooper Levy, Jinyong Kim, Chaoxuan Ma, Guan-Lin Su, Songtao Liu, Xinru Wu, Tolga Acikalin, Haisheng Rong, James E. Jaussi. 1-2 [doi]
• Novel Cell Architectures with Back-side Transistor Contacts for Scaling and PerformanceM. Kobrinsky, J. D. Silva, E. Mannebach, S. Mills, M. Abd El Qader, O. Adebayo, N. Arkali Radhakrishna, M. Beasley, J. Chawla, S. Chugh, A. Dasgupta, U. Desai, E. De Re, G. Dewey, T. Edwards, C. Engel, V. Gudmundsson, J. Hicks, B. Krist, R. Mehandru, Inanc Meric, P. Morrow, D. Nandi, P. Patel, R. Ramamurthy, D. Samanta, L. Shoer, A. St Amour, L. H. Tan, Sukru Yemenicioglu, X. Wang, T. Ghani. 1-2 [doi]
• 2/ch Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer InterfacesMoon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore. 1-2 [doi]
• Beyond 10 μm Depth Ultra-High Speed Etch Process with 84% Lower Carbon Footprint for Memory Channel Hole of 3D NAND Flash over 400 LayersYoshihide Kihara, Maju Tomura, Wataru Sakamoto, Masanobu Honda, Masayuki Kojima. 1-2 [doi]
• rd-Order VCO-Based CTDSM with NS-SAR Quantizer (NSQ VCO CTDSM)Hsiang-Wen Chen, Seungjong Lee, Michael P. Flynn. 1-2 [doi]
• A 0.190-pJ/bit 25.2-Gb/s/wire Inverter-Based AC-Coupled Transceiver for Short-Reach Die-to-Die Interfaces in 5-nm CMOSYoshinori Nishi, John W. Poulton, Xi Chen 0033, Sanquan Song, Brian Zimmer, Walker J. Turner, Stephen G. Tell, Nikola Nedovic, John M. Wilson 0002, William J. Dally, C. Thomas Gray. 1-2 [doi]
• First Study of the Charge Trapping Aggravation Induced by Anti-Ferroelectric Switching in the MFIS StackZuopu Zhou, Leming Jiao, Zijie Zheng, Xiaolin Wang, Dong Zhang, Kai Ni, Xiao Gong. 1-2 [doi]
• A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM MacroJinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu. 1-2 [doi]
• Integration of epitaxial monolayer MX₂ channels on 300mm wafers via Collective-Die-To-Wafer (CoD2W) transferS. Ghosh, Quentin Smets, S. Banerjee, Tom Schram, K. Kennes, R. Verheyen, P. Kumar, M.-E. Boulon, Benjamin Groven, H. M. Silva, S. Kundu, Daire Cott, Dennis Lin, P. Favia, T. Nuytten, A. Phommahaxay, Inge Asselberghs, C. De La Rosa, Gouri Sankar Kar, Steven Brems. 1-2 [doi]
• A 122fsrms-Jitter and -60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating TechniqueYoonseo Cho, Jeonghyun Lee, Suneui Park, Seyeon Yoo, Jaehyouk Choi. 1-2 [doi]
• A 6nW 30.8kHz Relaxation Oscillator with Sampling Bias-Free RC Circuit and Dynamic Power Scaling in a 12nm FinFETFan-Wei Liao, Shan-Chih Tsou, Chien-Sheng Chao. 1-2 [doi]
• A Switched-Capacitor Integer Compute Unit with Decoupled Storage and Arithmetic for Cloud AI Inference in 5nm CMOSAnkur Agrawal, Monodeep Kar, Kyu-hyoun Kim, Sergey V. Rylov, Jinwook Jung, Seiji Munetoh, Kohji Hosokawa, Xin Zhang, Bahman Hekmatshoartabari, Fabio Carta, Martin Cochet, Robert Casatuta, Mingu Kang, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang. 1-2 [doi]
• A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition ApplicationAtsutake Kosuge, Rei Sumikawa, Yao-Chung Hsu, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda. 1-2 [doi]
• A General-Purpose Compute-in-Memory Processor Combining CPU and Deep Learning with Elevated CPU Efficiency and Enhanced Data LocalityYuhao Ju, Yijie Wei, Xi Chen, Jie Gu. 1-2 [doi]
• GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D NavigationSeokchan Song, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Gwangtae Park, Hoi-Jun Yoo. 1-2 [doi]
• High Performance 5G Mobile SOC Productization with 4nm EUV Fin-FET TechnologyJun Yuan, Jie Deng, Vicki Lin, Ying Chen, Joseph Chiu, Minghuei Lin, Jun Chen, Deedee Zhang, Yukai Chen, David Liu, Bo Yu, Hao Wang, Giri Nallapati, Vivek Mohan, Venu Sanaka, Berkan Baran, Frank Dahan, Prasad Bhadri, Rajesh Geol, Venu Boynapalli, Seyfi Bazarjani, Paul Penzes, Parag Agashe, P. R. Chidambaram. 1-2 [doi]
• High Performance 5 nm Si Nanowire FETs with a Record Small SS = 2.3 mV/dec and High Transconductance at 5.5 K Enabled by Dopant Segregated Silicide Source/DrainYi Han, Jingxuan Sun, Jin Hee Bae, Detlev Grützmacher, Joachim Knoch, Qing-Tai Zhao. 1-2 [doi]
• Write-enhanced Single-ended 11T SRAM Enabling Single Bitcell Reconfigurable Compute-in-Memory Employing Complementary FETsWei-Xiang You, Cheng-yin Wang, Yih Wang, Tsung-Yung Jonathan Chang, Szuya Sandy Liao. 1-2 [doi]
• Foundry Monolithic 3D BEOL Transistor + Memory Stack: Iso-performance and Iso-footprint BEOL Carbon Nanotube FET+RRAM vs. FEOL Silicon FET+RRAMTathagata Srimani, A. C. Yu, Robert M. Radway, D. T. Rich, M. Nelson, S. Wong, D. Murphy, S. Fuller, Gage Hills, S. Mitra, Max M. Shulaker. 1-2 [doi]
• Demonstration of Recovery Annealing on 7-Bits per Cell 3D Flash Memory at Cryogenic Operation for Bit Cost Scalability and SustainabilityYuta Aiba, Yusuke Higashi, Hitomi Tanaka, Hiroki Tanaka, Fumie Kikushima, Toshio Fujisawa, Hideko Mukaida, Masayuki Miura, Tomoya Sanuki. 1-2 [doi]
• Highly Scalable Metal Induced Lateral Crystallization (MILC) Techniques for Vertical Si Channel in Ultra-High (> 300 Layers) 3D Flash MemoryN. Ishihara, Y. Shimada, T. Ochi, S. Seto, H. Matsuo, H. Yamashita, S. Morita, M. Ukishima, K. Uejima, Y. Arayashiki, S. Kajiwara, A. Murayama, K. Nishiyama, K. Sugimae, S. Mori, Y. Saito, T. Shundo, A. Maeda, H. Kamiya, Y. Uchiyama, M. Fujiwara, F. Aiso, K. Sekine, N. Ohtani. 1-2 [doi]
• Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCsXi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu 0001. 1-2 [doi]
• Novel Bridge Transmission Line Method for Thin-Film Semiconductors: Modelling, Simulation Verification, and Experimental DemonstrationKaizhen Han, Yuye Kang, Yue Chen, Xiao Gong. 1-2 [doi]
• 2 per Channel Data Link for Reinforced Isolation with >25kVpk Surge Tolerance and >295kV/μs Common Mode Transient ImmunityDongwan Ha, Ruida Yun, Kevin R. Wrenner. 1-2 [doi]
• A 1, 024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division MultiplexingWoojun Choi, Yiyang Chen, Donghwan Kim, Sean Weaver, Tilman Schlotter, Can Livanelioglu, Jiawei Liao, Rosario M. Incandela, Parham Davami, Gabriele Atzeni, Sina Arjmandpour, SeongHwan Cho, Taekwang Jang. 1-2 [doi]
• ANP-G: A 28nm 1.04pJ/SOP Sub-mm2 Spiking and Back-propagation Hybrid Neural Network Asynchronous Olfactory Processor Enabling Few-shot Class-incremental On-chip LearningDexuan Huo, Jilin Zhang, Xinyu Dai, Jian Zhang, Chunqi Qian, Kea-Tiong Tang, Hong Chen 0002. 1-2 [doi]
• A 24-30 GHz Cascaded QPLL Achieving 56.8-fs RMS Jitter and -248.6-dB FoMjitterLi Wang, Zilu Liu, C. Patrick Yue. 1-2 [doi]
• ASIL-D automotive-grade microcontroller in 28nm FD-SOI with full-OTA capable 21MB embedded PCM memory and highly scalable power managementN. Grossier, Fabio Disegni, A. Ventre, A. Barcella, R. Mariani, V. Marino, S. Mazzara, A. Scavuzzo, M. Bansal, B. Soni, A. Anand, S. Banzal, D. Joshi, R. Narwal, M. Niranjani, K. Trivedi, P. Ferreira, Rossella Ranica, L. Vullo, Andreia Cathelin, Alfonso Maurelli, S. Pezzini, M. Peri. 1-2 [doi]
• E-Core Implementation in Intel 4 with PowerVia (Backside Power) TechnologyM. Shamanna, E. Abuayob, G. Aenuganti, C. Alvares, J. Antony, A. Bahudhanam, A. Chandran, P. Chew, A. Chatterjee, B. Chauhan, N. Dandeti, J. Desai, M. Doyle, T. Dmukauskas, P. Farache, E. Fetzer, K. Fischer, P. Hack, Y. Greenzweig, J. Giacobbe, Walid M. Hafez, E. Haralson, A. Hegde, A. Illa, M. Islam, S. Jain, M. Jang, J. Nguyen, T. Tong, L. Jiang, Eric Karl, P. Kalangi, G. Khoo, A. Krishnamoorthy, B. Kuns, W. Li, R. Livengood, T. Malik, R. Priyanka, H. Faraby, Y. Maymon, K. Mistry, K. Morgan, S. Natarajan, O. Nevo, M. Oh, P. Pardy, J. Park, P. Penmatsa, B. Phelps, C. Peterson, S. Rajappa, A. Raveh, A Rezaie, T. Ravishankar, R. Ramaswamy, S. Reddy, R. Saha, S. Sen, R. Sanchez, R. Sanaga, B. Simkhovich, Bernhard Sell, M. Senger, B. Schnarch, M. Seshadri, O. Sidorov, S. Subramanian, K. Subramanian, B. Truong, S. Bangalore, J. Hicks, S. Venkatesh, D. Christensen, K. Bhargav, M. Von Haartman, P. Joshi, S. Zickel, C. H. Lin, J. Huening, T. H. Wu, N. Bakken, A. Afzal, A. Raman, Sj. Rao, V. Kawar, J. Neirynck, D. Bradley, M. Duwe, S. Wu, V. Patil, M. Bayoumy. 1-2 [doi]
• 2 ρc from Cryogenic (5 K) to Room TemperatureGerui Zheng, Yuxuan Wang, Haiwen Xu, Rami Khazaka, Lutz Muehlenbein, Sheng Luo, Xuanqi Chen, Rui Shao, Zijie Zheng, Gengchiau Liang, Xiao Gong. 1-2 [doi]
• How Harsh is Space?-Equations That Connect Space and Ground VLSIDaisuke Kobayashi, Kazuyuki Hirose. 1-2 [doi]
• A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary ComputingYang Wang, Yubin Qin, Dazheng Deng, Xiaolong Yang, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Leibo Liu, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 1-2 [doi]
• A 24-OSR to Simplify Anti-Aliasing Filter 2MHz-BW 83dB-DR 3rd-order DT-DSM using FIA-Based Integrator and Noise-Shaping SAR Combined Digital Noise-Coupling QuantizerMitsuya Fukazawa, Tetsuo Matsui. 1-2 [doi]
• Doping-Optimized Back-illuminated Single-Photon Avalanche Diode in Stacked 40 nm CIS Technology Achieving 60% PDP at 905 nmEunsung Park, Won Yong Ha, Doyoon Eom, Dae-Hwan Ahn, Hyuk An, Suhyun Yi, Kyung-Do Kim, Jongchae Kim, Woo-Young Choi, Myung-Jae Lee. 1-2 [doi]
• Ongoing Evolution of DRAM Scaling via Third Dimension -Vertically Stacked DRAM -Jung-Won Han, S. H. Park, M. Y. Jeong, K.-S. Lee, K. N. Kim, H.-J. Kim, J. C. Shin, S. M. Park, S. H. Shin, S. W. Park, K.-S. Lee, J. H. Lee, S. H. Kim, B. C. Kim, M. H. Jung, I. Y. Yoon, H. Kim, S. U. Jang, K. J. Park, Y. K. Kim, I. G. Kim, J. H. Oh, S. Y. Han, B. S. Kim, B. J. Kuh, J. M. Park. 1-2 [doi]
• Nano-Through Silicon Vias (nTSV) for Backside Power Delivery Networks (BSPDN)Eric Beyne, Anne Jourdain, Gerald Beyer. 1-2 [doi]
• A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET TechnologyJeongkyun Kim, Byungho Yook, Taemin Choi, Kyuwon Choi, Chanho Lee, Yunrong Li, Youngo Lee, Seok Yun, Changhoon Do, Hoyoung Tang, Inhak Lee, Dongwook Seo, Sangyeop Baeck. 1-2 [doi]
• A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge DevicesTai-Hao Wen, Je-Min Hung, Hung-Hsi Hsu, Yuan Wu, Fu-Chun Chang, Chung-Yuan Li, Chih-Han Chien, Chin-I Su, Win-San Khwa, Jui-Jen Wu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Mon-Shu Ho, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang. 1-2 [doi]
• 2 (7440, 6696) NB-LDPC Decoder over GF(32) using Memory-Reduced Column-Wise Trellis Min-Max Algorithm in 28nm CMOS TechnologyJeongwon Choe, Youngjoo Lee. 1-2 [doi]
• 2 12ENOB 7nm CMOS cyclic ADC with 1.5bit passive amplification stage and dynamic capacitance scalingTakashi Oshima, Keisuke Yamamoto, Goichi Ono. 1-2 [doi]
• 3) Ferroelectric Tunnel JunctionJunghyeon Hwang, Chaeheon Kim, Hunbeom Shin, Hwayoung Kim, Sang-Hee Ko Park, Sanghun Jeon. 1-2 [doi]
• 3D Stackable Vertical Ferroelectric Tunneling Junction (V-FTJ) with on/off Ratio 1500x, Applicable Cell Current, Self-Rectifying Ratio 1000x, Robust Endurance of 10⁹ Cycles, Multilevel and Demonstrated Macro Operation Toward High-Density BEOL NVMsJ. Y. Lee, F. S. Chang, K.-Y. Hsiang, P. H. Chen, Z.-F. Luo, Z. X. Li, J. H. Tsai, C. W. Liu, M. H. Lee. 1-2 [doi]
• 16-layer 3D Vertical RRAM with Low Read Latency (18ns), High Nonlinearity (>5000) and Ultra-low Leakage Current (~pA) Self-Selective CellsYaxin Ding, Jianguo Yang, Yu Liu, Jianfeng Gao, Yuan Wang, Pengfei Jiang, Shuxian Lv, Yuting Chen, Boping Wang, Wei Wei, Tiancheng Gong, Kanhao Xue, Qing Luo, Xiangshui Miao, Ming Liu. 1-2 [doi]
• Intel PowerVia Technology: Backside Power Delivery for High Density and High-Performance ComputingWalid M. Hafez, P. Agnihotri, M. Asoro, M. Aykol, B. Bains, R. Bambery, M. Bapna, A. Barik, A. Chatterjee, P. C. Chiu, T. Chu, C. Firby, K. Fischer, M. Fradkin, Hannes Greve, A. Gupta, E. Haralson, M. Haran, Jeffery Hicks, A. Illa, M. Jang, S. Klopcic, M. Kobrinsky, B. Kuns, H.-h. Lai, G. Lanni, S.-H. Lee, N. Lindert, C. L. Lo, Y. Luo, G. Malyavanatham, B. Marinkovic, Y. Maymon, M. Nabors, J. Neirynck, P. Packan, A. Paliwal, L. Pantisano, Leif Paulson, Padma Penmatsa, Chetan Prasad, C. Puls, T. Rahman, R. Ramaswamy, S. Samant, B. Sell, K. Sethi, F. Shah, M. Shamanna, K. Shang, Q. Li, M. Sibakoti, J. Stoeger, N. Strutt, R. Thirugnanasambandam, C. Tsai, X. Wang, A. Wang, S. J. Wu, Q. Xu, X.-h. Zhong, S. Natarajan. 1-2 [doi]
• Visual Content-Agnostic Novelty Detection Engine with 2.4 pJ/pixel Energy and Two-Order of Magnitude DNN Activity Reduction in 40 nmAnimesh Gupta, Sayan Kumar, Viveka Konandur Rajanna, Sachin Taneja, Massimo Alioto. 1-2 [doi]
• -7 μA/μm, DIBL =44mV/V, Positive VT, and Process Temp. of 300 °CJih-Chao Chiu, Eknath Sarkar, Yuan-Ming Liu, Yu-Ciao Chen, Yu-Cheng Fan, C. W. Liu. 1-2 [doi]
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• 9 Endurance, and 58.3% Area SavingXiaolin Wang, Zijie Zheng, Qiwen Kong, Leming Jiao, Kaizhen Han, Chen Sun, Zuopu Zhou, Long Liu, Yuye Kang, Gan Liu, Dong Zhang, Xiao Gong. 1-2 [doi]
• A Monolithic Amorphous-Selenium/CMOS Small-Pixel-Effect-Enhanced X-Ray-Energy-Discriminating Quantum-Counting Pixel for Biomedical ImagingReza Mohammadi, Peter M. Levine, Karim S. Karim. 1-2 [doi]