Toshiro Hiramoto - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 33 from 33

2025

A Study on the Origin of MOSFET Random Telegraph Noise Under Strong Inversion at Cryogenic TemperaturesKiyoshi Takeuchi, Tomoko Mizutani, Takuya Saraya, Hiroshi Oka, Takahiro Mori, Shinichi Takagi, Masaharu Kobayashi, Toshiro Hiramoto. irps 2025: 1-6 [doi]

2024

2023

A Nanosheet Oxide Semiconductor FET Using ALD InGaOx Channel and InSnOx Electrode with Normally-off Operation, High Mobility and Reliability for 3D Integrated DevicesKaito Hikake, Zhuo Li, Junxiang Hao, Chitra Pandy, Takuya Saraya, Toshiro Hiramoto, Takanori Takahashi, Mutsunori Uenuma, Yukiharu Uraoka, Masaharu Kobayashi. vlsit 2023: 1-2 [doi]

2022

3-Layer stacked pixel-parallel CMOS image sensors using hybrid bonding of SOI wafersMasahide Goto, Yuki Honda, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto. ei-iss 2022: 1-4 [doi]

2021

Recent Progress of Double/Dual-Gate Silicon IGBT TechnologiesToshiro Hiramoto, Takuya Saraya. asicon 2021: 1-4 [doi]

2020

An Architectural Study for Inference Coprocessor Core at the Edge in IoT SensingDaisuke Watanabe, Yuji Yano, Shintaro Izumi, Hiroshi Kawaguchi, Kiyoshi Takeuchi, Toshiro Hiramoto, Shoichi Iwai, Masami Murakata, Masahiko Yoshimoto. aicas 2020: 305-309 [doi]

2019

Triple-Layering Technology for Pixel-Parallel CMOS Image Sensors Developed by Hybrid Bonding of SOI WafersMasahide Goto, Joeri De Vos, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Eiji Higurashi, Yuki Honda, Takuya Saraya, Masaharu Kobayashi, Hiroshi Toshiyoshi, Toshiro Hiramoto. 3dic 2019: 1-4 [doi]

Comprehensive Understanding of Negative Capacitance FET From the Perspective of Transient Ferroelectric ModelMasaharu Kobayashi, Chengji Jin, Toshiro Hiramoto. asicon 2019: 1-4 [doi]

Scalability Study on Ferroelectric-HfO2 Tunnel Junction Memory Based on Non-equilibrium Green Function MethodFei Mo, Yusaku Tagawa, Takuya Saraya, Toshiro Hiramoto, Masaharu Kobayashi. nvmts 2019: 1-5 [doi]

2018

Quarter Video Graphics Array Full-Digital Image Sensing with Wide Dynamic Range and Linear Output Using Pixel-Wise 3D IntegrationMasahide Goto, Yuki Honda, Toshihisa Watabe, Kei Hagiwara, Masakazu Nanba, Yoshinori Iguchi, Takuya Saraya, Masaharu Kobayashi, Eiji Higurashi, Hiroshi Toshiyoshi, Toshiro Hiramoto. iscas 2018: 1-4 [doi]

2017

2015

2013

2011

Ultra-low-voltage operation: device perspectiveToshiro Hiramoto. islped 2010: 59-60 [doi]

Statistical advantages of intrinsic channel fully depleted SOI MOSFETs over bulk MOSFETsToshiro Hiramoto, Anil Kumar, Tomoko Mizutani, Jun Nishimura, Takuya Saraya. cicc 2011: 1-4 [doi]

2010

2007

Device Design of Nanoscale MOSFETs Considering the Suppression of Short Channel Effects and Characteristics VariationsToshiro Hiramoto, Toshiharu Nagumo, Tetsu Ohtou, Kouki Yokoyama. ieicet, 90-C(4):836-841, 2007. [doi]

2006

Emerging nanoscale silicon devices taking advantage of nanostructure physicsToshiro Hiramoto, Masumi Saitoh, Gen Tsutsui. ibmrd, 50(4-5):411-418, 2006. [doi]

2001

Variable threshold CMOS (VTCMOS) in series connected circuitsTakashi Inukai, Toshiro Hiramoto, Takayasu Sakurai. islped 2001: 201-206 [doi]

2000

Boosted gate MOS (BGMOS): device/circuit cooperation scheme to achieve leakage-free giga-scale integrationTakashi Inukai, Makoto Takamiya, Kouichi Nose, Hiroshi Kawaguchi, Toshiro Hiramoto, Takayasu Sakurai. cicc 2000: 409-412 [doi]

1994

1992

Sign in or sign up to see more results.

runs on WebDSL