Table of Contents

• Keynote speech: Data converters for mobile and autonomous applicationsFranco Maloberti. [doi]
• Tutorial sessions: Electrostatic discharge protection of consumer electronics: Challenges and solutionsJ. J. Liou. [doi]
• High speed negative capacitance ferroelectric memoryChun-Yen Chang, Chia-Chi Fan, Chien Liu, Yu-Chien Chiu, Chun-Hu Cheng. 1-5 [doi]
• Development trends of embedded NVM technologyTianShen Tang, Hao Ni, Zijian Zhao, Yao Zhou. 6-11 [doi]
• 1T2R: A novel memory cell design to resolve single-event upset in RRAM arraysAmr M. S. Tosson, Shimeng Yu, Mohab H. Anis, Lan Wei. 12-15 [doi]
• ReRAM write circuit with dynamic uniform and small overshoot compliance current under PVT variationsYun Yin, Junlin Gou, Junyi Wang, Yarong Fu, Xiaoyong Xue, Yinyin Lin. 16-19 [doi]
• An efficient parity rearrangement coding scheme for RRAM thermal crosstalk effectsYun Li, Haihua Shen, Ce Li, Feng Zhang. 20-23 [doi]
• SAR+ΔΣ ADC with open-loop integrator using dynamic amplifierAkira Matsuzawa, Masaya Miyahara. 24-27 [doi]
• A 0.87 mW 7MHz-BW 76dB-SNDR passive noise-shaping modulator based on a SAR ADCZhiyuan Dai, Hang Hu, Manxin Li, Fan Ye 0001, Junyan Ren. 28-31 [doi]
• A 13-bit non-binary weighted SAR ADC with bridge structure using digital calibration for capacitor weight errorXiaoqing Chen, Fan Ye 0001, Junyan Ren. 32-35 [doi]
• Auxiliary testability design schemes for CMOS DACs with ultrahigh sampling ratesBao Li, Long Zhao, Yuhua Cheng. 36-39 [doi]
• A 101 dB SNDR 3.7mW switched-capacitor ΣΔ ADC using tri-level quantizationYumei Ma, Mengfei Ji, Yuping Guo, Yuchun Chang. 40-43 [doi]
• A highly linear voltage-to-time converter with variable conversion gain for time-based ADCsYan Ye, Weili Han, Haiyue Yan, Fujiang Lin. 44-47 [doi]
• An on-chip signal conditioning delta-sigma ADC for micro-mechanical gyroscope applicationsYongsheng Wang, Yang Liu, Xunzhi Zhou, Anyi Wang, Bei Cao, Fengchang Lai. 48-51 [doi]
• Soft error tolerant latch designs with low power consumption (invited paper)Saki Tajima, Nozomu Togawa, Masao Yanagisawa, Youhua Shi. 52-55 [doi]
• How close to the CMOS voltage scaling limit for FinFET technology? - Near-threshold computing and stochastic computingRunsheng Wang, Xiaobo Jiang, Shaofeng Guo, Ru Huang. 56-59 [doi]
• A highly reliable lightweight PUF circuit with temperature and voltage compensated for secure chip identificationGang Li, Pengjun Wang, Yuejun Zhang. 60-63 [doi]
• Floorplan-driven high-level synthesis using volatile/non-volatile registers for hybrid energy-harvesting systemsDaiki Asai, Masao Yanagisawa, Nozomu Togawa. 64-67 [doi]
• An all-n-type dynamic adder for ultra-low-leakage IoT devicesYa-Bei Fang, Pei-Yuan Chou, Bo-Hao Chen, Tay-Jyi Lin, Jinn-Shyan Wang. 68-71 [doi]
• A new error masking flip-flop with one cycle correction penaltyZhenqiang Yong, Xiaoyan Xiang, Chen Chen, Jianyi Meng. 72-75 [doi]
• Fast two-dimensional finite element analysis for power network DC integrity checks of PCBsWei He, Hengyang Zhao, Zhongdong Qi, Hai-Bao Chen, Sheldon X.-D. Tan. 76-79 [doi]
• Overview of high-efficiency ant colony optimization (ACO)-based adaptive routings for traffic balancing in network-on-chip systemsEn-Jui Chang, An-Yeu Wu. 80-83 [doi]
• Cut redistribution and DSA template assignment for unidirectional designYe Huang, Xingquan Li, Wenxing Zhu, Jianli Chen. 84-87 [doi]
• A novel layout automation flow to facilitate test chip design for standard cell characterizationLudan Yang, Weiwei Pan, Zheng Shi, Yongjun Zheng. 88-91 [doi]
• Dynamic temperature-aware reliability modeling for multi-branch interconnect treesJiangtao Peng, Hai-Bao Chen, Hengyang Zhao, Zeyu Sun, Sheldon X.-D. Tan. 92-95 [doi]
• Integer linear programming based fault-tolerant topology synthesis for application-specific NoCZhigang Li, Jinglei Huang, Qi Xu, Song Chen. 96-99 [doi]
• Wideband power amplifier predistortion: Trends, challenges and solutionsPatricia Desgreys, Venkata Narasimha Manyam, Kelly Tchambake, Dang-Kièn Germain Pham, Chadi Jabbour. 100-103 [doi]
• A LTE digital mixer with 25% duty quadrature 4-phase clocksHaijun Shao, Dan Fan, Pan Xue, Hongguang Zhang, Yilei Shen, Yumei Huang, Gan Guo, Zhiliang Hong. 104-107 [doi]
• A CMOS transceiver RFIC for China geo-radio standardZhao Wang, Dihu Chen, Jianping Guo. 108-111 [doi]
• Design trends in smart gate driver ICs for power MOSFETs and IGBTsJ. Chen, W. T. Ng. 112-115 [doi]
• Analysis and characterization of process/layout impacts on the performance of high-speed analog circuitsLong Zhao, Feng Zou, Josh Yang, TianShen Tang, Yuhua Cheng. 116-119 [doi]
• A 0.18 μ m high-voltage area efficient integrated gate driver for piston engine fuel injection control SoCQinmiao Kang, Zhifeng Xie, Yongquan Liu, Ming Zhou. 120-123 [doi]
• An output-capacitor-less low-dropout regulator with transient-improved techniqueXin Liu, Yu Liu, Yanbin Xiao, Xiaohua Fan, Haiying Zhang. 124-127 [doi]
• A high-efficiency class e power amplifier with integrated finite DC feed inductanceHaobo Ruan, Tingyuan Yan, Yumei Huang. 128-131 [doi]
• A low-offset dynamic comparator with input offset-cancellationRuihan Pei, Jia Liu, Xian Tang, Fule Li, Zhihua Wang. 132-135 [doi]
• Cooptimization of emerging devices and architectures for energy-efficient computingAn Chen. 136-139 [doi]
• Challenges of emerging memory and memristor based circuits: Nonvolatile logics, IoT security, deep learning and neuromorphic computingChunmeng Dou, Wei-Hao Chen, Yi-Ju Chen, Huan-Ting Lin, Wei-Yu Lin, Mon-Shu Ho, Meng-Fan Chang. 140-143 [doi]
• Switching dynamics and computing applications of memristors: An overviewQingxi Duan, Teng Zhang, Minghui Yin, Caidie Cheng, Liying Xu, Yuchao Yang, Ru Huang. 144-147 [doi]
• A low bit-width parameter representation method for hardware-oriented convolution neural networksQiang Chen, Chen Xin, Chenglong Zou, Xin'an Wang, Bo Wang. 148-151 [doi]
• High-speed FPGA implementation of orthogonal matching pursuit for analog to information converterSujuan Liu, Ning Lyu, Zisheng Wang. 152-155 [doi]
• Looking back and forward: The execution dilemma and the importance of innovation in the semiconductor industryDomenico Rossi. 156-159 [doi]
• Development and characterization of TaN thin film resistor with CMOS compatible fabrication processXiaoxu Kang, Limin Zhu, Xingwang Zhu, Qingyun Zuo, Xiaolan Zhong, Shoumian Chen, Yuhang Zhao, Shanshan Liu, Hanwei Lu, Jianmin Wang, Wei Wang, Bo Zhang. 160-162 [doi]
• Vertical power diodes based on bulk GaN substratesLiang Zheng, Lin-Jie Yu, Lin Chen, Qing-Qing Sun, Wei Huang, Hao Zhu, David Wei Zhang. 163-166 [doi]
• A harmonic-free cell-based all-digital delay-locked loop for die-to-die clock synchronization of 3-D ICTailong Xu, Feng Xue, Zhikuang Cai, Xinning Liu, Shuo Meng. 167-170 [doi]
• A 76μW, 58-dB SNDR analog front-end chip for implantable intraocular pressure detectionCheng-Ying Chen, Li Ming Chen, Xinghua Wang, Feng Zhang. 171-174 [doi]
• Design of a voltage-tunable pre-emphasis circuit utilizing a pseudo-differential cascode architectureWenhui Li, Awei Zhang, Weiwei Chen. 175-178 [doi]
• A 320MS/s 7-b flash-SAR ADC with preamplifier sharing techniqueHang Hu, Zhiyuan Dai, Manxin Li, Fan Ye 0001, Junyan Ren. 179-182 [doi]
• A gain factor controlled SUMPLE algorithm and systemLeiou Wang, Donghui Wang. 183-186 [doi]
• A 1.0-7.0 GHz inductorless RF mixer with multiple feedback and active load in 40-nm CMOSXu Yan, Lu Yang, Hao Zhang, Jili Zhang, Fujiang Lin. 187-190 [doi]
• Research of a reconfigurable coarse-grained cryptographic processing unit based on different operation similar structureLongmei Nan, Xiaoyang Zeng, Zhouchuang Wang, Yiran Du, Wei Li. 191-194 [doi]
• A novel vertical semi-floating gate transistor for high-density ultrafast memoryZheng-Yuan Su, Jun Wu, Yao Yao, Min-Zhi Lin, Zhi-Yuan Ye, Peng-fei Wang. 195-198 [doi]
• A novel programmable pulse-broadening time amplifier controlled by node capacitanceJiangtao Gu, Bo Wang, Chao Zhang, Tingbing Ouyang, Lizhao Gao. 199-202 [doi]
• Atomic layer deposited Hf0.5Zr0.5O2-based flexible RRAMTian-Yu Wang, Lin-Jie Yu, Lin Chen, Hao Liu, Hao Zhu, Qing-Qing Sun, Shi-Jin Ding, Peng Zhou, David Wei Zhang. 203-206 [doi]
• Design of a novel ternary SRAM sense amplifier using CNFETZizhao Liu, Tao Pan, Song Jia, Uan Wang. 207-210 [doi]
• A neural network circuit with associative learning and forgetting process based on memristor neuromorphic deviceXiaoqiang Lv, YiMao Cai, Yuchao Yang, Zhizhen Yu, Yichen Fang, Zongwei Wang, Lindong Wu, Jianfeng Liu, Wanrong Zhang, Ru Huang. 211-214 [doi]
• A 40V monolithic ultrasonic motor driverPing Luo, Kangle Wang, Shuangjie Qiu, Zelang Liu, Long Huang. 215-218 [doi]
• Roles of the gate length and width of the transistors in increasing the single event upset resistance of SRAM cellsZhongshan Zheng, Zhentao Li, Gengsheng Chen, Jiajun Luo, Zhengsheng Han. 219-221 [doi]
• Low-cost resilient radiation hardened flip-flop designLiyi Xiao, Chunhua Qi, Tianqi Wang, Hongchen Li, Jiaqiang Li. 222-225 [doi]
• Heterogeneous computing for CNNHuizi Zhang, Chang Wu, Xiao Hu. 226-229 [doi]
• Optimization of operational amplifier settling time by adjusting secondary poles based on gm/ID designJun Qiao, Xiao Wang, Yaohong Zhao. 230-232 [doi]
• Residual stress study of thin films deposited by atomic layer depositionZhen Zhu, Emma Salmi, Sauli Virtanen. 233-236 [doi]
• A fully pipelined hardware architecture for convolutional neural network with low memory usage and DRAM bandwidthZhiwei Li, Yan Li, Song Chen, Feng Wu. 237-240 [doi]
• A radiation hardened low-noise voltage-controlled-oscillator using negative feedback based multipath- current-releasing technologyHengzhou Yuan, Jianjun Chen, Bin Liang, Yang Guo. 241-244 [doi]
• A stacked-packaged 16-channel ADC for ultrasound applicationYimin Wu, Yongzhen Chen, Manxin Li, Fan Ye 0001, Junyan Ren. 245-248 [doi]
• Analytical models for channel potential and drain current in AlGaN/GaN HEMT devicesHaisheng Qian, Guangxi Hu, Laigui Hu, Xing Zhou, Ran Liu 0001, Li-Rong Zheng. 249-251 [doi]
• An efficient HMAC processor based on the SHA-3 HASH functionJunhui Li, Liji Wu, Xiangmin Zhang. 252-255 [doi]
• An improved equivalent circuit model for antenna: Modeling and parameter extractionHansheng Wang, Minghui Zhang, Weiliang He, Lu Tang, Bin Jiang. 256-258 [doi]
• Parallel sparse LU decomposition using FPGA with an efficient cache architectureXiang Ge, Hengliang Zhu, Fan Yang 0001, Lingli Wang, Xuan Zeng 0001. 259-262 [doi]
• Study of 64-bit booth asynchronous multiplier based on FPGAXiaoqing Liu, Anping He, Caihong Li, Guangbo Feng, Jilin Zhang. 263-266 [doi]
• A 20MHz CTIA ROIC for InGaAs focal plane arrayLiang Li, Ruizhi Sun, Ruoxi Wang, Fanjun Zang, Tao Jiang, Yang Li, Xinyang Wang, Yuchun Chang. 267-270 [doi]
• Memristor-based material implication logic design for full addersMengting Li, Wenhao Sun, Zhimin Lu, Song Chen, Feng Wu. 271-274 [doi]
• A synchronous charge extraction piezoelectric energy harvesting circuit based on precision active control peak detection with supplement energyXiudeng Wang, Xiaojing Zha, Yonggen Tu, Shi Ge, Yidie Ye, Yinshui Xia. 275-278 [doi]
• Implementation and optimization of A5-1 algorithm on coarse-grained reconfigurable cryptographic logic arrayMin Liu, Ying Jian Yan, Wei Li. 279-282 [doi]
• Improving DFA on AES using all-fault ciphertextsYewen Ni, Xiaoxin Cui, Tian Wang, Yuanning Fan, Qiankun Han, Kefei Liu, Xiaole Cui. 283-286 [doi]
• Application space exploration of a multi-fabric reconfigurable systemFan Feng, Li Li, Kun Wang, Feng Han, Hongbing Pan, Wei Li. 287-290 [doi]
• A noise-shaping SAR ADC with dual error-feedback paths and alternate DACsJiaqi Yang, Jili Zhang, Xuefei Bai, Fujiang Lin. 291-294 [doi]
• A background time-skew calibration technique in flash-assisted time-interleaved SAR ADCsYongzhen Chen, Yimin Wu, Fubiao Cao, Fan Ye 0001, Junyan Ren. 295-298 [doi]
• Influence of heat source size on thermal resistance of AlGaN/GaN HEMTChunsheng Guo, Ju Meng, Zhiheng Liao, Shiwei Feng, Xun Wang, Lin Luo. 299-302 [doi]
• An optimized topology reconfiguration bidirectional searching fault-tolerant algorithm for REmesh network-on-chipFang-Fa Fu, Na Niu, Xiao-He Xian, Jin-Xiang Wang, Feng-chang Lai. 303-306 [doi]
• A 1.0-to-2.4GHz wideband VCO with uniform sub-band interval and constant tuning gainChenyang Kong, Xiaodong Liu, Weigang Xu, Zhangwen Tang. 307-310 [doi]
• A low cost and high speed CSD-based symmetric transpose block FIR implementationJinghao Ye, Youhua Shi, Nozomu Togawa, Masao Yanagisawa. 311-314 [doi]
• FPGA-based efficient implementation of SURF algorithmYing Zhang, Yujie Huang, Jun Han, Xiaoyang Zeng. 315-318 [doi]
• A configurable nonlinear operation unit for neural network acceleratorYujie Cai, Xin Li, Jun Han, Xiaoyang Zeng. 319-322 [doi]
• A deep research on the chip verification platform based on networkChuanliang Kang, Pei Yang, Jian Wang, Jinmei Lai. 323-326 [doi]
• A new countermeasure against side channel attack for HMAC-SM3 hardwareJia-Wei Ma, Xuguang Guan, Tong Zhou, Tao Sun. 327-330 [doi]
• A fully-pipelined hash table achieving low-latency and high throughput key-value retrieving systemLi Ding, Wenbo Yin. 331-334 [doi]
• A low input power charge pump for passive UHF RFID applicationsDongsheng Liu, Jiao Wang, Xiangcheng Sun, Jin Yan, Hi Lin. 335-338 [doi]
• A state recovery design against single-event transient in high-speed phase interpolation clock and data recovery circuitJia-wei Tan, Yang Guo, Jianjun Chen, Hengzhou Yuan, Xi Chen. 339-342 [doi]
• Graphite planar resistive switching memory and its application in pattern recognitionLin-Jie Yu, Tian-Yu Wang, Lin Chen, Hao Zhu, Qing-Qing Sun, Shi-Jin Ding, Peng Zhou, David Wei Zhang. 343-346 [doi]
• A method to speed up VLSI hierarchical physical design in floorplanningYanling Zhou, Yunyao Yan, Wei Yan. 347-350 [doi]
• Power optimization based on dual-logic using And-Xor-Inverter GraphXuejiao Ma, Yinshui Xia. 351-354 [doi]
• PSR-enhanced low-dropout regulator using feedforward supply noise rejection techniqueXin-ming, Xuan Zhang, Di Gao, Jia-Hao Zhang, Bo Zhang. 355-358 [doi]
• A fast and accurate fault injection platform for SRAM-based FPGAsRongsheng Zhang, Liyi Xiao, Jie Li. 359-362 [doi]
• A method to estimate cross-section of circuits at RTL levelsLiyi Xiao, Anlong Li, Xuebing Cao, Hongchen Li, Rongsheng Zhang, Jie Li, Tianqi Wang. 363-366 [doi]
• A low gain error two-stage dB-linear variable gain amplifier in 0.35μm CMOS processYongsheng Wang, Xinzhi Li, Zhixin Zhang, Fengchang Lai. 367-370 [doi]
• Low frequency noise characteristics in p-Type MOSFET with multilayer WSe2 channel and Al2O3 back gate dielectricHui Shen, Huiwen Yuan, Sitong Bu, Mingyue He, Daming Huang. 371-374 [doi]
• Design of ternary pulsed reversible counter based on CNFETYaopeng Kang, Pengjun Wang, Yuejun Zhang, Gang Li. 375-378 [doi]
• Delay and area optimization for FPRM circuits based on MSPSO algorithmMingbo Wang, Pengjun Wang, Qiang Fu, Huihong Zhang. 379-382 [doi]
• The write deduplication mechanism based on a novel low-power data latched sense amplifier for a magnetic tunnel junction based non-volatile memoryBaofa Huang, Ningyuan Yin, Zhiyi Yu. 383-386 [doi]
• Implementation of an energy-efficient digital baseband controller compatible with EPC Class-1 Gen-2 standardDongsheng Liu, Xiangcheng Sun, Jiao Wang, Fan Kang. 387-390 [doi]
• LMS-FIR based digital background calibration for the four-channel time-interleaved ADCYongsheng Wang, Shanshan Li, Ruoyang Wang, Xiaowei Liu. 391-394 [doi]
• Optimization of the amplifier's input-referred noise for high resolution comparatorsQichao He, Xiong Zhou, Qiang Li. 395-397 [doi]
• A self-powered supply circuit for switching mode power supplyYue Shi, Hongming Yu, Zekun Zhou. 398-401 [doi]
• Remote embedded simulation system for SW/HW co-design based on dynamic partial reconfigurationJiaqi Gu, Ruoyao Wang, Jian Wang, Jinmei Lai, Qinghua Duan. 402-405 [doi]
• A 0.07-ppm/step differential digitally controlled crystal oscillator with guaranteed monotonicityXiaodong Liu, Chenyang Kong, YiFan Gao, Zhangwen Tang. 406-409 [doi]
• The configurable current flattening circuit for DPA countermeasuresYong Gu, Xuguang Guan, Tong Zhou. 410-413 [doi]
• A cluster-scalable VLIW cryptography processor with high performance and energy efficiencyWei Huang, Zhonghe Guo, Xiaohua Song, Fei Sun. 414-417 [doi]
• Parallel nonvolatile programming of power-up states of SRAM cellsToshiro Hiramoto, Tomoko Mizutani, Kiyoshi Takeuchi, Masaharu Kobayashi. 418-421 [doi]
• Phase-change materials and memory devices for IoT applicationYou Yin. 422-425 [doi]
• A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby powerFujun Bai, Baoyu Xiong, Xiaofei Xue, Weizhe Song, Baofeng Wu, Ni Fu, Bing Yu, Huifu Duan, Xiaowei Han, Alessandro Minzoni, Qiwei Ren. 426-428 [doi]
• A 55nm logic process compatible p-flash memory array fully demonstrated with high reliabilityJinghui Han, Yao Zhou, Hao Ni, Xiao Zheng, Yi Zhao. 429-432 [doi]
• Graphene nanodots with high-k dielectrics for flash memory applicationsKai-Ping Chang, Han-Hsiang Tai, Jer-Chyi Wang, Chao Sung Lai. 433-435 [doi]
• The next-generation brain machine interface system for neuroscience research and neuroprosthetics developmentJan Van der Spiegel, Milin Zhang, Xilin Liu. 436-439 [doi]
• System architecture of a smart binaural hearing aid using a mobile computing platformYingdan Li, Fei Chen, Zhuoyi Sun, Zhaoyang Weng, Xian Tang, Hanjun Jiang, Zhihua Wang. 440-443 [doi]
• An area efficient low power ECoG front-end chip for digitalized subdural gridChenjie Dong, Han Jin, Ikhwan Kim, Chenyu Wang, Yajie Qin, Lirong Zheng. 444-447 [doi]
• A 20Mbps 5.8mw QPSK transmitter based on injection locking and Class-E PA for wireless biomedical applicationsYaxiong Lei, Xinpeng Xing, Haigang Feng, Zhihua Wang. 448-451 [doi]
• A 0.5 V 60 nW fully-differential log-domain band-pass filter with tunable cutoff frequency for biosensor applicationsJinyong Zhang, Shing-Chow Chan, Hui Li, Lei Wang. 452-455 [doi]
• A 110-dBΩ, 113-MHz variable-gain transimpedance amplifier for flash 3D imaging systemsLei Yang, Shaowei Zhen, Jiongwei Zheng, Shuiqing Xi, Xinjiang Gao, Zengxin Liu, He Tang, Ping Luo, Bo Zhang. 456-459 [doi]
• An outlier detection method and its application to multicore-chip power estimationYaguang Li, Pingqiang Zhou. 460-463 [doi]
• Energy-efficient standby current suppression with bootstrapped power-gating techniqueYingchieh Ho, Chen Hsu. 464-467 [doi]
• Ultralow power loss integratable high-voltage MOSFETsXiaorong Luo, Weiwei Ge, Bo Zhang. 468-471 [doi]
• Optical computing on silicon-on-insulator-based photonic integrated circuitsZheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan. 472-475 [doi]
• A universal approach for signal dependent circuit reliability simulationLining Zhang, Chenyue Ma, Mansun Chan. 476-479 [doi]
• Analysis of sub-threshold electron transport properties of ultra-scaled amorphous phase change material germanium telluride (invited paper)Jie Liu, M. P. Anantram, Xu Xu, Jiwu Lu. 480-483 [doi]
• An on-line debug method for FPGAsYipeng Yuan, Zhihua Feng, Xuegong Zhou. 484-487 [doi]
• DTCO through design space exploration by the virtual FAB range pattern matching flowLiang Zhu, Yida Xie, Zhibo Ai. 488-491 [doi]
• Design and automatic generation of area-efficient ring oscillator based addressable test chipsXiaoxin Dou, Weiwei Pan, Zheng Shi, Yongjun Zheng. 492-495 [doi]
• Synthesis and optimization of asynchronous dual rail encoded circuits based on partial acknowledgementYu Zhou, Chun Shi, Zhengjie Deng, Alex Yakovlev. 496-503 [doi]
• Design of a closed-loop, bi-directional brain-machine-interface integrated on-chip spike sortingTing Ou, Deng Luo, Yuwei Zhang, Yiqiao Liao, Chang Cheng, Milin Zhang, Chun Zhang, Zhihua Wang, Xiang Xie. 504-507 [doi]
• A fully differential high efficient ASK demodulator for biomedical implantable applicationJie Zhou, Xi Chen, Tianzhun Wu, Guoxing Wang. 508-511 [doi]
• Refractory epilepsy: Localization, detection, and predictionElie Bou Assi, Dank Khoa Nguyen, Sandy Rihana, Mohamad Sawan. 512-515 [doi]
• Low power FIR filter design for wearable devices using frequency response masking techniqueZhongxia Shang, Yang Zhao, Yong Lian. 516-519 [doi]
• A new short-channel-effect-degraded subthreshold behavior model for elliptical gate-all-around MOSFETTe-Kuang Chiang, Ying-Wen Ko, Hong-Wun Gao, Yeong-Her Wang. 520-524 [doi]
• High-order curvature-compensated CMOS bandgap voltage referenceQianneng Zhou, Feihong Cheng, Hongjuan Li, Kai Yan, Wei Luo. 525-528 [doi]
• A 3.7ppm/°C piece-wise compensated bandgap referenceQuanwang Liu, Bo Zhang, Shaowei Zhen, Weidong Xue. 529-532 [doi]
• Low-power and high-frequency ring oscillator design in 65nm CMOS technologyChi-Hsien Yen, Mehdi Nasrollahpour, Sotoudeh Hamedi-Hagh. 533-536 [doi]
• Design of 56 Gb/s PAM4 wire-line receiver with ring VCO based CDR in a 65 nm CMOS technologyFangxu Lv, Jianye Wang, Dengjie Wang, Yongcong Liu, Ziqiang Wang. 537-540 [doi]
• A new all-in-one bandgap reference and robust zero temperature coefficient (TC) point current reference circuitYan Chen, Xiaoling Tan, Boling Yu, Chunxia Li, Yan Guo. 541-544 [doi]
• A 2.4GHz T/R switch with ESD protection for WLAN 802.11 b/g/n applicationsJijian Shi, Tingting Mo. 545-548 [doi]
• Fundamental design tradeoff and performance limitation of electronic circuits based on uncertainty relationshipsHaruo Kobayashi, Isao Shimizu, Nobukazu Tsukiji, Miho Arai, Kazuyoshi Kubo, Hitoshi Aoki. 549-552 [doi]
• Stochastic computing implementation of trigonometric and hyperbolic functionsLian Huai, Peng Li, Gerald E. Sobelman, David J. Lilja. 553-556 [doi]
• A novel adaptive general current drive circuitYujie Chen, Ning Mei Yu, He Jiu Zhang, Keren Li, Nan Lyu. 557-560 [doi]
• 2 arithmetic acceleration based on modified Barrett modular multiplication algorithmYalong Pang, Ying Zhang, Jun Han, Xiaoyang Zeng. 561-564 [doi]
• IZIP: In-place zero overhead interconnect protection via PIP redundancyYi Luo, Adrian Evans, Shi-Jie Wen, Rick Wong, Gengsheng Chen. 565-568 [doi]
• An on-chip circuit for timing measurement of SRAM IPXianjie Long, Qin Wang, Jian-Fei Jiang, Nin Guan. 569-572 [doi]
• Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOSChoonghyun Lee, Richard G. Southwick, Shogo Mochizuki, Paul Jamison, Ruqiang Bao, Rajan Pandey, Aniruddha Konar, Takashi Ando, Vijay Narayanan, Bala Haran, Hemanth Jagannathan. 573-576 [doi]
• Performance improvement of InGaAs FinFET using NH3 treatmentEdward Yi Chang, Quang-Ho Luc, Huy-Binh Do, Yueh-Chin Lin. 577-579 [doi]
• Layer thinning of MoS2 flakes by thermal annealing in airQiyuan Wang, Youwei Zhang, Chunxiao Cong, Laigui Hu, Pengfei Tian, Ran Liu 0001, Zhi-Jun Qiu. 580-583 [doi]
• Dynamic characteristics and related trapping effects of GaN-based Fin-MISHEMTsXingye Zhou, Xin Tan, Yuanjie Lv, Yuangang Wang, Xubo Song, Guodong Gu, Peng Xu, Hongyu Guo, Zhihong Feng, Shujun Cai. 584-587 [doi]
• Analytical model of internal heat transfer of a power chip with through silicon viaJingyu Liu, Yongyong Wang, Xunyong Yang, Fashun Yang, Kui Ma. 588-591 [doi]
• Surface effect on the current-voltage characteristics of back-gated MoS2 channel MOSFETMingyue He, Sitong Bu, Daming Huang. 592-595 [doi]
• Low complexity and low power multiplierless FIR filter implementationXin Lou, Wenbin Ye. 596-599 [doi]
• Dual-pulse nonlinear photoacoustic imaging: Physics, sensing and imaging system designFei Gao, Xiaohua Feng, Ruochong Zhang, Siyu Liu, Ran Ding, Yuanjin Zheng. 600-603 [doi]
• Ultrathin flexible coils for wireless power and data link in biomedical sensorsWei Xu, Tianyuan Cheng, Chundong Wu, Nanshu Lu, Zeyu Yang, Yong Lian, Guoxing Wang. 604-607 [doi]
• An APWM controlled LLC resonant converter for a wide input range and different load conditionsZhongxia Shang, Yang Zhao, Yong Lian. 608-611 [doi]
• A low-power on-chip calibration technique for pipelined ADCsXizhu Peng, Zuowei Mao, Ang Gao, Laishen Che, He Tang. 612-615 [doi]
• A 6-bit 700-MS/s single-channel SAR ADC with low kickback noise comparator in 40-nm CMOSLong Zhao, Bao Li, Yuhua Cheng. 616-619 [doi]
• A power-efficient reconfigurable two-step VCO-based ADC for software-defined radioXinpeng Xing, Peng Zhu, Hui Liu, Wei Wang, Georges Gielen. 620-623 [doi]
• A high-resolution pipeline time-to-digital converter in 0.18μm CMOS technologyYongsheng Wang, Qiao Ye, Han Zhao, Xiaowei Liu. 624-627 [doi]
• A 14bit 320MS/s pipelined-SAR ADC based on multiplexing of dynamic amplifierHonghao Chu, Fule Li. 628-631 [doi]
• All-digital background calibration technique of the channel-time-mismatch in a two-channel TIADCSujuan Liu, Ze Li, Zhenzhen Zhao, Yihui Fan. 632-635 [doi]
• A reference signal phase independent high precision timing skew mismatch estimation scheme for time interleaved ADCRuwu Xiao, Qiying Lei, Xuan Guo, Yuping Zhao. 636-642 [doi]
• A pseudo MMSE linear equalizer for 60GHz single carrier baseband receiverHsun-Wei Chan, Chang-Ting Wu, Chih-Wei Jen, Chun-Yi Liu, Wei-Che Lee, Shyh-Jye Jou. 643-646 [doi]
• Highly-reliable integrated circuits for GroKazutoshi Kobayash. 647-650 [doi]
• Object-recognition VLSI for pedestrian detection in automotive applicationsFengwei An, Xiangyu Zhang, Lei Chen 0001, Idaku Ishii. 651-653 [doi]
• A novel low-cost FPGA-based real-time object tracking systemPeng Gao, Ruyue Yuan, Zhicong Lin, Linsheng Zhang, Yan Zhang. 654-657 [doi]
• Hot carrier reliability in LDMOS devicesJifa Hao. 658-661 [doi]
• The enhancement mode AlGaN/GaN high electron mobility transistor based on charge storageHui Wang, Lingli Jiang, Ning Wang, Xinpeng Lin, Hongyu Yu. 662-665 [doi]
• Hot carrier reliability in ultra-scaled sige channel p-FinFETsMiaomiao Wang, Xin Miao, James H. Stathis, Richard G. Southwick. 666-669 [doi]
• Hot carrier aging of nano-scale devices: Characterization method, statistical variation, and their impact on use voltageJian F. Zhang, Meng Duan, Zhigang Ji, Weidong Zhang 0002. 670-673 [doi]
• A new device architecture based on two dimensional van der Waals heterostructuresZhongxun Guo, Wu Zan, Peng Zhou, Wenzhong Bao, David Wei Zhang. 674-677 [doi]
• TSV modelling in 3D IC thermoelectric simulationTongyang Ye, Ligang Hou, Shier Zhang, Jinhui Wang, Xiaohong Peng. 678-681 [doi]
• Low power mapping optimization of loops for dual-Vdd CGRAsKaijian Yuan, Xingming Zhang 0002. 682-685 [doi]
• A 15MHz BW continuous-time ΔΣ modulator with high speed digital ELD compensationHang Hu, Manxin Li, Zhiyuan Dai, Fan Ye 0001, Junyan Ren. 686-689 [doi]
• An inductorless noise-cancelling CMOS LNA using wideband linearization techniqueBenqing Guo, Jun Chen, Hongpeng Chen, Xuebing Wang, Chang Liu. 690-693 [doi]
• Design and realization of a X-band graphene amplifier MMICXubo Song, Cui Yu, Zezhao He, Qingbin Liu, Tingting Han, Shaobo Dun, Yuanjie Lv, Shujun Cai, Zhihong Feng. 694-697 [doi]
• Ultra low loss and high linearity RF switch using 130nm SOI CMOS processHongwei Zhu, Qiuliang Li, Hao Sun, Zhipeng Wang, Ran Liu, Yi Liu. 698-701 [doi]
• A novel positive-feedback read scheme with tail current source of STT-MRAMJin Yan, Dongsheng Liu, Xuecheng Zou, Bangdi Xu. 702-705 [doi]
• A single-inductor MIMO buck-boost converter with inductor-peak-current PFM control for multiple energy harvestingChen Jiao, Zunchao Li, Chuang Wang, Lvchen Zhou, Hailong Bai. 706-709 [doi]
• An area-efficient interconnection network for coarse-grain reconfigurable cryptographic arrayTongzhou Qu, Zibin Dai, Longmei Nan, Wei Li, Anqi Yin. 710-713 [doi]
• Extraction of circuit transfer functions with SuTra analysesSotoudeh Hamedi-Hagh. 714-717 [doi]
• A force directed partitioning algorithm for 3D floorplanningLinquan Lyu, Takeshi Yoshimura. 718-721 [doi]
• A broadband power detector with temperature and process compensationYiFan Gao, Weigang Xu, Chenyang Kong, Zhangwen Tang. 722-725 [doi]
• Type-3 2-D multimode IIR filter architecture and the corresponding symmetry filter's error analysisPei-yu Chen, Lan-Da Van, Hari C. Reddy, I-Hung Khoo. 726-729 [doi]
• A self-adaptive digital calibration technique for multi-channel high resolution capacitive SAR ADCsBinbin Lyu, Wengao Lu, Sijia Yang, Zhongjian Chen, Yacong Zhang. 730-733 [doi]
• Design and implementation of high-speed configurable ECC co-processorZe He, Xiaowen Chen. 734-737 [doi]
• A metastability-based true random number generator on FPGAChaoyang Li, Qin Wang, Jian-Fei Jiang, Nin Guan. 738-741 [doi]
• A signal noise separation method for the instant mixing linear and nonlinear circuits with MISEP algorithmLiwen Zhu, Xiaole Cui, Xiang Li, Xiaoxin Cui. 742-745 [doi]
• A design of high performance full adder with memristorsKuimin Zhang, Xiaole Cui, Xiaoxin Cui. 746-479 [doi]
• An input buffer for 12bit 2GS/s ADCFubiao Cao, Yongzhen Chen, Zhiyuan Dai, Fan Ye 0001, Junyan Ren. 750-753 [doi]
• A proved dither-injection method for memory effect in double sampling pipelined ADCFubiao Cao, Yongzhen Chen, Yuefeng Cao, Fan Ye 0001, Junyan Ren. 754-757 [doi]
• A high performance switched-capacitor programmable gain amplifier design in 0.18μm CMOS technologyShuang Cui, Tianzhao Liu, Haoran Gong, Bingyan Hu, Yuchun Chang. 758-761 [doi]
• High voltage charge pump circuit using vertical parallel plate capacitorsLiang Zhang, Xu Cheng, Tong Xiaodong, Xianjin Deng. 762-764 [doi]
• A 14-bit 5 MS/s split non-binary SAR ADCShu Yang, Minghang Liu, Yusong Mu, Yuchun Chang. 765-768 [doi]
• A clock interpolation structure using DLL for clock distribution in ADCShijia Zhu, Yu Wang, Fan Ye, Jun Xu. 769-772 [doi]
• A radiation-hard waffle layout for BCD power MOSFETXiao Zhou, Ping Luo, Linyan He, Tiancheng Xiao. 773-775 [doi]
• A 18 mW 12 bit 50 MS/s SHA-less pipelined ADCWeigang Xu, YiFan Gao, Xiaodong Liu, Zhangwen Tang. 776-779 [doi]
• A 16-bit two-step pixel-level ADC for 384∗288 infrared focal plane arraySijia Yang, Lingzi Luo, Wengao Lu, Guangyi Shi, Binbin Lyu, Yuze Niu, Yacong Zhang, Zhongjian Chen. 780-783 [doi]
• A hybrid fault model for differential fault attack on AESYixia Liu, Xiaoxin Cui, Jian Cao, Xing Zhang. 784-787 [doi]
• Design and implementation of homogeneous multi-core systemXiaolei Wang, Dongming Qu, Yu-Kun Song, Duoli Zhang. 788-791 [doi]
• A chain-multiplier for large scale matrix multiplicationCan Wei, Yu-Kun Song, Duoli Zhang. 792-795 [doi]
• Joint detection and decoding for polar-coded OFDM-IDMA systemsXiangyun Deng, Jin Sha, Xiaotian Zhou, Xiaohu You, Chuan Zhang. 796-799 [doi]
• A high-speed low-power charge pump with dynamic current matchingLicheng Xu, Xinchi Gao, Jing Jin. 800-803 [doi]
• A passive mixer-first receiver with negative feedback for impedance matchingShaoqin Yao, Litong Liu, Jing Jin. 804-806 [doi]
• A novel equivalent circuit model of the surge wave generatorYukuai Chen, Jian Cao, Zhang Qihui, Yuan Wang, Xing Zhang. 807-810 [doi]
• Designing hardware trojans and their detection based on a SVM-based approachTomotaka Inoue, Kento Hasegawa, Masao Yanagisawa, Nozomu Togawa. 811-814 [doi]
• A light-weight energy-efficient resilient circuit for variation toleranceXiaopei Chen, Sheng Wang 0005, Xiaoyan Xiang, Chen Chen, Jianyi Meng. 815-818 [doi]
• Design of Ka band bandpass filter using silicon micromachined technologyQiulong Hong, Xiubo Liu, Shaodong Wang. 819-821 [doi]
• Physics based compact model of GaN HEMT with an efficient parameter extraction flowHao Zhang, Ahmed Raslan, Slim Boumaiza, Lan Wei. 822-825 [doi]
• CMOS 0.35μm implementation of time-domain measurement of resonator's quality factorXiaojiao Ren, Ming Zhang, Nicolas Llaser. 826-829 [doi]
• A 1.2V output RF energy harvester with a harvesting-efficiency tracking circuitXiaofei Hu, Xiao Ge, Ting Yi, Danzhu Lu, Zhiliang Hong. 830-834 [doi]
• A 12bit asynchronous SAR-incremental sub-range ADCManxin Li, Hang Hu, Zhiyuan Dai, Fan Ye 0001, Junyan Ren. 835-838 [doi]
• A scalable hardware architecture for multi-layer spiking neural networksZhaozhong Ying, Chong Luo, Xiaolei Zhu. 839-842 [doi]
• 32-Channel ROIC for X-ray imaging systemDan Liu, Feng Gao, Liguang Hao, Jianxin Liao. 843-846 [doi]
• A high performance real-time edge detection system with NEONKaixuan Zhang, Li Ding, Yujie Cai, Wenbo Yin, Fan Yang, Jun Tao, Lingli Wang. 847-850 [doi]
• Demonstrate high Roff/Ron ratio and forming-free RRAM for rFPGA application based on switching layer engineeringWenfeng Dong, Dong Liu, Shun Xu, Bing Chen, Yi Zhao. 851-854 [doi]
• Power optimization on MUX mapped circuitsZhi-Wen Chen, Hui-Hong Zhang. 855-858 [doi]
• Active ego-noise control based on metamaterial in small-size robotXihan Gu, Yun Chen, Xiaofeng Wu. 859-862 [doi]
• Genetic algorithm based on divide-and-conquer strategy for defect-tolerant CMOL mappingXiaojing Zha, Yinshui Xia. 863-866 [doi]
• Application of LDPC codes on PUF error correction based on code-offset constructionKai Sun, Yingjie Lao, Weiqiang Liu, Xiaohu You, Chuan Zhang. 867-870 [doi]
• High speed, low offset, low power differential comparator with constant common mode voltageMehdi Nasrollahpour, Sotoudeh Hamedi-Hagh. 871-874 [doi]
• A programmable divider with extended division range for 24GHz FMCW frequency synthesizerYuanyuan Xu, Wei Li, Dan Wu, Ning Li. 875-878 [doi]
• Large-array high-density active microelectrodes array for neural signal recordingWeiye Cai, Hongge Li. 879-882 [doi]
• DC MUX PUF: A highly reliable feed-back MUX PUF based on measuring duty cycleYunhao Xu, Yingjie Lao, Weiqiang Liu, Xiaohu You, Chuan Zhang. 883-886 [doi]
• The D-band MMIC LNA circuit using 70nm InP HEMT technologyYutong Wang, Hongjiang Wu, Jing Li, Xingchang Fu. 887-890 [doi]
• FPGA-based convolution neural network for traffic sign recognitionYuchen Yao, Zhiqian Zhang, Zhen Yang, Jian Wang, Jinmei Lai. 891-894 [doi]
• A digital-assistant time-to-amplitude converter with dynamic range improvementZengxin Liu, Shaowei Zhen, Shuiqing Xi, Xinjiang Gao, Lei Yang, Jiongwei Zheng, He Tang, Yajuan He, Ping Luo, Bo Zhang. 895-899 [doi]
• The implement of digital front end in all-digital quadrature RF transmitterChenyang Wang, Yilei Shen, Pan Xue, Zhiliang Hong. 900-903 [doi]
• Efficient fast convolution architectures for convolutional neural networkWeihong Xu, Zhongfeng Wang, Xiaohu You, Chuan Zhang. 904-907 [doi]
• Metallic-carbon-nanotube-removal tolerant SRAM cell with 9 transistorsYanan Sun, Weifeng He, Zhigang Mao, Hailong Jiao, Volkan Kursun. 908-911 [doi]
• Analysis and design of energy-efficient data-dependent SRAMWenfeng Zhao, Ang Li, Yi Wang, Yajun Ha. 912-915 [doi]
• Low-power single-phase clocked redundant-transition-free flip-flop design with conditional charging schemeLing Chen, Yanan Sun, Weifeng He. 916-919 [doi]
• Near-threshold processor design techniques for power-constrained computing devicesJun Zhou, Tony Tae-Hyoung Kim, Yong Lian. 920-923 [doi]
• Optimization compensation for primary-side-regulated flyback converters in continuous-conduction-mode and discontinuous conduction modeGong Xiaowu. 924-927 [doi]
• Recent progress in GaN devices for power and integrated circuitNobuyuki Otsuka, Yasufumi Kawai, Shuichi Nagai. 928-931 [doi]
• A high-precision voltage regulator with dynamic load technique and overcurrent protectionZekun Zhou, JianWen Cao, Yue Shi, Bo Zhang. 932-935 [doi]
• Backscattering in multicycle Q-modulation for bio-implants wireless power transferYang Liu, Bin Li, Mo Huang, Zhaoquan Chen. 936-939 [doi]
• A single inductor tri-input dual-output buck-boost DC-DC converter with MPPT for multi-source energy harvestingXiao Ge, Xiaofei Hu, Yajie Qin, Zhiliang Hong. 940-943 [doi]
• A high utilization FPGA-based accelerator for variable-scale convolutional neural networkXin Li, Yujie Cai, Jun Han, Xiaoyang Zeng. 944-947 [doi]
• A novel mixed reconfigurable system on chip based on field programmable analog arrayLintao Liu, YuHan Gao, Haoming Du. 948-952 [doi]
• Parallel implementations of SHA-3 on a 24-core processor with software and hardware co-designJianwei Yang, Weizhen Wang, Zhicheng Xie, Jun Han, Zhiyi Yu, Xiaoyang Zeng. 953-956 [doi]
• A 3600 × 3600 large-scale ISFET sensor array for high-throughput pH sensingYongxin Cong, Ming Xu, Dan Zhao, Dongping Wu. 957-960 [doi]
• n) LDPC decodingShusen Jing, Anlan Yu, Xiao Liang, Xiaohu You, Chuan Zhang. 961-964 [doi]
• Design of router for spiking neural networksYewen Ni, Xiaoxin Cui, Yuanning Fan, Qiankun Han, Kefei Liu, Xiaole Cui. 965-968 [doi]
• A fuel injection control SoC for Diesel Engine Management SystemQinmiao Kang, Zhifeng Xie, Yongquan Liu, Ming Zhou. 969-972 [doi]
• Efficient algorithms for resistance and capacitance calculation problems in the design of flat panel display: [Invited paper]Wenjian Yu, Taotao Lu. 973-976 [doi]
• Characterization of single-crystalline graphene ESD interconnectsQi Chen, Cheng Li, Fei Lu 0004, Chenkun Wang, Feilong Zhang, Tianru Wu, Xiaoming Xie, Kun Zhang, Xinxin Li, Jimmy Ng, Ya-Hong Xie, Yuhua Cheng, Albert Z. Wang. 977-980 [doi]
• Compact modeling approach for electro-mechanical system simulationTapas K. Maiti, D. Navarro, Mitiko Miura-Mattausch, Hans Jürgen Mattausch. 981-984 [doi]
• Short path padding with multiple-Vt cells for wide-pulsed-latch based circuits at ultra-low voltageYongming Ding, Wei Jin, Guanghui He, Weifeng He. 985-988 [doi]
• A fast HDL model for full-custom FPGA verificationKaixuan Zhang, Zhihua Feng, Hao Zhou. 989-992 [doi]
• Micro-LED arrays for display and communication: Device structure and driver architectureKiat Seng Yeo, Wen Xian Ng, Mei Yu Soh, T. Hui Teo. 993-996 [doi]
• A biomedical microfluidic mixer in MEMS application using inkjetJun Chen, Qian Hou, Zhanjiang Guo, Yuheng Nie, Zeng Peng, Robert K. F. Teng. 997-1000 [doi]
• A bulk-driven pixel circuit with wide data voltage range for OLEDoS microdisplaysHuiyuan Lu, Hongge Li. 1001-1004 [doi]
• A low-power self-calibration digital-output CMOS temperature sensor with ±0.1°C inaccuracy from -40°C to 85°CYuze Niu, Wengao Lu, Yacong Zhang, Shanzhe Yu, Zhongjian Chen. 1005-1008 [doi]
• A 58-dB SNDR 1.32-mW chopper-stabilized analog front-end for graphene hall element detecting applicationChengying Chen, Liming Chen, Zhenli Lai. 1009-1012 [doi]
• RF mixer design techniques using GaAs processJinna Yan, Bharatha Kumar Thangarasu, Kiat Seng Yeo. 1013-1016 [doi]
• 5G mm-Wave front-end-module design with advanced SOI processChaojiang Li, Min Wang, Taiyun Chi, Arvind Kumar, Myra Boenke, Dawn Wang, Ned Cahoon, Anirban Bandyopadhyay, Alvin Joseph, Hua Wang. 1017-1020 [doi]
• Ultrafast spintronic integrated circuitsJiaqi Wei, Liang Chang, Zhaohao Wang, Xiaoyang Lin, Kaihua Cao, Hushan Cui, Wang Kang, Haoxuan Chen, Lang Zeng, Youguang Zhang, Chao Zhao, Weisheng Zhao. 1021-1024 [doi]
• Ultra-high-data-rate 60-GHz CMOS transceiver for future radio access networkRui Wu, Ryo Minami, Yuuki Tsukui, Seitaro Kawai, Yuuki Seo, Shinji Sato, Kento Kimura, Satoshi Kondo, Tomohiro Ueno, Nurul Fajri, Shoutarou Maki, Noriaki Nagashima, Yasuaki Takeuchi, Tatsuya Yamaguchi, Ahmed Musa, Korkut Kaan Tokgoz, Teerachot Siriburanon, Bangan Liu, Yun Wang, Jian Pang, Ning Li, Masaya Miyahara, Kenichi Okada, Akira Matsuzawa. 1025-1028 [doi]
• Neural networks: Efficient implementations and applicationsChuan Zhang, Weihong Xu. 1029-1032 [doi]
• Using Fermat number transform to accelerate convolutional neural networkWeihong Xu, Xiaohu You, Chuan Zhang. 1033-1036 [doi]
• A layer-based structured design of CNN on FPGAChao Huang, Siyu Ni, Gengsheng Chen. 1037-1040 [doi]
• Automatic classification of leukocytes using deep neural networkWei Yu, Jing Chang, Cheng Yang, Limin Zhang, Han Shen, Yongquan Xia, Jin Sha. 1041-1044 [doi]
• Energy efficient SVM classifier using approximate computingYangcan Zhou, Jun Lin, Zhongfeng Wang. 1045-1048 [doi]
• Ultra low power and high performance nanoelectronic devicesFrancis Balestra. 1049-1052 [doi]
• High performance transistors based on two dimensional materialsMingqiang Huang, Xiong Xiong, Tiaoyang Li, Yanqing Wu. 1053-1056 [doi]
• NiGe metal source/drain Ge pMOSFETs for future high performance VLSI circuits applicationsRui Zhang 0024, Jinghui Han, Junkang Li, Xiaoyu Tang, Yi Zhao. 1057-1060 [doi]
• Deeply scaled VLSI analog transistor design and optimizationPeng Lu, Po-Yen Chien, Xicheng Duan, Jason C. S. Woo. 1061-1064 [doi]
• Toward real-time 3D modeling system with cubic-millimeters wireless sensor nodesMasanori Hashimoto, Ryo Shirai, Yuichi Itoh, Tetsuya Hirose. 1065-1068 [doi]
• Joint detection and decoding for non-binary LDPC coded MIMO systemsYiqian Cai, Jin Sha, Shusen Jing, Xiaohu You, Chuan Zhang. 1069-1072 [doi]
• The VLSI architecture for channel estimation based on ADMAXiaozhen Liu, Hongxiang Xie, Jin Sha, Feifei Gao, Shi Jin, Xiaohu You, Chuan Zhang. 1073-1076 [doi]
• An efficient successive cancellation polar decoder based on new folding approachesXiao Liang, Yechao She, Harish Vangala, Xiaohu You, Chuan Zhang, Emanuele Viterbo. 1077-1080 [doi]
• RC6 architecture-adaptive implementation for coarse-grained reconfiguration arrayAnqi Yin, Zibin Dai, Longmei Nan, Wei Li. 1081-1085 [doi]
• DRFNet: A lightweight and high accuracy network for resource-limited implementationHengliang Xiang, Liang Chen, Wei Xu. 1086-1089 [doi]
• Design of digital control unit for implantable stimulator chipGuoqing Sun, Xiaohong Peng, Jun Zhao, Rui Wang, Xiaodan Li. 1090-1093 [doi]
• Digital RF transmitter architectures exploiting FIRDACs in various configurationsAndreas Kaiser, Antoine Frappe. 1094-1097 [doi]
• Terahertz CMOS transceiver for tera-bps wireless linkMinora Fujishima. 1098-1100 [doi]
• 125KHz wake-up receiver and 433MHz data transmitter for battery-less TPMSQinmiao Kang, Zhifeng Xie, Yongquan Liu, Ming Zhou. 1101-1104 [doi]
• A low power high integrated BLE transceiverHui Zhao, Cuncai Zhang, Jie Liang, Jun Zeng, Yun Deng, Dingyang Chen, Guojun He, Qingfeng Luo. 1105-1108 [doi]
• A low-power digital GFSK receiver with mid-value filtering frequency offset estimator and soft anti-overlap slicerYu Li, Ziqian Wang, Song Chen, Fujiang Lin. 1109-1112 [doi]
• A 1.0-3.0GHz LTE transmitter with CIM enhancementYun Yin, Tong Li, Xiaoyong Xue. 1113-1116 [doi]
• Tensor-network-based predistorter design for multiple-input multiple-output nonlinear systemsCong Chen, Kim Batselier, Mihai Telescu, Stéphane Azou, Noël Tanguy, Ngai Wong. 1117-1120 [doi]
• Towards an LC passive wireless sensor platformQing-An Huang, Lei Dong, Lifeng Wang. 1121-1024 [doi]
• Design and development of a self-contained and non-invasive integrated system for electricity monitoring applicationsSid Zarabi, Egon Fernandes, Isabel Rua, Armaghan Salehian, Hélène Debeda, David Nairn, Lan Wei. 1125-1128 [doi]
• Integrating operation scheduling and binding for functional unit power-gating in high-level synthesisNan Wang, Hengxiao Wang, Yue Jin, Jiongyao Ye. 1129-1132 [doi]
• New 2-D quadrantal- and diagonal-symmetry filter architectures using delta operatorPei-yu Chen, Lan-Da Van, I. H. Khoo, Hari C. Reddy. 1133-1136 [doi]
• 3D scaling for insulated gate bipolar transistors (IGBTs) with low Vce(sat)Kazuo Tsutsui, Kuniyuki Kakushima, T. Hoshii, A. Nakajima, Shinichi Nishizawa, Hitoshi Wakabayashi, I. Muneta, K. Sato, Tomoko Matsudai, Wataru Saito, Takuya Saraya, K. Itou, M. Fukui, S. Suzuki, M. Kobayashi, T. Takakura, Toshiro Hiramoto, A. Ogura, Y. Numasawa, Ichiro Omura, H. Ohashi, Hiroshi Iwai. 1137-1140 [doi]
• Advanced FinFET technologies for boosting SRAM performanceKazuhiko Endo. 1141-1144 [doi]
• High-voltage bidirectional current sensorZong-You Hou, Hsiu-Chun Tsai, Chua-Chin Wang. 1145-1146 [doi]