James H. Stathis - researchr alias

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Viewing Publication 1 - 25 from 25

2019

Long Term NBTI Relaxation Under AC and DC Biased Stress and RecoveryElnatan Mataev, James H. Stathis, Giuseppe La Rosa, Barry P. Linder. irps 2019: 1-5 [doi]

On the Frequency Dependence of Bulk Trap Generation During AC Stress in Si and SiGe RMG P-FinFETsNarendra Parihar, Uma Sharma, Richard G. Southwick, Miaomiao Wang, James H. Stathis, Souvik Mahapatra. irps 2019: 1-8 [doi]

Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet TransistorMiaomiao Wang, Jingyun Zhang, Huimei Zhou, Richard G. Southwick, Robin Hsin Kuo Chao, Xin Miao, Veeraraghavan S. Basker, Tenko Yamashita, Dechao Guo, Gauri Karve, Huiming Bu, James H. Stathis. irps 2019: 1-6 [doi]

Comprehensive Methodology for Multiple Spots Competing Progressive Breakdown for BEOL/FEOL ApplicationsErnest Y. Wu, Baozhen Li, James H. Stathis, Andrew Kim. irps 2019: 1-8 [doi]

2018

2017

Hot carrier reliability in ultra-scaled sige channel p-FinFETsMiaomiao Wang, Xin Miao, James H. Stathis, Richard G. Southwick. asicon 2017: 666-669 [doi]

2015

2014

The resilience wall: Cross-layer solution strategiesSubhasish Mitra, Pradip Bose, Eric Cheng, Chen-Yong Cher, Hyungmin Cho, Rajiv V. Joshi, Young Moon Kim, Charles R. Lefurgy, Yanjing Li, Kenneth P. Rodbell, Kevin Skadron, James H. Stathis, Lukasz G. Szafaryn. vlsi-dat 2014: 1-11 [doi]

2010

Reliability of advanced high-k/metal-gate n-FET devicesJames H. Stathis, M. Wang, K. Zhao. mr, 50(9-11):1199-1202, 2010. [doi]

2009

Impacts of NBTI and PBTI on SRAM static/dynamic noise margins and cell failure probabilityAditya Bansal, Rahul M. Rao, Jae-Joon Kim, Sufi Zafar, James H. Stathis, Ching-Te Chuang. mr, 49(6):642-649, 2009. [doi]

2008

A novel approach to characterization of progressive breakdown in high-k/metal gate stacksR. Pagano, Salvatore Lombardo, F. Palumbo, P. Kirsch, S. A. Krishnan, C. Young, R. Choi, G. Bersuker, James H. Stathis. mr, 48(11-12):1759-1764, 2008. [doi]

2007

Influence of the SiO::2:: layer thickness on the degradation of HfO::2::/SiO::2:: stacks subjected to static and dynamic stress conditionsE. Amat, R. Rodríguez, M. Nafría, X. Aymerich, James H. Stathis. mr, 47(4-5):544-547, 2007. [doi]

Worn-out oxide MOSFET characteristics: Role of gate current and device parameters on a current mirrorJ. Martín-Martínez, R. Rodríguez, M. Nafría, X. Aymerich, James H. Stathis. mr, 47(4-5):665-668, 2007. [doi]

2006

The negative bias temperature instability in MOS devices: A reviewJames H. Stathis, S. Zafar. mr, 46(2-4):270-286, 2006. [doi]

2003

Influence and model of gate oxide breakdown on CMOS invertersR. Rodríguez, James H. Stathis, Barry P. Linder, Rajiv V. Joshi, Ching-Te Chuang. mr, 43(9-11):1439-1444, 2003. [doi]

Circuit implications of gate oxide breakdownJames H. Stathis, R. Rodríguez, Barry P. Linder. mr, 43(8):1193-1197, 2003. [doi]

Reliability of ultra-thin oxides in CMOS circuitsJames H. Stathis, Barry P. Linder, R. Rodríguez, Salvatore Lombardo. mr, 43(9-11):1353-1360, 2003. [doi]

2002

Dependence of Post-Breakdown Conduction on Gate Oxide ThicknessSalvatore Lombardo, James H. Stathis, Barry P. Linder. mr, 42(9-11):1481-1484, 2002. [doi]

Analysis of the effect of the gate oxide breakdown on SRAM stabilityR. Rodríguez, James H. Stathis, Barry P. Linder, S. Kowalczyk, Ching-Te Chuang, Rajiv V. Joshi, Gregory A. Northrop, Kerry Bernstein, A. J. Bhavnagarwala, Salvatore Lombardo. mr, 42(9-11):1445-1448, 2002. [doi]

Reliability limits for the gate insulator in CMOS technologyJames H. Stathis. ibmrd, 46(2-3):265-286, 2002. [doi]

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