Abstract is missing.
- Evaluation on flip-flop physical unclonable functions in a 14/16-nm bulk FinFET technologyH. Zhang, H. Jiang, M. R. Eaker, K. J. Lezon, Balaji Narasimham, Nihaar N. Mahatme, Lloyd W. Massengill, Bharat L. Bhuva. 1 [doi]
- Threshold voltage shift and interface/border trapping mechanism in Al2O3/AlGaN/GaN MOS-HEMTsJie-Jie Zhu, Bin Hou, Lixiang Chen, Qing Zhu, Ling Yang, Xiaowei Zhou, Peng Zhang, Xiaohua Ma, Yue Hao. 1 [doi]
- Electromigration failure rate of redundant viaJae-Gyung Ahn, Ping-Chin Yeh, Jonathan Chang. 1 [doi]
- Investigation of monolayer MX2 as sub-nanometer copper diffusion barriersKirby K. H. Smithe, Zhongwei Zhu, Connor S. Bailey, Eric Pop, Alex Yoon. 1 [doi]
- Effect of HCI degradation on the variability of MOSFETSC. Zhou, Keith A. Jenkins, P. I. Chuang, Christos Vezyrtzis. 1 [doi]
- Low frequency noise in MOS2 negative capacitance field-effect transistorSami Alghamdi, Mengwei Si, Lingming Yang, Peide D. Ye. 1 [doi]
- A case study of ESD trigger circuit: Time-out and stabilityKuo-Hsuan Meng, Mohamed Moosa, Cynthia A. Torres, James W. Miller. 1 [doi]
- Correlation between SET-state current level and read-disturb failure time in a resistive switching memoryP. C. Su, C. M. Jiang, C.-W. Wang, Tahui Wang. 1 [doi]
- Charge state evaluation of passivation layers for silicon solar cells by scanning nonlinear dielectric microscopyKento Kakikawa, Y. Yamagishi, Y. Cho, K. Tanahashi, H. Takato. 1 [doi]
- Investigation of alpha-induced single event transient (SET) in 10 nm FinFET logic circuitTaiki Uemura, Soonyoung Lee, Dahye Min, Ihlhwa Moon, Jungman Lim, Seungbae Lee, Hyun-Chul Sagong, Sangwoo Pae. 1 [doi]
- Study of impact of BTI's local layout effect including recovery effect on various standard-cells in 10nm FinFETMitsuhiko Igarashi, Yuuki Uchida, Yoshio Takazawa, Yasumasa Tsukamoto, Koji Shibutani, Koji Nii. 1 [doi]
- Keynote 1: The road to resilient computing in autonomous driving is paved with redundancyNirmal Saxena, Sanu Mathew, Krishna Saraswat. 1-3 [doi]
- New insight on TDDB area scaling methodology of non-Poisson systemsTian Shen, Kong Boon Yeap, Sean Ogden, Cathryn Christiansen, Patrick Justison. 1 [doi]
- Weibull cumulative distribution function (CDF) analysis with life expectancy endurance test result of power window switchMiky Lee, K. Kim, D. Lim, D. Cho, Ck. Han. 1 [doi]
- Defects affecting SiC power device reliabilityR. E. Stahbush, N. A. Mahadik. 2 [doi]
- The physics of NBTI: What do we really know?James H. Stathis. 2 [doi]
- The effects of radiation on the terrestrial operation of SiC MOSFETsAkin Akturk, James McGarrity, Neil Goldsman, Daniel J. Lichtenwalner, Brett Hull, Dave Grider, Richard Wilkins. 2 [doi]
- Stochastic modeling of air electrostatic discharge parametersYang Xiu, Samuel Sagan, Advika Battini, Xiao Ma, Maxim Raginsky, Elyse Rosenbaum. 2 [doi]
- A multi-bit/cell PUF using analog breakdown positions in CMOSKai-Hsin Chuang, Erik Bury, Robin Degraeve, Ben Kaczer, T. Kallstenius, Guido Groeseneken, Dimitri Linten, Ingrid Verbauwhede. 2-1 [doi]
- Study of TID effects on one row hammering using gamma in DDR4 SDRAMsDonghyuk Yun, Myungsang Park, Chul Seung Lim, Sanghyeon Baeg. 2-1 [doi]
- Investigation of the pulsed-IV degradation mechanism of GaN-HEMT under high temperature storage testsYasunori Tateno, Yasuyo Kurachi, Hiroshi Yamamoto, Takashi Nakabayashi. 2-1 [doi]
- Hot carrier effects on the RF performance degradation of nanoscale LNA SOI nFETsDimitris P. Ioannou, Y. Tan, R. Logan, K. Bandy, R. Achanta, P. C. Wang, D. Brochu, M. Jaffe. 2-1 [doi]
- Self-heating-aware CMOS reliability characterization using degradation mapsErik Bury, Adrian Chasin, Ben Kaczer, Kai-Hsin Chuang, Jacopo Franco, Marco Simicic, Pieter Weckx, Dimitri Linten. 2 [doi]
- Reliability studies of SiC vertical power MOSFETsDaniel J. Lichtenwalner, Brett Hull, Edward Van Brunt, Shadi Sabri, Donald A. Gajewski, Dave Grider, Scott Allen, John W. Palmour, Akin Akturk, James McGarrity. 2 [doi]
- Transient self-heating modeling and simulations of back-end-of-line interconnectsAndrew Kim, Baozhen Li, Barry P. Linder. 2-1 [doi]
- System-level design for ESD protection on multiple IO interfacesPengyu Wei, Javad Meiguni, David Pommerenke. 2 [doi]
- Reliability evaluation of defect accounted time-dependent dielectric breakdown with competing-mixture distributionShinji Yokogawa, Kazuki Tate. 2-1 [doi]
- Cap layer and multi-work-function tuning impact on TDDB/BTI in SOI FinFET devicesWen Liu, Andreas Kerber, Fernando Guarin, Claude Ortolland. 2 [doi]
- SiC power MOSFET gate oxide breakdown reliability - Current statusKin P. Cheung. 2 [doi]
- Characterization and physical modeling of the temporal evolution of near-interfacial states resulting from NBTI/PBTI stress in nMOS/pMOS transistorsTibor Grasser, Bernhard Stampfer, Michael Waltl, Gerhard Rzepa, Karl Rupp, Franz Schanovsky, Gregor Pobegen, Katja Puschkarsky, Hans Reisinger, Barry J. O'Sullivan, Ben Kaczer. 2 [doi]
- PHM of state-of-charge for flexible power sources in wearable electronics with EKFPradeep Lall, Hao Zhang, Rahul Lall. 2-1 [doi]
- Temperature and voltage effects on HTRB and HTGB stresses for AlGaN/GaN HEMTsOmar Chihani, Loic Théolier, Jean-Yves Delétage, Eric Woirgard, Omar Chihani, Alain Bensoussan, André Durier. 2-1 [doi]
- Sub-pJ consumption and short latency time in RRAM arrays for high endurance applicationsGilbert Sassine, Cecile Nail, Luc Tillie, Diego Alfaro Robayo, Alexandre Levisse, Carlo Cagli, Khalil El Hajjam, Jean-Francois Nodin, Elisa Vianello, Mathieu Bernard, Gabriel Molas, Etienne Nowak. 2-1 [doi]
- Latch-up in FinFET technologiesKrzysztof Domanski. 2 [doi]
- An integral injector-victim current transfer model for latchup design rule optimizationGuido Quax, Theo Smedes. 2 [doi]
- Understanding and modeling transient threshold voltage instabilities in SiC MOSFETsKatja Puschkarsky, Tibor Grasser, Thomas Aichinger, Wolfgang Gustin, Hans Reisinger. 3 [doi]
- Elapsed-time statistics of successive breakdown in the presence of variability for dielectric breakdown in BEOL/MOL/FEOL applicationsErnest Y. Wu, Andrew Kim, Baozhen Li, James H. Stathis. 3 [doi]
- Failure mode analysis of GaN-HEMT under high temperature operationYasuyo Kurachi, Hiroshi Yamamoto, Yukinori Nose, Satoshi Shimizu, Yasunori Tateno, Takumi Yonemura, Masato Furukawa. 3-1 [doi]
- Challenges to realize highly reliable SiC power devices: From the current status and issues of SiC wafersJunji Senzaki, Shohei Hayashi, Yoshiyuki Yonezawa, Hajime Okumura. 3 [doi]
- Fast chip aging prediction by product-like VMIN drift characterization on test structuresS. E. Liu, G. Y. Chen, M. K. Chen, David. Yen, W. A. Kuo, C. S. Fu, Y. S. Tsai, M. Z. Lin, Y. H. Fang, M. J. Lin. 3 [doi]
- Optimal design of dummy ball array in wafer level package to improve board level thermal cycle reliability (BLR)Seongwon Jeong, Jinseok Kim 0005, Ayoung Kim, Byungwook Kim, Moonsoo Lee, Jaewon Chang, In Hak Baick, Hanbyul Kang, Younggeun Ji, Sangchul Shin, Sangwoo Pae. 3 [doi]
- New methodology for modelling MOL TDDB coping with variabilityPhilippe J. Roussel, Adrian Chasin, Steven Demuynck, Naoto Horiguchi, Dimitri Linten, Anda Mocuta. 3 [doi]
- Sensitivity to soft errors of NMOS and PMOS transistors evaluated by latches with stacking structures in a 65 nm FDSOI processKodai Yamada, Haruki Maruoka, Jun Furuta, Kazutoshi Kobayashi. 3-1 [doi]
- On the ESD behavior of a-Si: H based thin film transistors: Physical insights, design and technological implicationsRajat Sinha, Prasenjit Bhattacharya, Sanjiv Sambandan, Mayank Shrivastava. 3 [doi]
- Study on mechanism of thermal curing in ultra-thin gate dielectricsYuichiro Mitani, Yusuke Higashi, Yasushi Nakasaki. 3 [doi]
- Physical failure analysis methods for wide band gap semiconductor devicesAndreas Graff, Michél Simon-Najasek, David Poppitz, Frank Altmann. 3 [doi]
- In-situ calibration Of MEMS inertial sensors for long-term reliabilitySachin Nadig, Amit Lal. 3 [doi]
- Resilient automotive products through process, temperature and aging compensation schemesSouhir Mhira, Vincent Huard, D. Arora, Philippe Flatresse, Alain Bravaix. 3 [doi]
- Evaluation methodology for current collapse phenomenon of GaN HEMTsToru Sugiyama, Kohei Oasa, Yasunobu Saito, Akira Yoshioka, Takuo Kikuchi, Aya Shindome, Tatsuya Ohguro, Takeshi Hamamoto. 3 [doi]
- Impact of forming gas annealing on the degradation dynamics of Ge-based MOS stacksFernando L. Aguirre, Sebastián MatĂas Pazos, Felix Palumbo, Sivan Fadida, Roy Winter, Moshe Eizenberg. 3-1 [doi]
- Reliability characterization of advanced CMOS image sensor (CIS) with 3D stack and in-pixel DTIYounggeun Ji, Jeonghoon Kim, Jungin Kim, Miji Lee, Jaeheon Noh, Taeyoung Jeong, Juhyeon Shin, Junho Kim, Young Heo, Ung Cho, Hyun-Chul Sagong, Junekyun Park, Yeonsik Choo, Gilhwan Do, Hoyoung Kang, Eunkyeong Choi, Dongyoon Sun, Changki Kang, Sangchul Shin, Sangwoo Pae. 3 [doi]
- Statistical modeling and reliability prediction for transient luminance degradation of flexible OLEDsHeejin Kim, Hayeon Shin, Jiyoung Park, Youngtae Choi, Jongwoo Park. 3 [doi]
- Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliabilityMilova Paul, B. Sampath Kumar, Harald Gossner, Mayank Shrivastava. 3 [doi]
- Insights into metal drift induced failure in MOL and BEOLChen Wu, O. Varela Pedreira, Alicja Lesniewska, Yunlong Li, Ivan Ciofi, Zsolt Tokei, Kris Croes. 3 [doi]
- New insights into the HCI degradation of pass-gate transistor in advanced FinFET technologyPengpeng Ren, Changze Liu, Sanping Wan, Jiayang Zhang, Zhuoqing Yu, Nie Liu, Yongsheng Sun, Runsheng Wang, Canhui Zhan, Zhenghao Gan, Waisum Wong, Yu Xia, Ru Huang. 3-1 [doi]
- Airplane system design for reliability and qualityAnapathur V. Ramesh, Shilpa M. Reddy, Dan K. Fitzsimmons. 3 [doi]
- Brief history of JEDEC qualification standards for silicon technology and their applicability(?) to WBG semiconductorsJ. W. McPherson. 3 [doi]
- Defect-Assisted Safe Operating Area Limits and High Current Failure in Graphene FETsNagothu Karmel Kranthi, Abhishek Mishra, Adil Meersha, Harsha B. Variar, Mayank Shrivastava. 3 [doi]
- Modeling self-heating effects in advanced CMOS nodesM. Arabi, A. Cros, X. Federspiel, C. Ndiaye, V. Huard, M. Rafik. 3-1 [doi]
- Machine-learned assessment and prediction of robust solid state storage system reliability physicsJay Sarkar, Cory Peterson, Amir Sanayei. 3 [doi]
- Exascale fault tolerance challenge and approachesCameron McNairy. 3 [doi]
- Hot carrier induced TDDB in HV MOS: Lifetime model and extrapolation to use conditionsGuido T. Sasse. 3-1 [doi]
- Machine learning based dynamic cause maps for condition monitoring and life estimationAmit A. Kale, Amit Marathe, Ajay Kamath. 3 [doi]
- Time-dependent dielectric breakdown statistics in SiO2 and HfO2 dielectrics: Insights from a multi-scale modeling approachAndrea Padovani, Luca Larcher. 3 [doi]
- High-temperature and high-field cycling reliability of PZT films embedded within 130 nm CMOSGrant Walters, Paul Chojecki, Alexandra Garraud, Toshikazu Nishida, Scott R. Summerfelt, J. A. Rodriguez, A. G. Acosta. 3-1 [doi]
- Managing electrical reliability in consumer systems for improved energy efficiencyVincent Huard, Souhir Mhira, A. Barclais, X. Lecocq, F. Raugi, M. Cantournet, Alain Bravaix. 3 [doi]
- Analysis of electromigration-induced backflow stresses in Cu(Mn) interconnects using high statistical samplingM. Kraatz, Christoph Sander, André Clausner, M. Hauschildt, Yvonne Standke, Martin Gall, Ehrenfried Zschech. 4 [doi]
- Effect of metal line width on electromigration of BEOL Cu interconnectsSeungman Choi, Cathryn Christiansen, Linjun Cao, James Zhang, Ronald Filippi, Tian Shen, Kong Boon Yeap, Sean Ogden, Haojun Zhang, Bianzhu Fu, Patrick Justison. 4 [doi]
- Safe Operating Area (SOA) reliability of Polarization Super Junction (PSJ) GaN FETsBhawani Shankar, Ankit Soni, Sayak Dutta Gupta, Mayank Shrivastava. 4 [doi]
- Key parameters driving transistor degradation in advanced strained SiGe channelsV. Huard, C. Ndiaye, M. Arabi, N. Parihar, X. Federspiel, Souhir Mhira, S. Mahapatra, Alain Bravaix. 4-1 [doi]
- On the trap assisted stress induced safe operating area limits of AlGaN/GaN HEMTsBhawani Shankar, Ankit Soni, Sayak Dutta Gupta, R. Sengupta, H. Khand, N. Mohan, Srinivasan Raghavan, Mayank Shrivastava. 4 [doi]
- Degradation of vertical GaN FETs under gate and drain stressMaria Ruzzarin, Matteo Meneghini, Carlo De Santi, Gaudenzio Meneghesso, Enrico Zanoni, M. Sun, Tomás Palacios. 4 [doi]
- Evaluation of the system-level SER performance of gigabit ethernet transceiver devicesBalaji Narasimham, Tim Wu, Jung K. Wang, Bruce Conway. 4 [doi]
- Successive breakdown mode of time-dependent dielectric breakdown for Cu interconnects and lifetime enhancement under dynamic bias stressSol-Kyu Lee, Kyung-Tae Jang, Seol-Min Yi, Young-Chang Joo. 4 [doi]
- Comprehensive study into underlying mechanisms of anomalous gate leakage degradation in GaN high electron mobility transistorsK. Mukherjee, Frédéric Darracq, Arnaud Curutchet, Nathalie Malbert, Nathalie Labat. 4 [doi]
- Fine pitch 3D interconnections with hybrid bonding technology: From process robustness to reliabilityLucile Arnaud, Stéphane Moreau, Amadine Jouve, Imed Jani, Didier Lattard, F. Fournel, C. Euvrard, Y. Exbrayat, V. Balan, N. Bresson, S. Lhostis, J. Jourdon, E. Deloffre, S. Guillaumet, Alexis Farcy, Simon Gousseau, M. Arnoux. 4 [doi]
- Reliability challenges in advance packagingSubramanian S. Iyer, Adeel Ahmad Bajwa. 4 [doi]
- The physical mechanism investigation of off-state drain bias TDDB and its implication in advance HK/MG FinFETsI. K. Chen, S. C. Chen, S. Mukhopadhyay, D.-S. Huang, J. H. Lee, Y. S. Tsai, Ryan Lu, Jun He. 4 [doi]
- Suppression of endurance-stressed data-retention failures of 40nm TaOx-based ReRAMShouhei Fukuyama, Kazuki Maeda, Shinpei Matsuda, Ken Takeuchi, Ryutaro Yasuhara. 4-1 [doi]
- A systematic study of gate dielectric TDDB in FinFET technologyHyunjin Kim, Minjung Jin, Hyun-Chul Sagong, Jinju Kim, Ukjin Jung, Minhyuck Choi, Junekyun Park, Sangchul Shin, Sangwoo Pae. 4 [doi]
- Soft errors in 7nm FinFET SRAMs with integrated fan-out packagingYi-Pin Fang, Anthony S. Oates. 4 [doi]
- Impact of supply voltage and particle LET on the soft error rate of logic circuitsHui Jiang, H. Zhang, R. C. Harrington, J. A. Maharrey, J. S. Kauppila, Lloyd W. Massengill, Bharat L. Bhuva. 4 [doi]
- Electromigration characteristics of power grid like structuresBaozhen Li, Andrew Kim, Paul McLaughlin, Barry P. Linder, Cathryn Christiansen. 4 [doi]
- Device variability tolerance of a RRAM-based self-organizing neuromorphic systemM. Pedro, Javier MartĂn-MartĂnez, E. Miranda, Rosana RodrĂguez, Montserrat NafrĂa, M. B. González, Francesca Campabadal. 4-1 [doi]
- High-density fan-out technology for advanced SiP and 3D heterogeneous integrationKangwook Lee. 4 [doi]
- Threshold ion parameters of line-type soft-errors in biased thin-BOX SOI SRAMs: Difference between sensitivities to terrestrial and space radiationC. Chung, D. Kobayashi, K. Hirose. 4 [doi]
- Mechanism of soft and hard breakdown in hexagonal boron nitride 2D dielectricsA. Ranjan, Nagarajan Raghavan, Sean J. O'Shea, Sen Mei, Michel Bosman, Kalya Shubhakar, Kin Leong Pey. 4 [doi]
- Lifetime evaluation for Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT) under practical switching operationsAyanori Ikoshi, Masahiro Toki, Hiroto Yamagiwa, Daijiro Arisawa, Masahiro Hikita, Kazuki Suzuki, Manabu Yanagihara, Yasuhiro Uemoto, Kenichiro Tanaka, Tetsuzo Ueda. 4 [doi]
- A novel insight of pBTI degradation in GaN-on-Si E-mode MOSc-HEMTW. Vandendaele, X. Garros, T. Lorin, Erwan Morvan, A. Torres, René Escoffier, M.-A. Jaud, M. Plissonnier, F. Gaillard. 4 [doi]
- AC TDDB extensive study for an enlargement of its impact and benefit on circuit lifetime assessmentM. Rafik, A. P. Nguyen, Xavier Garros, M. Arabi, X. Federspiel, C. Diouf. 4 [doi]
- Polysilicon resistor stability under voltage stress for safe-operating area characterizationC. Kendrick, M. Cook, J. P. Gambino, T. Myers, J. Slezak, T. Hirano, T. Sano, Y. Watanabe, K. Ozeki. 4-1 [doi]
- Stress mitigation of 3D-stacking/packaging induced stressesKristof Croes, Vladimir Cherman, Melina Lofrano, Houman Zahedmanesh, Luka Kljucar, M. Gonzalez, Ingrid De Wolf, Zsolt Tokei, Eric Beyne. 4 [doi]
- Reliability of MgO in magnetic tunnel junctions formed by MgO sputtering and Mg oxidationAkinobu Teramoto, Keiichi Hashimoto, Tomoyuki Suwa, Jun-ichi Tsuchimoto, Marie Hayashi, Hyeonwoo Park, Shigetoshi Sugawa. 4-1 [doi]
- A novel GaN HEMT degradation mechanism observed during HTST testFerdinando Iucolano, Antonino Parisi, Santo Reina, Alessandro Chini. 4-1 [doi]
- On the origin of the leakage current in p-gate AlGaN/GaN HEMTsArno Stockman, E. Canato, Alaleh Tajalli, Matteo Meneghini, Gaudenzio Meneghesso, Enrico Zanoni, Peter Moens, Benoit Bakeroot. 4 [doi]
- Single pulse short-circuit robustness and repetitive stress aging of GaN GITsAlberto Castellazzi, Asad Fayyaz, Siwei Zhu, Thorsten Oeder, Martin Pfost. 4 [doi]
- Intra- and inter-chip electrical interconnection formed by directed self assembly of nanocomposite containing diblock copolymer and nanometalMariappan Murugesan, Takafumi Fukushima, Ji Chel Bea, H. Hashimoto, Mitsu Koyanagi. 4 [doi]
- Future on-chip interconnect metallization and electromigrationC.-K. Hu, James J. Kelly, Huai Huang, Koji Motoyama, Hosadurga Shobha, Y. Ostrovski, J. H.-C. Chen, Raghuveer Patlolla, Brown Peethala, Praneet Adusumilli, Terry A. Spooner, Roger Quon, L. M. Gignac, Chris M. Breslin, G. Lian, M. Ali, Jacob Benedict, X. S. Lin, S. Smith, V. Kamineni, X. Zhang, Frank Wilhelm Mont, S. Siddiqui, Frieder H. Baumann. 4 [doi]
- Scaling trends and bias dependence of the soft error rate of 16 nm and 7 nm FinFET SRAMsBalaji Narasimham, Saket Gupta, Daniel S. Reed, J. K. Wang, Nick Hendrickson, Hasan Taufique. 4 [doi]
- Hot electron and hot hole induced degradation of SiGe p-FinFETs studied by degradation maps in the entire bias spaceJacopo Franco, Ben Kaczer, Adrian Chasin, Erik Bury, Dimitri Linten. 5 [doi]
- Device reliability for CMOS image sensors with backside through-silicon viasJeff Peter Gambino, H. Soleimani, I. Rahim, B. Riebeek, L. Sheng, G. Hosey, H. Truong, Gavin D. R. Hall, R. Jerome, D. Price. 5 [doi]
- Investigation of degradation phenomena in GaN-on-Si power MIS-HEMTs under source current and drain bias stressesChih-Yi Yang, Tian-Li Wu, Tin-En Hsieh, Edward Yi Chang. 5-1 [doi]
- TSV process-induced MOS reliability degradationYunlong Li, Michele Stucchi, Stefaan Van Huylenbroeck, Geert Van der Plas, Gerald Beyer, Eric Beyne, Kristof Croes. 5 [doi]
- Reliability assessment of 4GSP/s interleaved SAR ADCR. Lajmi, Florian Cacho, O. David, J.-P. Blanc, Emmanuel Rouat, SĂ©bastien Haendler, Ph. Benech, Estelle Lauga-Larroze, Sylvain Bourdel. 5-1 [doi]
- Reliability perspective of resistive synaptic devices on the neuromorphic system performancePai-Yu Chen, Shimeng Yu. 5 [doi]
- Analysis of 28 nm SRAM cell stability under mechanical load applied by nanoindentationAndré Clausner, S. Schlipf, G. Kurz, M. Otto, J. Paul, Kay-Uwe Giering, J. Warmuth, André Lange, Roland Jancke, A. Aal, Rüdiger Rosenkranz, Martin Gall, Ehrenfried Zschech. 5 [doi]
- Impact of slow and fast oxide traps on In0.53Ga0.47As device operation studied using CET mapsV. Putcha, Jacopo Franco, Abhitosh Vais, Ben Kaczer, S. Sioncke, Dimitri Linten, Guido Groeseneken. 5 [doi]
- Recent advances in in-situ and in-field aging monitoring and compensation for integrated circuits: Invited paperMingoo Seok, Peter R. Kinget, Teng Yang, Jiangyi Li, Doyun Kim. 5 [doi]
- Reliability of next-generation field-effect transistors with transition metal dichalcogenidesYury Yu. Illarionov, A. J. Molina-Mendoza, Michael Waltl, Theresia Knobloch, Marco M. Furchi, T. Mueller, Tibor Grasser. 5 [doi]
- Study of dynamic TDDB in scaled FinFET technologiesK. Joshi, S. W. Chang, D.-S. Huang, P. J. Liao, Y. H. Lee. 5-1 [doi]
- PBTI in InGaAs MOS capacitors with Al2O3/HfO2/TiN gate stacks: Interface-state generationEduard Cartier, Martin M. Frank, Takashi Ando, John Rozen, Vijay Narayanan. 5 [doi]
- Reliability challenges for 2.5D/3D integration: An overviewC. S. Premachandran, Seungman Choi, Salvatore Cimino, Thuy Tran-Quinn, Lloyd Burrell, Patrick Justison. 5 [doi]
- Hot carrier degradation, TDDB, and 1/f noise in Poly-Si Tri-gate nanowire transistorYoko Yoshimura, Kensuke Ota, Masumi Saitoh. 5 [doi]
- Electromigration of multi-solder ball test structuresChristine S. Hau-Riege, Huilin Xu, You-Wen Yau, Manasi S. Kakade, Jianfeng Li, Xiaonan Zhang, Hosain Farr. 5 [doi]
- All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuitsGyusung Park, Minsu Kim, Chris H. Kim, Bongjin Kim, Vijay Reddy. 5 [doi]
- Design of aging aware 5 Gbps LVDS transmitter for automotive applicationsSrikanth Jagannathan, Kumar Abhishek, Nihaar N. Mahatme, Ender Yilmaz. 5 [doi]
- Reliability characteristics of MIM capacitor studied with ΔC-F characteristicsS. C. Kang, S. K. Lee, S. Heo, S.-M. Kim, S.-K. Lim, B. H. Lee. 5-1 [doi]
- Extended RVS characterisation of STT-MRAM devices: Enabling detection of AP/P switching and breakdownBarry J. O'Sullivan, Simon Van Beek, Philippe J. Roussel, S. Rao, Wonsub Kim, S. Couet, J. Swerts, F. Yasin, Dimitri Crotti, Dimitri Linten, Gouri Sankar Kar. 5-1 [doi]
- Designing soft-error-aware circuits with power and speed optimizationH. Jiang, H. Zhang, Balaji Narasimham, Lloyd W. Massengill, Bharat L. Bhuva. 5-1 [doi]
- Prediction of NBTI stress and recovery time kinetics in Si capped SiGe p-MOSFETsNarendra Parihar, Souvik Mahapatra. 5-1 [doi]
- Investigation of speed sensors accuracy for process and aging compensationR. Shah, Florian Cacho, Vincent Huard, Souhir Mhira, D. Arora, P. Agarwal, S. Kumar, S. Balaraman, B. Singh, Lorena Anghel. 5 [doi]
- Accelerated BTI degradation under stochastic TDDB effectDevyani Patra, Ahmed Kamal Reza, Mehdi Katoozi, Ethan H. Cannon, Kaushik Roy 0001, Yu Cao. 5 [doi]
- Role of electron and hole trapping in the degradation and breakdown of SiO2 and HfO2 filmsDavid Z. Gao, Jack Strand, A.-M. El-Sayed, Alexander L. Shluger, Andrea Padovani, Luca Larcher. 5 [doi]
- Understanding gate metal work function (mWF) impact on device reliability - A holistic approachP. Srinivasan, R. Ranjan, S. Cimino, A. Zainuddin, B. Kannan, L. Pantisano, I. Mahmud, G. Dilliway, Tanya Nigam. 6 [doi]
- Effects of Far-BEOL anneal on the WLR and product reliability characterization of FinFET process technologyHyun-Chul Sagong, Hyunjin Kim, Seungjin Choo, Sungyoung Yoon, Hyewon Shim, Sangsu Ha, Tae-Young Jeong, Minhyeok Choe, Junekyun Park, Sangchul Shin, Sangwoo Pae. 6 [doi]
- Investigation of the endurance of FE-HfO2 devices by means of TDDB studiesKarine Florent, A. Subirats, Simone Lavizzari, Robin Degraeve, U. Celano, Ben Kaczer, Luca Di Piazza, Mihaela Popovici, Guido Groeseneken, Jan Van Houdt. 6 [doi]
- An overview of autonomous vehicles safetyRiccardo Mariani. 6 [doi]
- Effect of measurement speed (ÎĽs-800 ps) on the characterization of reliability behaviors for FDSOI nMOSFETsYiming Qu, Ran Cheng, Wei Liu, Junkang Li, Bich-Yen Nguyen, Olivier Faynot, Nuo Xu, Bing Chen, Yi Zhao. 6 [doi]
- Carbon electrode for Ge-Se-Sb based OTS selector for ultra low leakage current and outstanding enduranceA. Verdy, G. Navarro, M. Bernard, S. Chevalliez, N. Castellani, E. Nolot, J. Garrione, P. Noe, G. Bourgeois, Veronique Sousa, M. C. Cyrille, E. Nowak. 6 [doi]
- Reliability benefits of a metallic liner in confined PCMW. Kim, S. Kim, R. Bruce, F. Carta, G. Fraczak, A. Ray, C. Lam, M. BrightSky, Y. Zhu, T. Masuda, K. Suu, Y. Xie, Y. Kim, J. J. Cha. 6 [doi]
- Performance & reliability of 3D architectures (πfet, Finfet, Ωfet)Antoine Laurent, Xavier Garros, Sylvain Barraud, J. Pelloux-Prayer, Mikaël Casse, F. Gaillard, X. Federspiel, D. Roy, E. Vincent, G. Ghibaudo. 6 [doi]
- Enhanced reliability of hexagonal boron nitride dielectric stacks due to high thermal conductivityXianhu Liang, Bin Yuan, Yuanyuan Shi, Fei Hui, Xu Jing, Mario Lanza, Felix Palumbo. 6-1 [doi]
- Key attributes to achieving > 99.99 satellite availabilityBrian Kosinski, Ken Dodson. 6 [doi]
- Weighted time lag plot defect parameter extraction and GPU-based BTI modeling for BTI variabilityVictor M. van Santen, Javier Diaz-Fortuny, Hussam Amrouch, Javier MartĂn-MartĂnez, Rosana RodrĂguez, Rafael Castro-LĂłpez, Elisenda Roca, Francisco V. Fernández, Jörg Henkel, Montserrat NafrĂa. 6-1 [doi]
- A new method for quickly evaluating reversible and permanent components of the BTI degradationX. Garros, Alexandre Subirats, Gilles Reimbold, F. Gaillard, C. Diouf, X. Federspiel, Vincent Huard, M. Rafik. 6-1 [doi]
- Making the connection between physics of failure and system-level reliability for medical devicesAndy Fenner, Mark Porter, Randy Crutchfield. 6 [doi]
- Area and pulsewidth dependence of bipolar TDDB in MgO magnetic tunnel junctionJ.-H. Lim, N. Raghavan, S. Mei, V. B. Naik, J. H. Kwon, S. M. Noh, B. Liu, E. H. Toh, N. L. Chung, R. Chao, K. H. Lee, K. L. Pey. 6 [doi]
- Electrical method to localize the high-resistance of nanoscale CoSi2 word-line for OTP memoriesMing-Yi Lee, T. Y. Chang, W.-F. Hsueh, L.-K. Kuo, D.-J. Lin, Y.-H. Chao, U. J. Tzeng, C. Y. Lu. 6 [doi]
- Threshold voltage bitmap analysis methodology: Application to a 512kB 40nm Flash memory test chipT. Kempf, Vincenzo Della Marca, L. Baron, F. Maugain, F. La Rosa, Stephan Niel, Arnaud RĂ©gnier, Jean Michel Portal, Pascal Masson. 6 [doi]
- Cathodoluminescence spectroscopy for failure analysis and process development of GaN-based microelectronic devicesC. Monachon, M. S. Zielinski, J. Berney, D. Poppitz, Andreas Graff, S. Breuer, L. Kirste. 6 [doi]
- BEOL TDDB reliability modeling and lifetime prediction using critical energy to breakdownPin-Shiang Chen, Shou Chung Lee, A. S. Oates, C. W. Liu. 6 [doi]
- A new mechanism of signal path charging damage across separated power domain deep N-Well interfaceYu-Lin Chu, Hsi-Yu Kuo, Sheng-Fu Hsu, Yung-Sheng Tsai, Ming-Yi Wang, Chuan-Li Chang, Bill Kiang, Kenneth Wu. 6 [doi]
- Transistor reliability characterization and modeling of the 22FFL FinFET technologyC.-Y. Su, M. Armstrong, L. Jiang, S. A. Kumar, C. D. Landon, S. Liu, I. Meric, K. W. Park, L. Paulson, K. Phoa, B. Sell, J. Standfest, K. B. Sutaria, J. Wan, D. Young, S. Ramey. 6 [doi]
- Comprehensive device and product level reliability studies on advanced CMOS technologies featuring 7nm high-k metal gate FinFET transistorsD.-S. Huang, J. H. Lee, Y. S. Tsai, Y. F. Wang, Y.-S. Huang, C. K. Lin, Ryan Lu, Jun He. 6 [doi]
- Ambient temperature and layout impact on self-heating characterization in FinFET devicesPeter C. Paliwoda, Zakariae Chbili, A. Kerber, D. Singh, D. Misra. 6 [doi]
- Lateral profiling of HCI induced damage in ultra-scaled FinFET devices with Id-Vd characteristicsMiaomiao Wang, Richard G. Southwick, Kangguo Cheng, James H. Stathis. 6 [doi]
- Reliability studies of a 10nm high-performance and low-power CMOS technology featuring 3rd generation FinFET and 5th generation HK/MGAnisur Rahman, Javier Dacuña, Pinakpani Nayak, Gerald S. Leatherman, Stephen Ramey. 6 [doi]
- Prognostics health management of electronic systems - A reliability physics approachPradeep Lall, Kazi Mirza, David Locker. 6 [doi]
- BVDSS (drain to source breakdown voltage) instability in shielded gate trench power MOSFETsJifa Hao, Amartya Ghosh, Mark Rinehimer, Joe Yedinak, Muhammad A. Alam. 6 [doi]
- Mechanical and chemical adhesion at the encapsulant interfaces in laminated photovoltaic modulesPhilippe Nivelle, Tom Borgers, Eszter Voroshazi, Jef Poortmans, Jan D'Haen, Ward De Ceuninck, Michael Daenen. 6 [doi]
- Evaluation of silicon, organic, and perovskite solar cell reliability with low-frequency noise spectroscopyGiovanni Landi, C. Barone, C. Mauro, S. Pagano, Heinz-Christoph Neitzert. 6 [doi]
- Non-poissonian behavior of hot carrier degradation induced variability in MOSFETsRoberta Bottini, Andrea Ghetti, Sara Vigano, Maria Grazia Valentini, Pratap Murali, Chandra Mouli. 6 [doi]
- Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technologyF. Griggio, J. Palmer, F. Pan, N. Toledo, A. Schmitz, I. Tsameret, R. Kasim, Gerald S. Leatherman, J. Hicks, A. Madhavan, J. Shin, J. Steigerwald, A. Yeoh, C. Auth. 6 [doi]
- Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologiesD. Singh, O. D. Restrepo, P. P. Manik, N. Rao Mavilla, H. Zhang, Peter C. Paliwoda, S. Pinkett, Y. Deng, E. Cruz Silva, J. B. Johnson, M. Bajaj, S. Furkay, Z. Chbili, A. Kerber, C. Christiansen, S. Narasimha, E. Maciejewski, S. Samavedam, C. H. Lin. 6 [doi]
- Permanent shunts from passing shadows: Reverse-bias damage in thin-film photovoltaic modulesTimothy J. Silverman, Steve Johnston. 6 [doi]
- Investigation of data pattern effects on nitride charge lateral migration in a charge trap flash memory by using a random telegraph signal methodY. H. Liu, H. Y. Lin, C. M. Jiang, Tahui Wang, W. J. Tsai, T. C. Lu, K.-C. Chen, Chih-Yuan Lu. 6 [doi]
- Chip-level characterization and RTN-induced error mitigation beyond 20nm floating gate flash memoryT. W. Lin, S. H. Ku, C. H. Cheng, C. W. Lee, Ijen Huang, Wen-Jer Tsai, T. C. Lu, W. P. Lu, K.-C. Chen, Tahui Wang, Chih-Yuan Lu. 6-1 [doi]
- Single-event effects on optical transceiverK. J. Lezon, S.-J. Wen, Y.-F. Dan, R. Wong, B. L. Bhuva. 6-1 [doi]
- Impact of specific failure mechanisms on endurance improvement for HfO2-based ferroelectric tunnel junction memoryMarina Yamaguchi, Shosuke Fujii, Yuuichi Kamimuta, Shoichi Kabuyanagi, Tsunehiro Ino, Yasushi Nakasaki, Riichiro Takaishi, Reika Ichihara, Masumi Saitoh. 6 [doi]
- Estimating transistor channel temperature using time-resolved and time-integrated NIR emissionFranco Stellari, Alan J. Weger, Keith A. Jenkins, Giuseppe La Rosa, Barry P. Linder, Peilin Song. 6 [doi]
- Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETsShaofeng Guo, Zhenghan Lin, Runsheng Wang, Zexuan Zhang, Zhe Zhang, Yangyuan Wang, Ru Huang. 6-1 [doi]
- Solving critical issues in 10nm technology using innovative laser-based fault isolation and DFT diagnosis techniquesLesly Endrinal, Rakesh Kinger, Lavakumar Ranganathan, Amit Sheth. 6 [doi]
- Modified transformerless dual buck inverter with improved lifetime for PV applicationsAhmad Khan, Frede Blaabjerg. 6 [doi]
- The first observation of p-type electromigration failure in full ruthenium interconnectsSofie Beyne, Shibesh Dutta, Olalla Varela Pedreira, Niels Bosman, Christoph Adelmann, Ingrid De Wolf, Zsolt Tokei, Kristof Croes. 6 [doi]
- Percolation defect nucleation and growth as a description of the statistics of electrical breakdown for gate, MOL and BEOL dielectricsYi Ching Ong, Shou Chung Lee, A. S. Oates. 7-1 [doi]
- PBTI evaluation of In0.65Ga0.35As/In0.53Ga0.47As nanowire FETs with Al2O3 and LaAlO3 gate dielectricsY. Li, K. L. Wang, S. Y. Di, P. Huang, G. Du, X. Y. Liu. 7-1 [doi]
- Error elimination ECC by horizontal error detection and vertical-LDPC ECC to increase data-retention time by 230% and acceptable bit-error rate by 90% for 3D-NAND flash SSDsShun Suzuki, Yoshiaki Deguchi, Toshiki Nakamura, Kyoji Mizoguchi, Ken Takeuchi. 7-1 [doi]
- Oxide breakdown path for optical sensing at the nanoscale levelY. Zhou, D. S. Ang, P. S. Kalaga, S. R. Gollu. 8-1 [doi]
- Interface engineering of ferroelectric negative capacitance FET for hysteresis-free switch and reliability improvementChia-Chi Fan, Chun-Yuan Tu, Ming-Huei Lin, Chun-Yen Chang, Chun-Hu Cheng, Yen-Liang Chen, Guan-Lin Liou, Chien Liu, Wu-Ching Chou, Hsiao-Hsuan Hsu. 8-1 [doi]
- High voltage time-dependent dielectric breakdown in stacked intermetal dielectricsSanghoon Shin, Yen-Pu Chen, Woojin Ahn, Honglin Guo, Byron Williams, Jeff West, Tom Bonifield, Dhanoop Varghese, Srikanth Krishnan, Muhammad A. Alam. 9-1 [doi]
- Method to assess the impact of LER and spacing variation on BEOL dielectric reliability using 2D-field simulations for <20nm spacingDeniz Kocaay, Philippe Roussel, Kristof Croes, Ivan Ciofi, Alicja Lesniewska, Ingrid De Wolf. 10-1 [doi]