Auxiliary testability design schemes for CMOS DACs with ultrahigh sampling rates

Bao Li, Long Zhao, Yuhua Cheng. Auxiliary testability design schemes for CMOS DACs with ultrahigh sampling rates. In Yajie Qin, Zhiliang Hong, Ting-Ao Tang, editors, 12th IEEE International Conference on ASIC, ASICON 2017, Guiyang, China, October 25-28, 2017. pages 36-39, IEEE, 2017. [doi]

Abstract

Abstract is missing.