Ahmed E. AbdelRahman - researchr alias

researchr

You are not signed in
Sign in
Sign up

Viewing Publication 1 - 8 from 8

2024

7.8 A 69.3fs Ring-Based Sampling-PLL Achieving 6.8GHz-14GHz and -54.4dBc Spurs Under 50mV Supply NoiseMahmoud A. Khalil, Mohamed Badr Younis, Ruhao Xia, Ahmed E. AbdelRahman, Tianyu Wang 0006, Kyu-Sang Park, Pavan Kumar Hanumolu. isscc 2024: 138-140 [doi]

2023

A Carrier-Phase-Recovery Loop for a 3.2pJ/b 24Gb/s QPSK Coherent Optical ReceiverAhmed E. AbdelRahman, Mostafa Gamal Ahmed, Mahmoud A. Khalil, Mohamed Badr Younis, Kyu-Sang Park, Pavan Kumar Hanumolu. isscc 2023: 208-209 [doi]

A Temperature- and Aging-Compensated RC Oscillator With ±1030-ppm Inaccuracy From40 °C to 85 °C After Accelerated Aging for 500 h at 125 °CKyu-Sang Park, Nilanjan Pal, Yongxin Li, Ruhao Xia, Tianyu Wang 0006, Ahmed E. AbdelRahman, Pavan Kumar Hanumolu. jssc, 58(12):3459-3469, December 2023. [doi]

A 1-μW/MHz RC Oscillator With Three-Point Trimmed 2.1-ppm/°C and Single-Point Trimmed 8.7-ppm/°C Stability From40 °C to 95 °CKyu-Sang Park, Amr Khashaba, Ahmed E. AbdelRahman, Yongxin Li, Tianyu Wang 0006, Ruhao Xia, Nilanjan Pal, Pavan Kumar Hanumolu. jssc, 58(7):2064-2074, 2023. [doi]

A $1.4\mu$ W/MHz 100MHz RC Oscillator with $\pm$ 1030ppm Inaccuracy from $-40^{\circ}\mathrm{C}$ to $85^{\circ}\mathrm{C}$ After Accelerated Aging for 500 Hours at $125^{\circ}\mathrm{C}$Kyu-Sang Park, Nilanjan Pal, Yongxin Li, Ruhao Xia, Tianyu Wang 0006, Ahmed E. AbdelRahman, Pavan Kumar Hanumolu. isscc 2023: 62-63 [doi]

A 5.2 Gb/s 3 mm Air-Gap 4.7 pJ/bit Capacitively-Coupled Transceiver for Giant Video Walls Enabled by a Dual-Edge Tracking Clock and Data Recovery LoopMohamed Badr Younis, Mostafa Gamal Ahmed, Tianyu Wang 0006, Ahmed E. AbdelRahman, Mahmoud A. Khalil, Anup P. Jose, Pavan Kumar Hanumolu. vlsit 2023: 1-2 [doi]

2021

Novel Decimation Topology with Improved Jitter Performance for Clock and Data Recovery SystemsMuhamed F. Allam, Ahmed E. AbdelRahman, Hesham Omran, Sameh A. Ibrahim. newcas 2021: 1-4 [doi]

2016

A fast-locking all-digital clock and data recovery circuit using successive approximationAhmed E. AbdelRahman, Sameh A. Ibrahim. mwscas 2016: 1-4 [doi]

Sign in or sign up to see more results.

runs on WebDSL