Table of Contents

• -1 and Enhanced-Colpitts Dual-Mode Operation Achieving 209dBc/Hz FoMTZehui Kang, Chen Yu, Liang Wu. 1-3 [doi]
• 31.9 An 85-264Vac to 3-4.2Vdc 1.05W Capacitive Power Converter with Idle Power Reduction and 4-Phase 1/10X SC Converter Achieving 5.11mW Quiescent Power and 78.2% Peak EfficiencyGang Liu, Han Wu, Chen Hu, Cheng Huang, Xun Liu, Junmin Jiang. 1-3 [doi]
• 8.8 A 97.18% Peak-Efficiency Asymmetrically Implemented Dual-phase (AID) Converter with a full Voltage-Conversion Ratio (VCR) between 0-and-1Hyo-Jin Park, Joo-Mi Cho, Chan-Ho Lee, Young-Ju Oh, Hyunwoo Jeong, Jun Hyeok Yang, Jaeseung Lee, Sung-Wan Hong. 1-3 [doi]
• 29.1 A 22nm FD-SOI <1.2mW/Active-Qubit AWG-Free Cryo-CMOS Controller for Fluxonium QubitsLoïck Le Guevel, Chen Wang, Joseph C. Bardin. 1-3 [doi]
• 1.1 Semiconductor Industry: Present & FutureKevin Zhang. 10-15 [doi]
• 1.2 Racing Down the Slopes of Moore's LawBram Nauta. 16-23 [doi]
• 1.3 Computing in the Era of Generative AIJonah Alben. 26-28 [doi]
• 1.4 Fueling Semiconductor Innovation and Entrepreneurship in the Next DecadeLip-Bu Tan. 29-33 [doi]
• 2.1 A 4nm 3.4GHz Tri-Gear Fully Out-of-Order ARMv9.2 CPU Subsystem-Based 5G Mobile SoCAnshul Varma, Sumanth Gururajarao, HsinChen Chen, Tao Chen, Gordon Gammie, Hugh Mair, Jen-Hang Yang, Hao-Hsiang Yu, Shun-Chieh Chang, Cheng-Hao Yang, Li-An Huang, Kumar Ramanathan, Ramesh Halli, Efron Ho, Ta-Wen Hung, Sung S.-Y. Hsueh, LiangChe Li, Achuta Thippana, Ericbill Wang, Sa Hwang. 36-38 [doi]
• 2.2 "Zen 4c": The AMD 5nm Area-Optimized ×86-64 Microprocessor CoreThomas Burd, Srividhya Venkataraman, Wilson Li, Timothy Johnson, Jerry Lee, Srikirti Velaga, Mark Wasio, Thomas Yiu, Franklin Bodine, Michael McCabe, Udin Salim, Santosh Kumar Thouta, Michael Golden, Sowmya Ramachandran, Gokul Subramani Lakshmi Devi, John Wu, Yarek Kuszczak, Gaurav Singla, Carson Henrion, Andy Robison, Sabeesh Balagangadharan, Umesh Nair, Naveen Srivastava, Hari Prasad, Mohini Polimetla, Phaneendra Chennupati, Eshwar Gupta, Mahesh Vykuntam, Sumantra Sarkar, Praveen Kumar Duvvuru, Theja Mardi, G. Swetha. 38-40 [doi]
• ® Scalable ProcessorsAshley O. Munch, Nevine Nassif, Carleton L. Molnar, Jason Crop, Rich Gammack, Chinmay P. Joshi, Goran Zelic, Kambiz Munshi, Min Huang, Charles Morganti, Sireesha Kandula, Arijit Biswas. 40-42 [doi]
• 2.4 ATOMUS: A 5nm 32TFLOPS/128TOPS ML System-on-Chip for Latency Critical ApplicationsChang-Hyo Yu, Hyo-Eun Kim, Sungho Shin, Kyeongryeol Bong, Hyunsuk Kim, Yoonho Boo, Jaewan Bae, Minjae Kwon, Karim Charfi, Jinseok Kim, Hongyun Kim, Myeongbo Shim, Changsoo Ha, Wongyu Shin, Jae-Sung Yoon, Miock Chi, Byungjae Lee, Sungpill Choi, Donghan Kim, Jeongseok Woo, Seokju Yoon, Hyunje Jo, Hyunho Kim, Hyun-Seok Heo, Young-Jae Jin, Jiun Yu, Jaehwan Lee, Hyunsung Kim, Minhoo Kang, Seokhyeon Choi, Seung-Goo Kim, Myung-Hoon Choi, Jungju Oh, Yunseong Kim, Haejoon Kim, Sangeun Je, Junhee Ham, Juyeong Yoon, Jaedon Lee, Seonhyeok Park, Youngseob Park, Jaebong Lee, Boeui Hong, Jaehun Ryu, Hyunseok Ko, Kwanghyun Chung, Jongho Choi, Sunwook Jung, Yashael Faith Arthanto, Jonghyeon Kim, Heejin Cho, Hyebin Jeong, Sungmin Choi, Sujin Han, Junkyu Park, Kwangbae Lee, Sung-il Bae, Jaeho Bang, Kyeong-Jae Lee, Yeongsang Jang, Jungchul Park, Sanggyu Park, Jueon Park, Hyein Shin, Sunghyun Park, Jinwook Oh. 42-44 [doi]
• 2.5 A 28nm Physical-Based Ray-Tracing Rendering Processor for Photorealistic Augmented Reality with Inverse Rendering and Background Clustering for Mobile DevicesShiyu Guo, Sachin S. Sapatnekar, Jie Gu 0003. 44-46 [doi]
• 2.6 A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication SystemsTang Lee, Ting-Yang Chen, I-Hsuan Liu, Chia-Hsiang Yang. 46-48 [doi]
• 2.7 BayesBB: A 9.6Gbps 1.61ms Configurable All-MessagePassing Baseband-Accelerator for B5G/6G Cell-Free Massive-MIMO in 40nm CMOSYi Zhang, Wenyue Zhou, YiWei Zhang, Houren Ji, Yongming Huang, Xiaohu You 0001, Chuan Zhang. 48-50 [doi]
• 2.8 A 21.9ns 15.7 Gbps/mm² (128,15) BOSS FEC Decoder for 5G/6G URLLC ApplicationsDongyun Kam, Sangbu Yun, Jeongwon Choe, Zhengya Zhang, Namyoon Lee, Youngjoo Lee. 50-52 [doi]
• 3.1 A PVT-Insensitive Sub-Ranging Current Reference Achieving 11.4ppm/°C from -20°C to 125°CPangi Park, Junghyup Lee, SeongHwan Cho. 54-56 [doi]
• 3.2 A 0.028mm² 32MHz RC Frequency Reference in 0.18μm CMOS with ±900ppm Inaccuracy from -40°C to 125°C and ±1600ppm Inaccuracy After Accelerated AgingSining Pan, Yihang Cheng, Guohua Wu, Zhihua Wang 0001, Kofi A. A. Makinwa, Huaqiang Wu. 56-58 [doi]
• 3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC CalibrationRui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. 58-60 [doi]
• 3.4 A 14b 98Hz-to-5.9kHz 1.7-to-50.8 μ W BW/Power Scalable Sensor Interface with a Dynamic Bandgap Reference and an Untrimmed Gain Error of ± 0.26 % from -40°C to 125°CZhong Tang, Yuyan Liu, Pengpeng Chen, Haining Wang, Xiaopeng Yu, Kofi A. A. Makinwa, Nianxiong Nick Tan. 60-62 [doi]
• 3.5 A 4mW 45pT/√Hz Magnetoimpedance-Based ΔΣ Magnetometer with Background Gain Calibration and Short-Time CDS TechniquesIppei Akita, Shunichi Tatematsu. 62-64 [doi]
• 3.6 An Amplifier-Less CMOS Potentiostat IC Consuming 3.7nW Power all over 129.5dB Dynamic Range for Electrochemical BiosensingMuhammad Abrar Akram, Aida Aberra, Soon-Jae Kweon, Sohmyung Ha. 64-66 [doi]
• 2 Resolution FoMNandor G. Toth, Kofi A. A. Makinwa. 66-68 [doi]
• 3.8 A 0.65V 900µm² BEoL RC-Based Temperature Sensor with ±1°C Inaccuracy from -25°C to 125°CBei-Shing Lien, Szu-Lin Liu, Wei-Lin Lai, Yi-Chen Lu, Yung-Chow Peng, Kenny Cheng-Hsiang Hsieh. 68-70 [doi]
• 3.9 A 1.2V High-Voltage-Tolerant Bootstrapped Analog Sampler in 12-bit SAR ADC Using 3nm GAA's 0.7V Thin-Gate-Oxide TransistorSangheon Lee, Jinwoo Park, Junsang Park, Sangkyu Lee, Jungho Lee, Youngjae Cho, Michael Choi, Jongshin Shin. 70-72 [doi]
• 3.10 A 0.69/0.58-PEF 1.6nW/24nW Capacitively Coupled Chopper Instrumentation Amplifier with an Input-Boosted First Stage in 22nm/180nm CMOSXinhang Xu, Siyuan Ye, Yaohui Luan, Jihang Gao, Jie Li, Jiajia Cui, Hao Zhang, Ru Huang, Linxiao Shen, Le Ye. 72-74 [doi]
• 4.1 A 79.7μW Two-Transceiver Direct-RF 7.875GHz UWB Radar SoC in 40nm CMOSNikolaj Andersen, Sumit Bagga, Jørgen Andreas Michaelsen, Håkon A. Hjortland, Lieuwe B. Leene, Torleif Skår, Espen Stenersen, Dag T. Wisland. 76-78 [doi]
• 4.2 A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving -46dB TX/RX EVM Floor at 7.1GHz for a 4K-QAM 320MHz SignalJongsoo Lee, Jaehyuk Jang, Wooseok Lee, Bosung Suh, Heeyong Yoo, Beomyu Park, Jeongkyun Woo, Jaeeun Jang, Inhyo Ryu, Honggul Han, Jaeyoung Kim, Byoungjoong Kang, Minchul Kang, HoJung Kang, John Kang, Minseob Lee, Danbi Lee, HyeonUk Son, Suhyeon Lee, Soyeon Kim, Hongjong Park, Sangsung Lee, Jeongyeol Bae, Huijung Kim, Joonhee Lee, Sangmin Yoo. 78-80 [doi]
• 2 Fully Integrated Legacy Cellular and 5G FR1 RF Transceiver with 24RX/3TX Supporting Inter-Band 7CA/5CA 4×4 MIMO with 1K-QAMJeongyeol Bae, Sangsung Lee, Joonggeun Lee, Ikkyun Jo, HeeSoo Kim, Kyunghyun Yoon, Taejong Kim, Jiyoung Lee, Myunghun Lee, Jaeseung Lee, JongMin Jeong, SungJun Lee, Taewan Kim, Sungjoo Kim, Gwangsik Cho, Duksoo Kim, Sangyun Lee, Pilsung Jang, Euibong Yang, Jeongmin Song, Gwangchun Park, Se-Eun Choi, Juhee Son, Won Ko, Jonghyun Kim, Seong-Ho Park, Sangho Lee, Yoonki Lee, Euiyoung Park, Pillseong Kang, Taeyeon Kim, Hyojin Lee, Byungki Han, Joonhee Lee, Jongsoo Lee, Sangmin Yoo. 80-82 [doi]
• 4.4 A Highly-Integrated 6-Phase Cell-Reused Digital Transmitter Using 1/3 Duty-Cycle LO Signals for Harmonic RejectionJiaxiang Li, Zimu Li, Yun Yin, Changgu Yan, Nan Qi, Ming Liu, Hongtao Xu. 82-84 [doi]
• 4.5 A Reconfigurable, Multi-Channel Quantized-Analog Transmitter with <-35dB EVM and <-51dBc ACLR in 22nm FDSOIJohn Zhong, Konstantinos Vasilakopoulos, Antonio Liscidini. 84-86 [doi]
• 5.1 A 5-to-16GHz Reconfigurable Quadrature Receiver with 50% Duty-Cycle LO and IQ-Leakage SuppressionHao Xu 0005, Junyan Bi, Tenghao Zou, Weitao He, Yaxin Zeng, Junjie Gu, Ziyang Jiao, Shubin Liu, Zhangming Zhu, Na Yan. 88-90 [doi]
• th IB Harmonic B1dBSoroush Araei, Shahabeddin Mohin, Negar Reiskarimian. 90-92 [doi]
• 2 18-to-21GHz Non-Uniform Sub-Sampling Receiver with a Non-Uniform Discrete-Time FIR Filter Achieving 42dB Blocker Rejection in 28nm CMOSMostafa Ayesh, Soumya Mahapatra, Ce Yang, Mike Shuo-Wei Chen. 92-94 [doi]
• 5.4 A 22.4-to-30.7GHz Phased-Array Receiver with Beam-Pattern Null-Steering and Beam-Tracking Techniques Achieving >30.2dB OTA-Tested Spatial RejectionYiming Yu, Bohan Sun, Mengqian Geng, Chenxi Zhao, Huihua Liu, Yunqiu Wu, Jingzhi Zhang, Kai Kang. 94-96 [doi]
• 5.5 A Stacking Mixer-First Receiver Achieving >20dBm Adjacent-Channel IIP3 Consuming less than 25mWStef van Zanten, Ronan A. R. van der Zee, Bram Nauta. 96-98 [doi]
• 6.1 12Mb/s 4×4 Ultrasound MIMO Relay with Wireless Power and Communication for Neural InterfacesErnest So, Amin Arbabian. 100-102 [doi]
• 6.2 An Ultrasound-Powering TX with a Global Charge-Redistribution Adiabatic Drive Achieving 69% Power Reduction and 53° Maximum Beam Steering Angle for Implantable ApplicationsMarios Gourdouparis, Chengyao Shi, Yuming He, Stefano Stanzione, Robert Ukropec, Pieter Gijsenbergh, Veronique Rochus, Nick Van Helleputte, Wouter A. Serdijn, Yao-Hong Liu. 102-104 [doi]
• 6.3 Imager with In-Sensor Event Detection and Morphological Transformations with 2.9pJ/pixel×frame Object Segmentation FOM for Always-On Surveillance in 40nmJapesh Vohra, Animesh Gupta, Massimo Alioto. 104-106 [doi]
• 6.4 A Resonant High-Voltage Pulser for Battery-Powered Ultrasound DevicesImad Bellouki, Nuriel Rozsa, Zu-yao Chang, Zhao Chen 0001, Mingliang Tan, Michiel A. P. Pertijs. 106-108 [doi]
• 6.5 A 0.5° - Resolution Hybrid Dual-Band Ultrasound Imaging SoC for UAV ApplicationsJiaqi Guo, Junwei Feng, Silin Chen, Liuhao Wu, Chne Wuen Tsai, Yingna Huang, Bochi Lin, Jerald Yoo. 108-110 [doi]
• 6.7 A 160×120 Flash LiDAR Sensor with Fully Analog-Assisted In- Pixel Histogramming TDC Based on Self-Referenced SAR ADCSu-Hyun Han 0001, Seonghyeok Park, Jung-Hoon Chun, Jaehyuk Choi 0001, Seong-Jin Kim. 112-114 [doi]
• 6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D InpaintingChaorui Zou, Yaozhong Ou, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang. 114-116 [doi]
• 6.9 A 0.35V 0.367TOPS/W Image Sensor with 3-Layer Optical-Electronic Hybrid Convolutional Neural NetworkXuecheng Wang, Zheng Huang, Tianyi Liu, Wanxin Shi, Hongwei Chen, Milin Zhang. 116-118 [doi]
• 6.10 A 1/1.56-inch 50Mpixel CMOS Image Sensor with 0.5μm pitch Quad Photodiode Separated by Front Deep Trench IsolationDonghyun Kim, Kwansik Cho, Ho-Chul Ji, Minkyung Kim, Junghye Kim, Taehoon Kim, Seungju Seo, Dongmo Im, You-Na Lee, Jinyong Choi, Sunghyun Yoon, Inho Noh, Jinhyung Kim, Khang June Lee, Hyesung Jung, Jongyoon Shin, Hyuk Hur, Kyoung Eun Chang, Incheol Cho, Kieyoung Woo, Byung Seok Moon, Jameyung Kim, Yeonsoo Ahn, Dahee Sim, Sungbong Park, Wook Lee, Kooktae Kim, Chong Kwang Chang, Hansik Yoon, Juha Kim, Sung-In Kim, Hyunchul Kim, Chang-Rok Moon, Jaihyuk Song. 118-120 [doi]
• 6.11 A 320x240 CMOS LiDAR Sensor with 6-Transistor nMOS-Only SPAD Analog Front-End and Area-Efficient Priority Histogram MemoryMinkyung Kim, Hyeongseok Seo, Songhyeon Kim, Jung-Hoon Chun, Seong-Jin Kim, Jaehyuk Choi 0001. 120-122 [doi]
• 7.1 A 2.69pJ/b 212Gb/s DSP-Based PAM-4 Transceiver for Optical Direct-Detect Application in 5nm FinFETJ. Q. Wang, A. Tan, A. Iyer, A. Fan, A. Farhoodfar, B. Alnabulsi, B. Smith, C. Loi, C. R. Ho, D. Cartina, Jamal Riani, J. Casanova, K. Raviprakash, L. Patra, L. Wang, M. Bachu, S. Ray, S. Chong, S. Dallaire, T. Nguyen, Tzu-Fan Wu, V. Giridharan, V. Gurumoorthy, X. Ding, Y. Yin, Z. Sun, S. Jantzi, L. Tse. 123-125 [doi]
• 7.2 A 224Gb/s sub pJ/b PAM-4 and PAM-6 DAC-Based Transmitter in 3nm FinFETMarco Cusmai, Noam Familia, Elad Kuperberg, Mohammad Nashash, Dovid Gottesman, Daljeet Kumar, Zvi Marcus, Yeshayahu Horwitz, Sagi Zalcman, Jihwan Kim, Sandipan Kundu, Ilia Radashkevich, Yoav Segal, Dror Lazar, Udi Virobnik, Mike Peng Li, Ariel Cohen. 126-128 [doi]
• 7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOSDirk Pfaff, Muhammad Nummer, Noman Hai, Peter Xia, Kai Ge Yang, Mohammad-Mahdi Mohsenpour, Marc-Andre LaCroix, Babak Zamanlooy, Tom Eeckelaert, Dmitry Petrov, Mostafa Haroun, Carson Dick, Alif Zaman, HaiTao Mei, Shahab Moazzeni, Tahseen Shakir, Carlos Carvalho, Howard Huang, Pratibha Kumari, Ralph Mason, Fahmida Brishty, Ifrah Jaffri. 128-130 [doi]
• 2 5.6-7.8GHz Ring-Oscillator-Based Ping-Pong Sampling PLL Scoring 220.3fsrms Jitter and -74.2dBc Reference SpurYunbo Huang, Yong Chen 0005, Zunsong Yang, Rui Paulo Martins, Pui-In Mak. 130-132 [doi]
• 7.5 A 224Gb/s/wire Single-Ended PAM-4 Transceiver Front-End with 29dB Equalization for 800GbE/1.6TbEXiongshi Luo, Xuewei You, Zhenghao Li, Hamed Mosalam, Dongfan Xu, Taiyang Fan, Hongchang Qiao, Wentao Zhou, Hongzhi Wu, Liping Zhong, Patrick Yin Chiang, Quan Pan 0002. 132-134 [doi]
• 7.6 A 112Gb/s/pin Single-Ended Crosstalk-Cancellation Transceiver with 31dB Loss Compensation in 28nm CMOSLiping Zhong, Hongzhi Wu, Yangyi Zhang, Xuxu Cheng, Weitao Wu, Catherine Wang, Xiongshi Luo, Taiyang Fan, Dongfan Xu, Quan Pan 0002. 134-136 [doi]
• 7.7 A 2.16pJ/b 112Gb/s PAM-4 Transceiver with Time-Interleaved 2b/3b ADCs and Unbalanced Baud-Rate CDR for XSR Applications in 28nm CMOSYen-Po Lin, Pen-Jui Peng, Chun-Chang Lu, Po-Ting Shen, Yun-Cheng Jao, Ping-Hsuan Hsieh. 136-138 [doi]
• 7.8 A 69.3fs Ring-Based Sampling-PLL Achieving 6.8GHz-14GHz and -54.4dBc Spurs Under 50mV Supply NoiseMahmoud A. Khalil, Mohamed Badr Younis, Ruhao Xia, Ahmed E. AbdelRahman, Tianyu Wang 0006, Kyu-Sang Park, Pavan Kumar Hanumolu. 138-140 [doi]
• 7.9 An 8b 6-12GHz 0.18mW/GHz DC Modulated Ramp-Based Phase Interpolator in 65nm CMOS ProcessSoumen Mohapatra, Emad Afshar, Zhiyuan Zhou, Deukhyoun Heo. 140-142 [doi]
• 2-Power-Density Single-Inductor Bipolar-Output Converter with a Concise PWM Control for AMOLED DisplaysJi Jin, Weiwei Xu, Lin Cheng. 144-146 [doi]
• 8.2 A 96.9%-Peak-Efficiency Bilaterally-Symmetrical Hybrid Buck-Boost Converter Featuring Seamless Single-Mode Operation, Always-Reduced Inductor Current, and the Use of All CMOS SwitchesDae-Hyeon Kim, Hyun-Sik Kim. 146-148 [doi]
• A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS RateJunyi Ruan, Junmin Jiang, Chenzhou Ding, Kai Yuan, Ka Nang Leung, Xun Liu. 148-150 [doi]
• 8.4 A Fast-Transient 3-Fine-Level Buck-Boost Hybrid DC-DC Converter with Half-Voltage-Stress on All Switches and 98.2% Peak EfficiencyShuangxing Zhao, Chenchang Zhan, Yan Lu 0002. 150-152 [doi]
• 8.5 A 6nA Fully-Autonomous Triple-Input Hybrid-Inductor-Capacitor Multi-Output Power Management System with Multi-Rail Energy Sharing, All-Rail Cold Startup, and Adaptive Conversion Control for mm-scale Distributed SystemsXinjian Liu, Anjali Agrawal, Akiyoshi Tanaka, Benton H. Calhoun. 152-154 [doi]
• 8.7 A 92.7% Peak Efficiency 12V-to-60V Input to 1.2V Output Hybrid DC-DC Converter Based on a Series-Parallel-Connected Switched CapacitorHyeon-Ji Choi, Chan-Ho Lee, Young Jun Jeon, Hyeonho Park, Jeong Hun Kim, Young-Jin Woo, Ju-Pyo Hong, Haifeng Jin, Sung-Wan Hong. 156-158 [doi]
• 8.9 A 96.5% Peak Efficiency Duty-Independent DC-DC Step-Up Converter with Low Input-Level Voltage Stress and Mode-Adaptive Inductor Current ReductionMinsu Kim, Woojoong Jung, Hyunjun Park, Junho Song, Youngkook Ahn, Taekyu Nam, Yoonsoo Shin, Young-Jin Woo, Hyung-Min Lee. 160-162 [doi]
• 8.10 A 5V-to-150V Input-Parallel Output-Series Hybrid DC-DC Boost Converter Achieving 76.4mW/mg Power Density and 80% Peak EfficiencyShousheng Han, Zanfeng Fang, Zhiguo Tong, Xiaoming Wu, Hanjun Jiang, Tianling Ren, Yan Lu. 162-164 [doi]
• 8.11 A 48V-to-5V Buck Converter with Triple EMI Suppression Circuit Meeting CISPR 25 Automotive StandardsYi-Hsiang Kao, Chieh-Sheng Hung, Hui-Hsuan Chang, Wei-Cheng Huang, Rong-Bin Guo, Hsing-Yen Tsai, Ke-Horng Chen, Kuo-Lin Zeng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 164-166 [doi]
• 9.1 A 2mW 70.7dB SNDR 200MS/s Pipelined-SAR ADC with Continuous-Time SAR-Assisted Detect-and-Skip and Open-then-Close Correlated Level ShiftingSiyuan Ye, Linxiao Shen, Jihang Gao, Jie Li, Zhuoyi Chen, Xinhang Xu, Jiajia Cui, Hao Zhang, Xing Zhang, Le Ye, Ru Huang. 168-170 [doi]
• 9.2 A 2.08mW 64.4dB SNDR 400MS/s 12b Pipelined-SAR ADC using Mismatch and PVT Variation Tolerant Dynamically Biased Ring Amplifier in 8nmYong Lim, Jaehoon Lee, Jongmi Lee, Kwangmin Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak. 170-172 [doi]
• 9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMsXiyu He, Mingyang Gu, Hanjun Jiang, Yi Zhong, Nan Sun 0001, Lu Jie 0008. 172-174 [doi]
• 9.4 A 182.3dB FoMs 50MS/s Pipelined-SAR ADC using Cascode Capacitively Degenerated Dynamic Amplifier and MSB Pre-Conversion TechniqueZhuoyi Chen, Linxiao Shen, Siyuan Ye, Jihang Gao, Jie Li, Jiajia Cui, Xinhang Xu, Yaohui Luan, Hao Zhang, Le Ye, Ru Huang. 174-176 [doi]
• 9.5 A 118.5dBA DR 3.3mW Audio ADC with a Class-B Resistor DAC, Non-Overlap DEM and Continuous-Time QuantizerAnand Subramanian, Tanmay Halder, Laxmi Vivek Tripurari, Anand Kannan. 176-178 [doi]
• th-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nmJongmi Lee, Seong Eun Cho, Jaehoon Lee, Yong Lim, Seunghyun Oh, Jongwoo Lee, Sung-Ung Kwak. 178-180 [doi]
• th-Order Noise-Shaping SAR ADC with Dynamic-Amplifier-Assisted Cascaded IntegratorKai-Cheng Cheng, Soon-Jyh Chang, Chung-Chieh Chen, Shuo-Hong Hung. 180-182 [doi]
• 9.8 A 9.3nV/rtHz 20b 40MS/s 94.2dB DR Signal-Chain Friendly Precision SAR ConverterRares Bodnar, Henry Kennedy 0001, Christopher P. Hurrell, Asif Ahmad, Mark Vickery, Luke Smithers, William Buckley, Monsoon Dutt, Pasquale Delizia, Derek Hummerston, Pawel Czapor. 182-184 [doi]
• 9.9 A 2.72fJ/conv 13b 2MS/s SAR ADC Using Dynamic Capacitive Comparator with Wide Input Common ModeSewon Lee, Hyein Kang, MinJae Lee. 184-186 [doi]
• 10.1 An 8.75GHz Fractional-N Digital PLL with a Reverse-Concavity Variable-Slope DTC Achieving 57.3fsrms Integrated Jitter and -252.4dB FoMMichele Rossoni, Simone Mattia Dartizio, Francesco Tesolin, Giacomo Castoro, Riccardo Dell'Orto, Carlo Samori, Andrea Leonardo Lacaita, Salvatore Levantino. 188-190 [doi]
• 10.2 A 5.5μs-Calibration-Time, Low-Jitter, and Compact-Area Fractional-N Digital PLL Using the Recursive-Least-Squares (RLS) AlgorithmSeheon Jang, Munjae Chae, Hangi Park, Chanwoong Hwang, Jaehyouk Choi. 190-192 [doi]
• 10.3 A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated JitterDingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada. 192-194 [doi]
• 10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering SpursMichael Peter Kennedy, Valerio Mazzaro, Stefano Tulisi, Micheál Scully, Niall McDermott, James Breslin. 194-196 [doi]
• 10.5 A 76 fsrms- Jitter and -65dBc- Fractional-Spur Fractional-N Sampling PLL Using a Nonlinearity-Replication TechniqueYuhwan Shin, Junseok Lee, Juyeop Kim, Yongwoo Jo, Jaehyouk Choi. 196-198 [doi]
• 10.6 A 10GHz FMCW Modulator Achieving 680MHz/μs Chirp Slope and 150kHz rms Frequency Error Based on a Digital-PLL with a Non-Uniform Piecewise-Parabolic Digital PredistortionFrancesco Tesolin, Simone Mattia Dartizio, Giacomo Castoro, Francesco Buccoleri, Michele Rossoni, Dmytro Cherniak, Carlo Samori, Andrea Leonardo Lacaita, Salvatore Levantino. 198-200 [doi]
• 10.7 An 11GHz 2nd-order DPD FMCW Chirp Generator with 0.051% rms Frequency Error under a 2.3GHz Chirp Bandwidth, 2.3GHz/μs Slope, and 50ns Idle Time in 65nm CMOSXuan Wang, Xujun Ma, Yupeng Fu, YuQian Zhou, Ang Li, Shuo Yang, Xu Wu, Dongming Wang 0002, Lianming Li, Xiaohu You 0001. 200-202 [doi]
• 10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz ReferenceByeong-Taek Moon, Hyun-Chul Park, Sang-Gug Lee. 202-204 [doi]
• 10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase AlignmentHaoran Li, Tailong Xu, Xi Meng, Jun Yin 0001, Rui Paulo Martins, Pui-In Mak. 204-206 [doi]
• 11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area FootprintTony F. Wu, Huichu Liu, H. Ekin Sumbul, Lita Yang, Dipti Baheti, Jeremy Coriell, William Koven, Anu Krishnan, Mohit Mittal, Matheus Trevisan Moreira, Max Waugaman, Laurent Ye, Edith Beigné. 210-212 [doi]
• 11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the EdgePascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam-Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou. 212-214 [doi]
• 11.4 IBM NorthPole: An Architecture for Neural Network Inference with a 12nm ChipAndrew S. Cassidy, John V. Arthur, Filipp Akopyan, Alexander Andreopoulos, Rathinakumar Appuswamy, Pallab Datta, Michael V. DeBole, Steven K. Esser, Carlos Ortega-Otero, Jun Sawada, Brian Taba, Arnon Amir, Deepika Bablani, Peter J. Carlson, Myron D. Flickner, Rajamohan Gandhasri, Guillaume Garreau, Megumi Ito, Jennifer L. Klamo, Jeffrey A. Kusnitz, Nathaniel J. McClatchey, Jeffrey L. McKinstry, Yutaka Y. Nakamura, Tapan K. Nayak, William P. Risk, Kai Schleupen, Ben Shaw 0001, Jay Sivagnaname, Daniel F. Smith, Ignacio Terrizzano, Takanori Ueda, Dharmendra S. Modha. 214-215 [doi]
• 12.1 Monolithically Integrated Sub-63 fJ/b 8-Channel 256Gb/s Optical Transmitter with Autonomous Wavelength Locking in 45nm CMOS SOIKaisarbek Omirzakhov, Firooz Aflatouni. 218-220 [doi]
• 12.2 A mm-Wave/Sub-THz Synthesizer-Free Coherent Receiver with Phase Reconstruction Through Mixed-Signal Kramer-Kronig ProcessingSherif Ghozzy, Muhamed Allam, Emir Ali Karahan, Zheng Liu, Kaushik Sengupta. 220-222 [doi]
• 12.3 A Scalable and Instantaneously Wideband 5GS/s RF Correlator Based on Charge Thresholding Achieving 8-bit ENOB and 152 TOPS/W Compute EfficiencyKareem Rashed, Aswin Chowdary Undavalli, Shantanu Chakrabartty, Aravind Nagulu, Arun Natarajan 0001. 222-224 [doi]
• 12.4 A 19μW 200Mb/s loT Tag Demonstrating High-Definition Video Streaming via a Digital-Switch-Based Reconfigurable 16-QAM Backscatter Communication TechniqueYongling Zhang, Rongliang Luo, Ji Xiong, Siqi Liang, Miao Meng. 224-226 [doi]
• 12.5 A Packageless Anti-Tampering Tag Utilizing Unclonable Sub-THz Wave Scattering at the Chip-Item InterfaceEunseok Lee 0002, Xibi Chen, Maitreyi Ashok, Jae Yeon Won, Anantha P. Chandrakasan, Ruonan Han 0001. 226-228 [doi]
• 12.6 A 64.4% Efficiency 5.8GHz RF Wireless Power Transfer Receiver with GaAs E-pHEMT Rectifier and 45.2µs MPPT Time SIDITO Buck-Boost Converter Using VOC Prediction SchemeKyohei Ichikawa, Tatsuki Iwata, Saya Onishi, Tomohiro Higuchi, Yuya Hirose, Naoki Sakai, Kenji Itoh, Kousuke Miyaji. 228-230 [doi]
• 13.1 A 35.4Gb/s/pin 16Gb GDDR7 with a Low-Power Clocking Architecture and PAM3 IO CircuitryJaehyeok Yang, Hyeongjun Ko, Kyunghoon Kim, Hyunsu Park, Jihwan Park, Ji-Hyo Kang, Jin-Youp Cha, Seongjin Kim, Youngtaek Kim, Minsoo Park, Gangsik Lee, Keonho Lee, Sanghoon Lee, Gyunam Jeon, Sera Jeong, Yongsuk Joo, Jaehoon Cha, Seonwoo Hwang, Boram Kim, Sang-Yeon Byeon, Sungkwon Lee, Hyeonyeol Park, Joohwan Cho, Jonghwan Kim. 232-234 [doi]
• th-Generation 10nm DRAM ProcessIkJoon Choi, Seunghwan Hong, Kihyun Kim, Jeongsik Hwang, Seunghan Woo, Young Sang Kim, Cheongryong Cho, Eun-Young Lee, Hun-Jae Lee, Min-su Jung, Hee-Yun Jung, Ju-Seong Hwang, Junsub Yoon, Wonmook Lim, Hyeong-Jin Yoo, Won Ki Lee, Jung-Kyun Oh, Dong Su Lee, Jong-eun Lee, Jun-Hyung Kim, Young Kwan Kim, Su-Jin Park, Byung-Kyu Ho, Byongwook Na, Hye-In Choi, Chung Ki Lee, Soo Jung Lee, Hyunsung Shin, Young Kyu Lee, Jang-Woo Ryu, Sangwoong Shin, Sungchul Park, Daihyun Lim, Seung-Jun Bae, Young-Soo Sohn, Tae-young Oh, Sangjoon Hwang. 234-236 [doi]
• 13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO RateWontaeck Jung, Hyunggon Kim, Do-Bin Kim, Tae-Hyun Kim, Nam Hee Lee, Dongjin Shin, Minyoung Kim, Youngsik Rho, Hun-Jong Lee, Yujin Hyun, Jaeyoung Park, Taekyung Kim, Hwiwon Kim, Gyeongwon Lee, Jisang Lee, Joonsuc Jang, Jungmin Park, Sion Kim, Su Chang Jeon, Suyong Kim, Jung-Ho Song, Min-Seok Kim, Taesung Lee, Byung-Kwan Chun, Tongsung Kim, Young Gyu Lee, Hokil Lee, Soowoong Lee, Hwaseok Lee, Dooho Cho, Sangwan Nam, Yeomyung Kim, Kunyong Yoon, Yoonjae Lee, Sunghoon Kim, Jungseok Hwang, Raehyun Song, Hyunsik Jang, Jae-Ick Son, Hongsoo Jeon, Myunghun Lee, Mookyung Lee, Kisung Kim, Eungsuk Lee, Myeong-Woo Lee, Sungkyu Jo, Chan Ho Kim, Jong Chul Park, Kyunghwa Yun, Soonock Seol, Ji-Ho Cho, Seungjae Lee, Jin-yub Lee, Sunghoi Hur. 236-237 [doi]
• 13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area OptimizationJinhyung Lee, Kyungjun Cho, Chang Kwon Lee, Yeonho Lee, Jae Hyung Park, Su-Hyun Oh, Yucheon Ju, Chunseok Jeong, Ho Sung Cho, Jaeseung Lee, Tae Sik Yun, Jin-Hee Cho, Sangmuk Oh, Junil Moon, Young-Jun Park, Hong-Seok Choi, In-Keun Kim, Seung-Min Yang, Sun-Yeol Kim, Jaemin Jang, Jinwook Kim, Seong-Hee Lee, Younghyun Jeon, Juhyung Park, Tae-Kyun Kim, Dongyoon Ka, Sanghoon Oh, Jinse Kim, Junyeol Jeon, Seonhong Kim, Kyeong Tae Kim, Taeho Kim, Hyeonjin Yang, Dongju Yang, Minseop Lee, Heewoong Song, Dongwook Jang, Junghyun Shin, Hyunsik Kim, Chang-Ki Baek, Hajun Jeong, Jongchan Yoon, Seung-Kyun Lim, Kyo Yun Lee, Young Jun Koo, Myeong-Jae Park, Joohwan Cho, Jonghwan Kim. 238-240 [doi]
• 13.5 A 64Gb/s/pin PAM4 Single-Ended Transmitter with a Merged Pre-Emphasis Capacitive-Peaking Crosstalk-Cancellation Scheme for Memory Interfaces in 28nm CMOSWeitao Wu, Hongzhi Wu, Liping Zhong, Xuxu Cheng, Xiongshi Luo, Dongfan Xu, Catherine Wang, Zhenghao Li, Quan Pan 0002. 240-242 [doi]
• 13.6 A 16Gb 37Gb/s GDDR7 DRAM with PAM3-Optimized TRX Equalization and ZQ CalibrationSung-Yong Cho, Moon-Chul Choi, Jaehyeok Baek, Donggun An, Sanghoon Kim, Daewoong Lee, Seongyeal Yang, Gil-Young Kang, Juseop Park, Kyungho Lee, Hwan-Chul Jung, Gun-hee Cho, Chanyong Lee, Hye-Ran Kim, Yong-Jae Shin, Hanna Park, Sangyong Lee, Jonghyuk Kim, Bokyeon Won, Jungil Mok, Kijin Kim, Unhak Lim, Hong-Jun Jin, Youngseok Lee, Young-Tae Kim, Heonjoo Ha, Jinchan Ahn, Wonju Sung, Yoontaek Jang, Hoyoung Song, Hyodong Ban, Taehoon Park, Tae-young Oh, Changsik Yoo, Sangjoon Hwang. 242-244 [doi]
• 13.7 A 1Tb Density 3b/Cell 3D-NAND Flash on a 2YY-Tier Technology with a 300MB/s Write ThroughputKoichi Kawai, Yuichi Einaga, Yoko Oikawa, Yankang He, Biagio Iorio, Shigekazu Yamada, Yoshihiko Kamata, Tomoko Iwasaki, Andrea D'Alessandro, Erwin Yu, Arvind Muralidharan, Qinge Li, Henry Nguyen, Kim-Fung Chan, Michele Piccardi, Takaaki Ichikawa, Jeff Yu, Guan Wang, Kwangwon Kim, Chulbum Kim, Paolo Mangalindan, Hojung Yun, Luca Nubile, Kapil Verma, Sushanth Bhushan, Dheeraj Srinivasan, Hidehiko Kuge, Rajesh Subramanian, Jiro Kishimoto, Toru Kamijo, Padma Musunuri, Chang Siau, Ramin Ghodsi. 244-246 [doi]
• 13.8 A 1a-nm 1.05V 10.5Gb/s/pin 16Gb LPDDR5 Turbo DRAM with WCK Correction Strategy, a Voltage-Offset-Calibrated Receiver and Parasitic Capacitance ReductionYangho Seo, Jihee Choi, Sunki Cho, Hyunwook Han, Wonjong Kim, Gyeongha Ryu, Jungil Ahn, Younga Cho, Sungphil Choi, Seohee Lee, Wooju Lee, Chaehyuk Lee, Kiup Kim, Seongseop Lee, Sangbeom Park, Minjun Choi, Sungwoo Lee, Mino Kim, Taekyun Shin, Hyeongsoo Jeong, Hyunseung Kim, Houk Song, Yunsuk Hong, Seokju Yoon, Giwook Park, Hokeun You, Changkyu Choi, Hae Kang Jung, Joohwan Cho, Jonghwan Kim. 246-248 [doi]
• 13.9 A 25.2Gb/s/pin NRZ/PAM-3 Dual-Mode Transmitter with Embedded Partial DBI Achieving a 133% I/O Bandwidth/Pin Efficiency and 19.3% DBI EfficiencyChanheum Han, Ki-Soo Lee, Joo-Hyung Chae. 248-250 [doi]
• 13.10 A 4nm 48Gb/s/wire Single-Ended NRZ Parallel Transceiver with Offset-Calibration and Equalization Schemes for Next-Generation Memory Interfaces and ChipletsKihwan Seong, Wooseuk Oh, HyunWoo Lee, Gyeom-Je Bae, Youngseob Suh, Hyemun Lee, Juyoung Kim, Eunsu Kim, Yeongeon Kang, Gunhu Mo, Youjin Lee, Mingyeong Kim, Seongno Lee, Donguk Park, Byoung-Joo Yoo, Hyo-Gyuem Rhew, Jongshin Shin. 250-252 [doi]
• 14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoCMonodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan 0001, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang 0333, Vidhi Zalani, Jintao Zhang, Xin Zhang 0025, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang. 254-256 [doi]
• 14.2 Proactive Voltage Droop Mitigation Using Dual-Proportional-Derivative Control Based on Current and Voltage Prediction Applied to a Multicore Processor in 28nm CMOSWeiwei Shan, Kaize Zhou, Keran Li, Yuxuan Du, Zhuo Chen, Junyi Qian, Haitao Ge, Jun Yang 0006, Xin Si. 256-258 [doi]
• 14.3 A 3nm Adaptive Clock Duty-Cycle Controller for Mitigating Aging-Induced Clock Duty-Cycle DistortionDaniel Yingling, Yimai Peng, Robert Vachon, Dipti Pal, Sagar Jariwala, Felipe G. Cabral, Jason Hu, Rajan Verma, Vamshidhar Chiranji, Anil Kumar, Santanu Sarma, Keith A. Bowman. 258-260 [doi]
• 14.4 A Fully Digital Current Sensor Offering Per-Core Runtime Power for System Budgeting in a 4nm-Plus Octa-Core CPUChien-Yu Lu, Bo-Jr Huang, Min-Chieh Chen, Ollie Tsai, Alfred Tsai, Eric Jia-Wei Fang, Yuju Cho, Harry H. Chen, Ping Kao, Ericbill Wang, Hugh Mair, Shih-Arn Hwang. 260-262 [doi]
• 14.5 A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types, Distributed Hardware Power Management and Flexible NoC-Based Data OrchestrationMaico Cassel dos Santos, Tianyu Jia, Joseph Zuckerman, Martin Cochet, Davide Giri, Erik Jens Loscalzo, Karthik Swaminathan, Thierry Tambe, Jeff Jun Zhang, Alper Buyuktosunoglu, Kuan-Lin Chiu, Giuseppe Di Guglielmo, Paolo Mantovani, Luca Piccolboni, Gabriele Tombesi, David Trilla, John-David Wellman, En-Yu Yang, Aporva Amarnath, Ying Jing, Bakshree Mishra, Joshua Park, Vignesh Suresh, Sarita V. Adve, Pradip Bose, David Brooks 0001, Luca P. Carloni, Kenneth L. Shepard, Gu-Yeon Wei. 262-264 [doi]
• 2 Current Density with Distributed Power-Gating Switches and Time-Based Fast-Transient Controller for Mobile SoC Application in 3nm GAAFETDongha Lee, Seki Kim, Takahiro Nomiyama, Dong-Hoon Jung, Dongsu Kim, Jongwoo Lee, Sungung Kwak. 264-266 [doi]
• 14.7 A 0.45V 0.72mW 2.4GHz Bias-Current-Free Fractional-N Hybrid PLL Using a Voltage-Mode Phase Interpolator in 28nm CMOSLiqun Feng, Xuansheng Ji, Longhao Kuang, Qianxian Liao, Su Han, Jiahao Zhao, Woogeun Rhee, Zhihua Wang 0001. 266-268 [doi]
• 14.8 KASP: A 96.8% 10-Keyword Accuracy and 1.68μJ/Classification Keyword Spotting and Speaker Verification Processor Using Adaptive Beamforming and Progressive Wake-UpJianbiao Xiao, Xuhui Zhang, Shijian Zhu, Zhengwei Yang, Meng Du, Chunsheng Ji, Yu Long 0005, Xiao Chen, Xiaoyu Miao, Liang Zhou, Liang Chang 0002, Shanshan Liu, Jun Zhou 0017. 268-270 [doi]
• 2600 MHz Top-Metal and C4 Planar Spiral Inductor-Based Integrated Buck Voltage Regulator on 16nm-Class CMOSSuhwan Kim, Harish K. Krishnamurthy, Zakir Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De. 270-272 [doi]
• 2 Scalable Distributed All-Digital 6×6 Dot-LDOs Featuring Freely Linkable Current-Sharing Network: A Fine-Grained On-Chip Power Delivery Solution in 28nm CMOSYong-Jin Lee, Woojin Jang, Hong-Hyun Bae, Jeong-Hyun Cho, Hyun-Sik Kim. 272-274 [doi]
• 15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking SwitchZhiheng Yue, Xujiang Xiang, Fengbin Tu, Yang Wang, Yiming Wang, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 276-278 [doi]
• 15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerViaDaeyeon Kim, Yusung Kim 0002, Ayush Shrivastava, Gyusung Park, Anandkumar Mahadevan Pillai, Kunal Bannore, Tri Doan, Muktadir Rahman, Gwanghyeon Baek, Clifford Ong, Xiaofei Wang, Zheng Guo, Eric Karl. 278-280 [doi]
• 15.3 A 3nm FinFET 4.3GHz 21.1Mb/mm2 Double-Pumping 1-Read and 1-Write Pseudo-2-Port SRAM with Folded-Bitline Multi-Bank ArchitectureMasaru Haraguchi, Yorinobu Fujino, Yoshisato Yokoyama, Ming-Hung Chang, Yu-Hao Hsu, Hong-Chen Cheng, Koji Nii, Yih Wang, Tsung-Yung Jonathan Chang. 280-282 [doi]
• 15.4 Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology NodeMinjune Yeo, Keonhee Cho, Giseok Kim, Won Joon Jo, Jisang Oh, Sekeon Kim, Kyeongrim Baek, Sungho Park, Seung Jae Yei, Seong-Ook Jung. 282-284 [doi]
• 15.5 LISA: A 576×4 All-in-One Replica-Spins Continuous-Time Latch-Based Ising Computer Using Massively-Parallel Random-Number Generations and Replica EqualizationsJooyoung Bae, Jahyun Koo 0003, Chaeyun Shim, Bongjin Kim. 284-286 [doi]
• 15.6 e-Chimera: A Scalable SRAM-Based Ising Macro with Enhanced-Chimera Topology for Solving Combinatorial Optimization Problems Within MemoryJooyoung Bae, Chaeyun Shim, Bongjin Kim. 286-288 [doi]
• 2 Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°CYi-Cheng Huang, Shang-Hsuan Liu, Hsu-Shun Chen, Hsin-Chang Feng, Chih-Feng Li, Chou-Ying Yang, Wei-Keng Chang, Chang-Feng Yang, Chun-Yu Wu, Yen-Cheng Lin, Tsung-Tse Yang, Chih-Yang Chang, Wen-Ting Chu, Harry Chuang, Yih Wang, Yu-Der Chih, Tsung-Yung Jonathan Chang. 288-290 [doi]
• 15.8 A 22nm 10.8Mb Embedded STT-MRAM Macro Achieving over 200MHz Random-Read Access and a 10.4MB/s Write Throughput with an In-Field Programmable 0.3Mb MTJ-OTP for High-End MCUsTomoya Ogawa, Ken Matsubara, Yasuhiko Taito, Tomoya Saito, Masayuki Izuna, Koichi Takeda, Yoshinobu Kaneda, Takahiro Shimoi, Hidenori Mitani, Takashi Ito, Takashi Kono. 290-292 [doi]
• 12 Write Endurance and Integrated Margin-Expansion SchemesKu-Feng Lin, Hiroki Noguchi, Yi-Chun Shih, Perng-Fei Yuh, Yuan-Jen Lee, Tung-Cheng Chang, Sheng-Po Huang, Yu-Fan Lin, Chun-Ying Lee, Yen-Hsiang Huang, Jui-che Tsai, Saman Adham, Peter Noel, Ramin Yazdi, Marat Gershoig, YangJae Shin, Vineet Joshi, Ted Wong, Meng-Ru Jiang, J.-J. Wu, Chun-Tai Cheng, Yu-Jen Wang, Harry Chuang, Yu-Der Chih, Yih Wang, Tsung-Yung Jonathan Chang. 292-294 [doi]
• 16.1 A 2.7-to-13.3μJ/boot/slot Flexible RNS-CKKS Processor in 28nm CMOS Technology for FHE-Based Privacy-Preserving ComputingHyunhoon Lee, Hyeokjun Kwon, Youngjoo Lee. 296-298 [doi]
• 16.2 A 28nm 69.4kOPS 4.4μJ/Op Versatile Post-Quantum Crypto-Processor Across Multiple Mathematical ProblemsYihong Zhu, Wenping Zhu, Yi Ouyang, Junwen Sun, Min Zhu 0001, Qi Zhao, Jinjiang Yang, Chen Chen, Qichao Tao, Guang Yang, Aoyang Zhang, Shaojun Wei, Leibo Liu. 298-300 [doi]
• -5 Bit Error RateEric Hunt-Schroeder, Parker Lin-Butler, Amit Degada, Tian Xia 0005. 300-302 [doi]
• 16.4 High-Density and Low-Power PUF Designs in 5nm Achieving 23× and 39× BER Reduction After Unstable Bit Detection and MaskingSudhir S. Kudva, Mahmut Ersin Sinangil, Stephen G. Tell, Nikola Nedovic, Sanquan Song, Brian Zimmer, C. Thomas Gray. 302-304 [doi]
• 16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOSYan He 0002, Kaiyuan Yang. 304-306 [doi]
• 16.6 PACTOR: A Variation-Tolerant Probing-Attack Detector for a 2.5Gb/s×4-Channel Chip-to-Chip Interface in 28nm CMOSMao Li, Zhaoqing Wang, Sanu K. Mathew, Vivek De, Mingoo Seok. 306-308 [doi]
• Power and EM Side-Channel-Attack-Resilient AES-128 Core with Round-Aligned Globally-Synchronous-Locally-Asynchronous Operation Based on Tunable Replica CircuitsSirish Oruganti, Meizhi Wang, Vishnuvardhan V. Iyer, Yipeng Wang 0017, Mengtian Yang, Raghavan Kumar, Sanu K. Mathew, Jaydeep P. Kulkarni. 308-310 [doi]
• 16.8 A 60Mb/s TRNG with PVT-Variation-Tolerant Design Based on STR in 4nmJieun Park, Yong Ki Lee, Bohdan Karpinskyy, Yunhyeok Choi, Jonghoon Shin, Hyo-Gyuem Rhew, Jongshin Shin. 310-312 [doi]
• 17.1 Omnidirectional Magnetoelectric Power Transfer for Miniaturized Biomedical Implants via Active EchoWei Wang, Zhanghao Yu, Yiwei Zou, Joshua Woods, Prahalad Chari, Jacob T. Robinson, Kaiyuan Yang 0001. 314-316 [doi]
• 3 ResolutionShuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak. 316-318 [doi]
• 17.3 A Fully Wireless, Miniaturized, Multicolor Fluorescence Image Sensor Implant for Real-Time Monitoring in Cancer TherapyRozhan Rabbani, Micah Roschelle, Surin Gweon, Rohan Kumar, Alec Vercruysse, Nam Woo Cho, Matthew H. Spitzer, Ali M. Niknejad, Vladimir Marko Stojanovic, Mekhail Anwar. 318-320 [doi]
• 17.4 Environmentally-Friendly Disposable Circuit and Battery System for Reducing Impact of E-WastesNaoki Miura, Hiroaki Taguchi, Kazuyoshi Watanabe, Masaya Nohara, Tatsuyuki Makita, Masahiro Tanabe, Takahiro Wakimoto, Shohei Kumagai, Hideyuki Nosaka, Atsushi Aratake, Toshihiro Okamoto, Shun Watanabe, Jun Takeya, Takeshi Komatsu. 320-322 [doi]
• 17.5 A 24V Mini-Coil Magnetic Neural Stimulator with Closed-Loop Deadtime Control and ZCS Control Achieving 99.76% Charge Recovery EfficiencyYingYing Fan, Yuxuan Liu, Gerald Topalli, Roy J. Lycke, Lan Luan, Chong Xie, Taiyun Chi. 322-324 [doi]
• 17.6 Fully Integrated CMOS Ferrofluidic Biomolecular Processing Platform with On-Chip Droplet-Based Manipulation, Multiplexing and SensingDongwon Lee, Kyung-Sik Choi, Fuze Jiang, Hangxing Liu, Doohwan Jung, Ying Kong, Marco Saif, Zhikai Huang, Jing Wang, Hua Wang 0006. 324-326 [doi]
• 17.7 Droplet Microfluidics Co-Designed with Real-Time CMOS Luminescence Sensing and Impedance Spectroscopy of 4nL Droplets at a 67mm/s VelocityQijun Liu, Diana Arguijo Mendoza, Alperen Yasar, Dilara Caygara, Aya Kassem, Douglas Densmore, Rabia Tugce Yazicigil. 326-328 [doi]
• 17.8 0.4V 988nW Time-Domain Audio Feature Extraction for Keyword Spotting Using Injection-Locked OscillatorsAli Mostafa, Emmanuel Hardy, Franck Badets. 328-330 [doi]
• 17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAMFei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak. 330-332 [doi]
• 17.10 A 0.4V, 750nW, Individually Accessible Wireless Capacitive Sensor Interface IC for a Tactile Sensing NetworkHan Hao, Andrew G. Richardson, Yixiao Ding, Lin Du, Mark G. Allen, Jan Van der Spiegel, Firooz Aflatouni. 332-334 [doi]
• 17.11 A 9mW Ultrasonic Through Transmission Transceiver for Non-Invasive Intracranial Pressure SensingGerald Topalli, YingYing Fan, Matt Y. Cheung, Ashok Veeraraghavan, Mohammad Hirzallah, Taiyun Chi. 334-336 [doi]
• 18.1 A 600Gb/s DP-QAM64 Coherent Optical Transceiver Frontend with 4x105GS/s 8b ADC/DAC in 16nm CMOSGuansheng Li, Adesh Garg, Tim He, Ullas Singh, Jiawen Zhang, Lakshmi P. Rao, Chang Liu, Meisam Honarvar Nazari, Yang Liu, Yong Liu, Heng Zhang, Tamer A. Ali 0001, Hyo-Gyuem Rhew, Jiayoon Ru, Delong Cui, Ali Nazemi, Bo Zhang 0029, Afshin Momtaz, Jun Cao 0001. 338-340 [doi]
• 18.2 A 4x64Gb/s NRZ 1.3pJ/b Co-Packaged and Fiber-Terminated 4-Ch VCSEL-Based Optical TransmitterSusnata Mondal, Junyi Qiu, Sashank Krishnamurthy, Joe Kennedy 0001, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri. 340-342 [doi]
• 18.3 An 8b 160GS/s 57GHz Bandwidth Time-Interleaved DAC and Driver-Based Transmitter with Adaptive Calibration for 800Gb/s Coherent Optical Applications in 5nmF. Ahmad, A. Mellati, A. Fernandez, A. Iyer, A. Fan, Benjamín T. Reyes, Cindra Abidin, Claudio Nani, D. Albano, Fredy Solis, Gabriele Minoia, Geoff Hatcher, Hugo S. Carrer, K. Kota, L. Wang, M. Bachu, Marco Garampazzi, M. Hassanpourghadi, N. Fan, P. Prabha, R. L. Nguyen, S. Ho, T. Dusatko, T. Wu, W. Elsharkasy, Z. Sun, S. Jantzi, L. Tse. 342-344 [doi]
• 18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFETR. L. Nguyen, A. Mellati, A. Fernandez, A. Iyer, A. Fan, Benjamín T. Reyes, Cindra Abidin, Claudio Nani, D. Albano, F. Ahmad, Fredy Solis, Gabriele Minoia, Geoff Hatcher, M. Bachu, Marco Garampazzi, Mohsen Hassanpourghadi, N. Fan, P. Prabha, S. Fan, S. Ho, T. Dusatko, Tzu-Fan Wu, W. Elsharkasy, Z. Sun, S. Jantzi, L. Tse. 344-346 [doi]
• 19.1 A 7.5GHz Subharmonic Injection-Locked Clock Multiplier with a 62.5MHz Reference, -259.7dB FoMJ, and -56.6dBc Reference SpurHangil Choi, SeongHwan Cho. 348-350 [doi]
• 19.2 A 12.4% Efficiency, 11dBm Psat, Odd-Harmonics-Recycling, 62-to-92GHz CMOS Frequency Quadrupler Using an Amplitude-Phase Coordinating TechniqueZhen Lin, Yizhu Shen, Yifan Ding, Sanming Hu. 350-352 [doi]
• 2 20-to-23.8GHz 8-phase Oscillator Incorporating Magnetic + Dual-Injection Coupling Achieving 189.2dBc/Hz FoM@10 MHz and 200.7dBc/Hz FoMA in 65nm CMOSYa Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng. 354-356 [doi]
• 19.5 A 13.7-to-41.5GHz 214.1dBc/Hz FoMT Quad-Core Quad-Mode VCO Using an Oscillation-Mode-Splitting TechniqueHuanyu Ge, Haikun Jia, Wei Deng 0001, Ruichang Ma, Zhihua Wang 0001, Baoyong Chi. 356-358 [doi]
• 20.1 NVE: A 3nm 23.2TOPS/W 12b-Digital-CIM-Based Neural Engine for High-Resolution Visual-Quality Enhancement on Smart DevicesMing-En Shih, Shih-Wei Hsieh, Ping-Yuan Tsai, Ming-Hung Lin, Pei-Kuei Tsung, En-Jui Chang, Jenwei Liang, Shu-Hsin Chang, Chung-Lun Huang, You-Yu Nian, Zhe Wan, Sushil Kumar, Cheng-Xin Xue, Gajanan Jedhe, Hidehiro Fujiwara, Haruki Mori, Chih-Wei Chen, Po-Hua Huang, Chih-Feng Juan, Chung-Yi Chen, Tsung-Yao Lin, CH-Wang, Chih-Cheng Chen, Kevin Jou. 360-362 [doi]
• 20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion ModelsRuiqi Guo, Lei Wang, Xiaofeng Chen, Hao Sun, Zhiheng Yue, Yubin Qin, Huiming Han, Yang Wang, Fengbin Tu, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 362-364 [doi]
• 8.6 An Integrated Dual-side Series/Parallel Piezoelectric Resonator-based 20-to-2.2V DC-DC Converter Achieving a 310% Loss ReductionWen-Chin Brian Liu, Gaël Pillonnet, Patrick P. Mercier. 364-366 [doi]
• 20.3 A 23.9TOPS/W @ 0.8V, 130TOPS AI Accelerator with 16× Performance-Accelerable Pruning in 14nm Heterogeneous Embedded MPU for Real-Time Robot ApplicationsKoichi Nose, Taro Fujii, Katsumi Togawa, Shunsuke Okumura, Kentaro Mikami, Daichi Hayashi, Teruhito Tanaka, Takao Toi. 364-366 [doi]
• 20.4 A 28nm Physics Computing Unit Supporting Emerging Physics-Informed Neural Network and Finite Element Method for Real-Time Scientific Computing on Edge DevicesYuhao Ju, Ganqi Xu, Jie Gu 0001. 366-368 [doi]
• 20.5 C-Transformer: A 2.6-18.1μJ/Token Homogeneous DNN-Transformer/Spiking-Transformer Processor with Big-Little Network and Implicit Weight Generation for Large Language ModelsSangyeob Kim, Sangjin Kim, Wooyoung Jo, Soyeon Kim, Seongyon Hong, Hoi-Jun Yoo. 368-370 [doi]
• 20.6 LSPU: A Fully Integrated Real-Time LiDAR-SLAM SoC with Point-Neural-Network Segmentation and Multi-Level kNN AccelerationJueun Jung, Seungbin Kim, Bokyoung Seo, Wuyoung Jang, Sangho Lee, Jeongmin Shin, Donghyeon Han, Kyuho Jason Lee. 370-372 [doi]
• 20.7 NeuGPU: A 18.5mJ/Iter Neural-Graphics Processing Unit for Instant-Modeling and Real-Time Rendering with Segmented-Hashing ArchitectureJunha Ryu, Hankyul Kwon, Wonhoon Park, Zhiyong Li, Beomseok Kwon, Donghyeon Han, Dongseok Im, Sangyeob Kim, Hyungnam Joo, Hoi-Jun Yoo. 372-374 [doi]
• 20.8 Space-Mate: A 303.5mW Real-Time Sparse Mixture-of-Experts-Based NeRF-SLAM Processor for Mobile Spatial ComputingGwangtae Park, Seokchan Song, Haoyang Sang, Dongseok Im, Donghyeon Han, Sangyeob Kim, Hongseok Lee, Hoi-Jun Yoo. 374-376 [doi]
• 21.1 A 121.7dB DR and -109.0dB THD+N Filterless Digital-Input Class-D Amplifier with an HV Multibit IDAC Using Tri-level Output and Employing a Transition-Rate-Balanced Bidirectional RTDEM SchemeHuajun Zhang 0001, Mingshuang Zhang, Mengying Chen, Arthur Admiraal, Miao Zhang, Marco Berkhout, Qinwen Fan. 378-380 [doi]
• 21.2 A 0.81mA, -105.2dB THD+N Class-D Audio Amplifier with Capacitive Feedforward and PWM-Aliasing Reduction for Wide-Band-Effective Linearity ImprovementKaiwen Zhou, Jianhong Zhou, Yuxiang Tang, Jiahua Li, Zhiliang Hong, Jiawei Xu 0001. 380-382 [doi]
• 21.3 A -106.3dB THD+N Feedback-After-LC Class-D Audio Amplifier Employing Current Feedback to Enable 530kHz LC-Filter Cut-Off FrequencyHuajun Zhang 0001, Haochun Fan, Miao Zhang, Marco Berkhout, Qinwen Fan. 382-384 [doi]
• 21.4 A -108dBc THD+N, 2.3mW Class-H Headphone Amplifier with Power-Aware SIMO Supply ModulatorShon-Hang Wen, Chuan-Hung Hsiao, Yi-Wei Huang, Kuan-Yu Lin, You-Shin Chen, Ya-Chi Chen, Ming-Chung Tsai, Kuan-Hung Chen, Kuan-Dar Chen. 384-386 [doi]
• 22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input BufferYuefeng Cao, Minglei Zhang, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan. 388-390 [doi]
• 22.2 A 700MHZ-BW -164dBFS/Hz-Small-Signal-NSD 703mW Continuous-Time Pipelined ADC with On-Chip Digital Reconstruction Achieving 3 using Digital Cancellation of DAC ErrorsSharvil Patil, Asha Ganesan, Hajime Shibata, Victor Kozlov, Gerry Taylor, Qingnan Yu, Zhao Li, Zeynep Lulec, Konstantinos Vasilakopoulos, Prawal Shrestha, Donald Paterson, Raviteja Theertham, Aseer Chowdhury. 390-392 [doi]
• 22.3 A 76mW 40GS/s 7b Time-Interleaved Hybrid Voltage/Time-Domain ADC with Common-Mode Input TrackingAmy Whitcombe, Somnath Kundu, Hariprasad Chandrakumar, Abhishek Agrawal, Thomas William Brown, Steven Callender, Brent R. Carlton, Stefano Pellerano. 392-394 [doi]
• 22.4 A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset CalibrationYunsong Tao, Mingyang Gu, Baoyong Chi, Yi Zhong, Lu Jie 0008, Nan Sun 0001. 394-396 [doi]
• 22.5 A 42GS/s 7b 16nm Massively Time-Interleaved Slope-ADCEwout Martens, Adam Cooman, Pratap Tumkur Renukaswamy, Shun Nagata, Sehoon Park, Jorge-Luis Lagos 0001, Nereo Markulic, Jan Craninckx. 396-398 [doi]
• 23.1 A 44μW IoT Tag Enabling 1μs Synchronization Accuracy and OFDMA Concurrent Communication with Software-Defined ModulationJiaqi Shen, Fengyuan Zhu, Yang Liu, Boxiao Liu, Chunqi Shi, Leilei Huang, Long Xu, Xiaohua Tian, Runxi Zhang. 400-402 [doi]
• 2 Software-Defined Dual-Mode Bluetooth Transceiver with 10dBm Maximum TX Power and -98.2dBm Sensitivity 2.96mW RX Power at 1Mb/sNicola Scolari, Franz-Xaver Pengg, Konstantinos Manetakis, Camilo A. Salazar, Alexandre Vouilloz, Ernesto Pérez-Serna, Anjana Dissanayake, Pascal Persechini, Vladimir Kopta, Erwan Le Roux, Francesco Chicco, Stefano Cillo, Nicola Gerber, Cédric Barbelenet, Fabio Epifano, Paulo Augusto Dal Fabbro, Nicolas Raemy. 402-404 [doi]
• 23.3 A Passive Crystal-Less Wi-Fi-to-BLE Tag Demonstrating Battery-Free FDD Communication with SmartphonesZiyi Chang, Qijing Xiao, Cheng Chen, Weixiao Wang, Xin Hu, Changgui Yang, Zhuhao Li, Yuxuan Luo, Bo Zhao 0003. 404-406 [doi]
• 23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCOHaijun Shao, Rui Paulo Martins, Pui-In Mak. 406-408 [doi]
• 23.5 A 7.6mW IR-UWB Receiver Achieving -13dBm Blocker Resilience with a Linear RF Front-EndAnoop Narayan Bhat, Paul Mateman, Zule Xu, Peter Vis, Paul Detterer, Gururaja Kasanadi Ramachandra, Yunus Baykal, Mario Konijnenburg, Yao-Hong Liu, Christian Bachmann, Peng Zhang. 408-410 [doi]
• 24.1 A 90-to-180GHz APD-Integrated Transmitter Achieving 18dBm Psat in 28nm CMOSDawei Tang, Xiaoyue Xia, Zheng Yan, Peigen Zhou, Zekun Li 0005, Chun Yang, Rui Zhang, Zhe Chen, Jixin Chen, Hao Gao 0001, Wei Hong 0002. 411-413 [doi]
• 24.2 A Scalable 134-to-141GHz 16-Element CMOS 2D λ/2-Spaced Phased ArrayJicong Zhang, Bingli Dai, Xiangao Meng, Yi Hu, Ming Guan, Hegang Deng, Bo Zhang, Cheng Wang. 414-416 [doi]
• 24.3 A 236-to-266GHz 4-Element Amplifier-Last Phased-Array Transmitter in 65nm CMOSChun Wang, Hans Herdian, Wenbin Zheng, Chenxin Liu, Jill Mayeda, Yuxuan Liu, Olivia Angel Yong, Wenqian Wang, Yuncheng Zhang, Carrel da Gomez, Abanob Shehata, Sena Kato, Ibrahim Abdo, Teruo Jyo, Hiroshi Hamada, Hiroyuki Takahashi, Hiroyuki Sakai 0009, Atsushi Shirane, Kenichi Okada. 415-417 [doi]
• 24.4 Sub-THz Ruler: Spectral Bistability in a 235GHz Self-Injection-Locked Oscillator for Agile and Unambiguous RangingS. M. Hossein Naghavi, Morteza Tavakoli Taba, Amirata Tabatabavakili, Ali Mostajeran, Mohammed Aseeri, Andreia Cathelin, Ehsan Afshari. 418-420 [doi]
• 25.1 Short-Reach Silicon Photonic Interconnects with Quantum Dot Mode Locked Laser Comb SourcesAndrew M. Netherton, Mario Dumont, Zachary Nelson, Jinesh Jhonsa, Alice Mo, Jahyun Koo, David McCarthy, Noah Pestana, Skylar Deckoff-Jones, Christopher V. Poulton, Michael Frankel, Jock Bovington, Luke Theogarajan, John E. Bowers 0001. 422-424 [doi]
• 25.2 Extreme Wave-Based MetastructuresNader Engheta. 424-425 [doi]
• 25.3 Toward Exponential Growth of Therapeutic NeurotechnologyJacob T. Robinson, Joshua E. Woods, Kaiyuan Yang 0001. 426-428 [doi]
• 25.4 Liquid Metal - Polymer Composites for Stretchable Circuits, Soft Machines, and Thermal ManagementCarmel Majidi. 428-429 [doi]
• 26.1 A 600ch 10b Source-Driver IC with a Charge-Modulation DAC Achieving 1-Horizontal Time of 1.5μs Suitable for 240Hz-Frame-Rate Mobile DisplaysYousung Park, Gyeong-Gu Kang, Gyu-Wan Lim, Seunghwa Shin, Yong-Sung Ahn, Wonyoun Kim, Hyun-Sik Kim. 432-434 [doi]
• 2/Channel for Mobile OLED DisplaysJaewoong Ahn, Seung Hun Choi, Junyeol An, Ki-Duk Kim, Hyung-Min Lee. 434-436 [doi]
• 26.3 Noise Immunity in Capacitive Sensing: Single-Ended AFE Design with Common-Current Subtraction for Mutual- and Self-Capacitance Sensing in 390pF LoadJunyeol An, Seung Hun Choi, Si-Woo Kim, Jae-Youl Lee, Hyung-Min Lee, Yoon Kyung Choi. 436-438 [doi]
• A 620pF-Compensated Dual-Mode Capacitance Readout IC for Sub-Display TSP with VRR ScanJunmin Lee, Juwon Ham, Hamin Lee, Wooseok Jang, Hyeongjoon Kim, Byungcheol So, Seunghoon Ko. 438-440 [doi]
• 26.5 A 977μW Capacitive Touch Sensor with Noise-Immune Excitation Source and Direct Lock-In ADC Achieving 25.2pJ/step Energy EfficiencyXiangdong Feng, Zhiyu Wang, Yekan Chen, Tianyi Cai, Yangfan Xuan, Changgui Yang, Weixiao Wang, Yunshan Zhang, Zhong Tang, Yuxuan Luo, Bo Zhao 0003. 440-442 [doi]
• 27.1 A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-GoFangyu Mao, Rui Paulo Martins, Yan Lu 0002. 444-446 [doi]
• 27.2 A 6.78-MHz 79.5%-Peak-Efficiency Wireless Power Transfer System using a Wireless Mode-Recognition Technique and a Fully-On/off Class-D Power AmplifierJunfei Ge, Yu Lu, Ruoshu Yang, Dongfang Pan, Lin Cheng. 446-448 [doi]
• 27.3 A 90.8%-Efficiency SIMO Resonant Regulating Rectifier Generating 3 Outputs in a Half Cycle with Distributed Multi-Phase Control for Wirelessly-Powered Implantable DevicesHyun-Su Lee, Kyeongho Eom, Hyung-Min Lee. 448-450 [doi]
• 27.4 A 13.56MHz Wireless Power Transfer System with Hybrid Voltage-/Current-Mode Receiver and Global Digital-PWM Regulation Achieving 150% Transfer Range Extension and 72.3% End-to-End EfficiencyTianqi Lu, Sijun Du. 450-452 [doi]
• 27.5 A Wireless Power Transfer System with Up-to-27.9% Efficiency Improvement under Coupling Coefficient Ranging from 0.1 to 0.39 Based on Phase-Shift/Time-Constant Detection and Hybrid Transmission Power ControlYutang Chen, Yuxuan Luo, Yifan Lin, Lei Shao, Dihu Chen, Jianping Guo. 452-454 [doi]
• 28.1 A Fully Integrated, Domino-Like-Buffered Analog LDO Achieving -28dB Worst-Case Power-Supply Rejection Across the Frequency Spectrum from 10Hz to 1GHz with 50pF On-Chip CapacitanceJun-Gi Lee, Hong-Hyun Bae, Seunghyun Jang, Hyun-Sik Kim. 456-458 [doi]
• 3-Current-Density Hybrid DC-DC Converter with a Charge Converging PhaseYichao Ji, Ji Jin, Lin Cheng. 458-460 [doi]
• 28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A OutputQiaobo Ma, Yang Jiang 0002, Huihua Li, Xiongjie Zhang, Man Kay Law, Rui Paulo Martins, Pui-In Mak. 460-462 [doi]
• 2 Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC ConverterNicolas Butzen, Harish Krishnamurthy, Jingshu Yu, Khondker Zakir Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Chris Pelto, James W. Tschanz. 462-464 [doi]
• 28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2A/mm² Current-Density FoMHyunki Han, Jeong-Hyun Cho, Woojin Jang, Yousung Park, Jiho Lee, Hyun-Sik Kim. 464-466 [doi]
• 28.6 An 87% Efficient 2V-Input, 200A Voltage Regulator Chiplet Enabling Vertical Power Delivery in Multi-kW Systems-on-PackageRinkle Jain, Shunjiang Xu, Rajiv Kaushal, Carlos Mariscal, Humberto Caballero, Tamir Salus, Christopher Schaef, Anup Deka, Aruna Payala, Keng Chen, Huong Do, Jonathan Douglas. 466-468 [doi]
• 29.2 A Cryo-CMOS Controller with Class-DE Driver and DC Magnetic-Field Tuning for Color-Center-Based Quantum ComputersLuc Enthoven, Niels Fakkel, Hans Bartling, Margriet van Riggelen, Kai-Niklas Schymik, Jiwon Yun, Eftychia Tsapanou Katranara, René Vollmer, Tim Taminiau, Fabio Sebastiano, Masoud Babaie. 472-474 [doi]
• 29.3 A Cryo-CMOS Receiver with 15K Noise Temperature Achieving 9.8dB SNR in 10μs Integration Time for Spin Qubit ReadoutBagas Prabowo, Oriol Pietx-Casas, Mohammad Ali Montazerolghaem, Giordano Scappucci, Lieven M. K. Vandersypen, Fabio Sebastiano, Masoud Babaie. 474-476 [doi]
• 29.4 A Cryo-CMOS Quantum Computing Unit Interface Chipset in 28nm Bulk CMOS with Phase-Detection Based Readout and Phase-Shifter Based Pulse GenerationYanshu Guo, Qichun Liu, Wenqiang Huang, Yaoyu Li, Tian Tian, Nan Wu, Siqi Zhang, Tiefu Li, Zhihua Wang 0001, Ning Deng 0008, Yuanjin Zheng, Hanjun Jiang. 476-478 [doi]
• 29.5 A Portable 14GHz Dual-Mode Pulse and Continuous-Wave Electron Paramagnetic Resonance Spectrometer Using a Subharmonic Direct Conversion ReceiverJui-Hung Sun, Michella Rustom, Thanh-Dat Nguyen, Jaideep Singh, Peter Qin, Constantine Sideris. 478-480 [doi]
• 30.1 A 40nm VLIW Edge Accelerator with 5MB of 0.256pJ/b RRAM and a Localization Solver for Bristle Robot SurveillanceSamuel D. Spetalnick, Ashwin Sanjay Lele, Brian Crafton, Muya Chang, Sigang Ryu, Jong-Hyeok Yoon, Zhijian Hao, Azadeh Ansari, Win-San Khwa, Yu-Der Chih, Meng-Fan Chang, Arijit Raychowdhury. 482-484 [doi]
• 30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory ComputingYing Liu, Yufei Ma 0002, Ninghui Shang, Tianhao Zhao, Peiyu Chen, Meng Wu, Jiayoon Ru, Tianyu Jia, Le Ye, Zhixuan Wang, Ru Huang. 484-486 [doi]
• 30.3 VIP-Sat: A Boolean Satisfiability Solver Featuring 5×12 Variable In-Memory Processing Elements with 98% Solvability for 50-Variables 218-Clauses 3-SAT ProblemsChaeyun Shim, Jooyoung Bae, Bongjin Kim. 486-488 [doi]
• 30.4 A Fully Integrated Annealing Processor for Large-Scale Autonomous Navigation OptimizationYi-Chen Chu, Yu-Cheng Lin, Yu-Chen Lo, Chia-Hsiang Yang. 488-490 [doi]
• 11.1 AMD InstinctTM MI300 Series Modular Chiplet Package - HPC and AI Accelerator for Exa-Class SystemsAlan Smith, Eric Chapman, Chintan Patel, Raja Swaminathan, John J. Wuu, Tyrone Huang, Wonjun Jung, Alexander Kaganov, Hugh McIntyre, Ramon Mangaser. 490-492 [doi]
• 30.5 A Variation-Tolerant In-eDRAM Continuous-Time Ising Machine Featuring 15-Level Coefficients and Leaked Negative-Feedback AnnealingJiahao Song, Zihan Wu, Xiyuan Tang, Bocheng Xu, Haoyang Luo, Youming Yang, Yuan Wang 0001, Runsheng Wang, Ru Huang. 490-492 [doi]
• 30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance ComputingYipeng Wang 0017, Mengtian Yang, Chieh-Pu Lo, Jaydeep P. Kulkarni. 492-494 [doi]
• 31.1 An 83.4%-Peak-Efficiency Envelope-Tracking Supply Modulator Using a Class-G Linear Amplifier and a Single-Inductor Dual-Input-Dual-Output Converter for 200MHz Bandwidth 5G New Radio RF ApplicationsChangjin Chen, XiMing Li, Rui Hu, Lin Cheng. 496-498 [doi]
• 31.2 A Ripple-Less Buck Converter with Sub -21.94dB EVM for 5G Low Earth Orbit ApplicationYi-Hsiang Kao, Jie-Lin Wu, Wei-Cheng Huang, Hui-Hsuan Chang, Hsing-Yen Tsai, Rong-Bin Guo, Ke-Horng Chen, Kuo-Lin Zeng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 498-500 [doi]
• 31.3 A 950ns 0.5-to-5.5V 5G NR RF PA Supply Modulator with Floating Capacitor Control for Symbol Power TrackingIk-Hwan Kim, Jeong-Il Seo, Young-Hwan Choo, Seungchan Park, Jae-Yeol Han, WooSik Kim, Sung-Youb Jung, Taehyuk Ko, Dongsu Kim, Jongwoo Lee, Sungung Kwak. 500-502 [doi]
• 31.4 98.7% Efficiency 1200V-to-48V LLC Converter with CC/CV Mode Charging Compliant with EVSE Level 1Tz-Wun Wang, Sheng-Hsi Hung, Po-Jui Chiu, Chi-yu Chen, Chang-Lin Go, Yu-Ting Huang, Xiao-Quan Wu, Ke-Horng Chen, Kuo-Lin Zeng, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 502-504 [doi]
• 31.5 A 750mW, 37% Peak Efficiency Isolated DC-DC Converter with 54/18Mb/s Full-Duplex Communication Using a Single Pair of TransformersTingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu 0002. 504-506 [doi]
• 31.6 A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel SwitchingYuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu 0002. 506-508 [doi]
• 31.7 A 3.6W 16V-Output 180ns-Response-Time 94%-Efficiency SC Sigma Converter with Output Impedance Compensation and Ripple Mitigation for LiDAR Driver ApplicationsChen Hu, Xinran Huang, Xun Liu, Sijun Du, Xiaosen Liu, Junmin Jiang. 508-510 [doi]
• 31.8 A 11.7W 9mV/A-Cross-Regulation Single-Inductor Triple-Output Buck Converter Using Unordered Power-Distributive Control for a 2A Load TransientBaochuang Wang, Xiaonan wu, Lin Cheng. 510-512 [doi]
• 31.10 A Fully integrated 500V, 6.25MHz GaN-IC for Totem-Pole PFC Off-Line Power ConversionNiklas Deneke, Bernhard Wicht. 514-516 [doi]
• 31.11 A Capacitor-Based Bias-Flip Rectifier with Electrostatic Charge Boosting for Triboelectric Energy Harvesting Achieving Auto-MPPT at Breakdown Voltage and 14× Power Extraction ImprovementWenyu Peng, Xinling Yue, Lukasz S. Pakula, Sijun Du. 516-518 [doi]
• 32.1 A 47GHz 4-way Doherty PA with 23.7dBm P1dB and 21.7% / 13.1% PAE at 6 / 12dB Back-off Supporting 2000MHz 5G NR 64-QAM OFDMXiaohan Zhang, Hao Guo, Taiyun Chi. 520-522 [doi]
• 32.2 A 24.25-to-29.5GHz Extremely Compact Doherty Power Amplifier with Differential-Breaking Phase Offset Achieving 23.7% PAEavg for 5G Base-Station TransceiversHansik Oh, Seungwon Park, Jooseok Lee, Seungjae Baek, Joonho Jung, Taewan Kim, Jinhyun Kim, Woojae Lee, Jae-Hong Park, Kihyun Kim, Dong-hyun Lee, Sangho Lee, Jeong Ho Lee, Ji-Hoon Kim, Younghwan Kim, Sangyong Park, Bohee Suh, Soyoung Oh, Dongsoo Lee, Sehyug Jeon, Juho Son, Sung-Gi Yang. 522-524 [doi]
• 32.3 A Load-Variation-Tolerant Doherty Power Amplifier with Dual-Adaptive-Bias Scheme for 5G HandsetsShohei Imai, Hideyuki Sato, Kenji Mukai, Hiroshi Okabe. 524-526 [doi]
• 32.4 A 67.8-to-108.2GHz Power Amplifier with a Three-Coupled-Line-Based Complementary-Gain-Boosting Technique Achieving 442GHz GBW and 23.1% peak PAEWeiping Wu, Xun Bao, Shulan Chen, Yan Wang, Lei Zhang 0033. 526-528 [doi]
• 32.5 E-band (71-to-86GHz) GaN Power Amplifier with 4.37W Output Power and 18.5% PAE for 5G BackhaulBharath Cimbili, Mingquan Bao, Christian Friesicke, Rüdiger Quay. 528-530 [doi]
• 32.6 A 76-to-81GHz Direct-Digital 7b 14GS/s Double-Balanced I/Q Mixing-DAC Radar-Waveform SynthesizerMarios Neofytou, Kostas Doris, Marcello Ganzerli, Maarten Lont, Georgi I. Radulov. 530-532 [doi]
• 32.7 A 25.2dBm PSAT, 35-to-43GHz VSWR-Resilient Chain-Weaver Eight-Way Balanced PA with an Embedded Impedance/Power SensorMasoud Pashaeifar, Anil Kumar Kumaran, Leo C. N. de Vreede, Morteza S. Alavi. 532-534 [doi]
• 32.8 A 27.8-to-38.7GHz Load-Modulated Balanced Power Amplifier with Scalable 7-to-1 Load-Modulated Power-Combine Network Achieving 27.2dBm Output Power and 28.8%/23.2%/16.3%/11.9% Peak/6/9/12dB Back-Off EfficiencyWei Zhu, Jiazhi Ying, Long Chen, Jian Zhang, Guanshen Lv, Xiangjie Yi, Zhiqiang Zhao, Zunxiang Wang, Yan Wang, Wenhua Chen, Houjun Sun. 534-536 [doi]
• 32.9 An Ultra-Compact 28GHz Doherty Power Amplifier with an Asymmetrically-Coupled-Transformer Output CombinerEdward Liu, Hua Wang 0006. 536-538 [doi]
• 32.10 A Compact Broadband VSWR-Resilient True-Power-and-Gain Sensor with Dynamic-Range Compensation for Phased-Array ApplicationsEdward Liu, David Joseph Munzer, Jeongseok Lee, Hua Wang 0006. 538-540 [doi]
• 33.1 A High-Accuracy and Energy-Efficient Zero-Shot-Retraining Seizure-Detection Processor with Hybrid-Feature-Driven Adaptive Processing and Learning-Based Adaptive Channel SelectionJiahao Liu, Xiao Liu, Xu Wang, Ziyi Xie, Zirui Zhong, Jiajing Fan, Hui Qiu, Yiming Xu, Huajing Qin, Yu Long 0005, Yuhong Zhou, Zixuan Shen, Liang Zhou, Liang Chang 0002, Shanshan Liu, Shuisheng Lin, Chao Wang, Jun Zhou 0017. 542-544 [doi]
• 33.2 A Sub-1μJ/class Headset-Integrated Mind Imagery and Control SoC for VR/MR Applications with Teacher-Student CNN and General-Purpose Instruction Set ArchitectureZhiwei Zhong, Yijie Wei, Lance Christopher Go, Jie Gu 0001. 544-546 [doi]
• 33.3 MiBMI: A 192/512-Channel 2.46mm² Miniaturized Brain-Machine Interface Chipset Enabling 31-Class Brain-to-Text Conversion Through Distinctive Neural CodesMohammadAli Shaeri, Uisub Shin, Amitabh Yadav, Riccardo Caramellino, Gregor Rainer, Mahsa Shoaran. 546-548 [doi]
• 33.4 A Multi-Loop Neuromodulation Chipset Network with Frequency-Interleaving Front-End and Explainable AI for Memory Studies in Freely Behaving MonkeysYuhan Hou, Yi Zhu, Xiao Wu, Yinfei Li, Timothy H. Lucas, Andrew G. Richardson, Xilin Liu. 548-550 [doi]
• 33.5 Closed-Loop 100-Channel Highly-Scalable Retinal Implant with 1.02μW Analog ED-Based Adaptive-Threshold Spike Detection and Poisson-Coded Temporally Distributed Optogenetic StimulationTayebeh Yousefi, Georg Zoidl, Hossein Kassiri. 550-552 [doi]
• 33.6 A Millimetric Batteryless Biosensing and Stimulating Implant with Magnetoelectric Power Transfer and 0.9pJ/b PWM BackscatterZhanghao Yu, Huan-Cheng Liao, Fatima T. Alrashdan, Ziyuan Wen, Yiwei Zou, Joshua Woods, Wei Wang, Jacob T. Robinson, Kaiyuan Yang 0001. 551-553 [doi]
• 33.7 An Adhesive Interposer-Based Reconfigurable Multi-Sensor Patch Interface with On-Chip Application Tunable Time-Domain Feature ExtractionJeonghoon Cho, You Jang Pyeon, Junyeong Yeom, Hyunjoong Kim, Sanghyeon Cho, Yonggi Kim, Taejung Kim, Jong-Hyun Kwak, Geonjun Choi, Yoonsik Lee, Heungjoo Shin, Hoon Eui Jeong, Jae-Joon Kim. 554-556 [doi]
• 33.8 A Two-Electrode Bio-Impedance Readout IC with Complex-Domain Noise-Correlated Baseline Cancellation Supporting Sinusoidal ExcitationSong-I Cheon, Haidam Choi, Gichan Yun, Sein Oh, Ji-Hoon Suh, Sohmyung Ha, Minkyu Je. 556-558 [doi]
• 33.9 A Miniature Neural Interface Implant with a 95% Charging Efficiency Optical Stimulator and an 81.9dB SNDR ΔΣM-Based Recording FrontendLinran Zhao, Wei Shi, Yan Gong, Xiang Liu, Wen Li 0004, Yaoyao Jia. 558-560 [doi]
• 33.10 A 2.7ps-ToF-Resolution and 12.5mW Frequency-domain NIRS Readout IC with Dynamic Light Sensing Frontend and Cross-Coupling-Free Inter-Stabilized Data ConverterZhouchen Ma, Yuxiang Lin, Cheng Chen, Xiangao Qi, Yongfu Li 0002, Kea-Tiong Tang, Fa Wang, Tianhong Zhang, Guoxing Wang, Jian Zhao 0004. 560-562 [doi]
• 33.11 A Hybrid Recording System with 10kHz-BW 630mVPP 84.6dB-SNDR 173.3dB-FOMSNDR and 5kHz-BW 114dB-DR for Simultaneous ExG and Biocurrent AcquisitionTaeryoung Seol, Geunha Kim, Sehwan Lee, Samhwan Kim, Dongwook Kim, Jeongyoon Wie, Yeonjae Shin, Hongki Kang, Jae Eun Jang, Arup K. George, Junghyup Lee. 562-564 [doi]
• 34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI ApplicationsYang Wang, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Huiming Han, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 566-568 [doi]
• 34.2 A 16nm 96Kb Integer/Floating-Point Dual-Mode-Gain-Cell-Computing-in-Memory Macro Achieving 73.3-163.3TOPS/W and 33.2-91.2TFLOPS/W for AI-Edge DevicesWin-San Khwa, Ping-Chun Wu, Jui-Jen Wu, Jian-Wei Su, Ho-Yu Chen, Zhao-En Ke, Ting-Chien Chiu, Jun-Ming Hsu, Chiao-Yen Cheng, Yu-Chen Chen, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 568-570 [doi]
• 34.3 A 22nm 64kb Lightning-Like Hybrid Computing-in-Memory Macro with a Compressed Adder Tree and Analog-Storage Quantizers for Transformer and CNNsAn Guo, Xi Chen, Fangyuan Dong, Jinwu Chen, Zhihang Yuan, Xing Hu, Yuanpeng Zhang, Jingmin Zhang, Yuchen Tang, Zhican Zhang, Gang Chen, Dawei Yang, Zhaoyang Zhang, Lizheng Ren, Tianzhu Xiong, Bo Wang, Bo Liu, Weiwei Shan, Xinning Liu, Hao Cai, Guangyu Sun, Jun Yang, Xin Si. 570-572 [doi]
• 2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit CellHidehiro Fujiwara, Haruki Mori, Wei-Chang Zhao, Kinshuk Khare, Cheng-En Lee, Xiaochen Peng, Vineet Joshi, Chao-Kai Chuang, Shu-Huan Hsu, Takeshi Hashizume, Toshiaki Naganuma, Chen-Hung Tien, Yao-Yi Liu, Yen-Chien Lai, Chia-Fu Lee, Tan-Li Chou, Kerem Akarvardar, Saman Adham, Yih Wang, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang. 572-574 [doi]
• 34.5 A 818-4094TOPS/W Capacitor-Reconfigured CIM Macro for Unified Acceleration of CNNs and TransformersKentaro Yoshioka. 574-576 [doi]
• 34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADCYiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang 0014. 576-578 [doi]
• 2 eDRAM-LUT-Based Digital-Computing-in-Memory Macro with In-Memory Encoding and RefreshingYifan He, Shupei Fan, Xuan Li, Luchang Lei, Wenbin Jia, Chen Tang, Yaolei Li, Zongle Huang, Zhike Du, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu. 578-580 [doi]
• 34.8 A 22nm 16Mb Floating-Point ReRAM Compute-in-Memory Macro with 31.2TFLOPS/W for AI Edge DevicesTai-Hao Wen, Hung-Hsi Hsu, Win-San Khwa, Wei-Hsing Huang, Zhao-En Ke, Yu-Hsiang Chin, Hua-Jin Wen, Yu-Chen Chang, Wei-Ting Hsu, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shih-Hsih Teng, Chung-Cheng Chou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang. 580-582 [doi]
• 34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET ProcessLinfang Wang, Weizeng Li, Zhidao Zhou, Hanghang Gao, Zhi Li, Wang Ye, Hongyang Hu, Jing Liu, Jinshan Yue, Jianguo Yang, Qing Luo, Chunmeng Dou, Qi Liu, Ming Liu. 582-584 [doi]