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10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz Reference

Byeong-Taek Moon, Hyun-Chul Park, Sang-Gug Lee. 10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz Reference. In IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024. pages 202-204, IEEE, 2024. [doi]

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