10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz Reference

Byeong-Taek Moon, Hyun-Chul Park, Sang-Gug Lee. 10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz Reference. In IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024. pages 202-204, IEEE, 2024. [doi]

@inproceedings{MoonPL24,
  title = {10.8 A 281GHz, -1.5dBm Output-Power CMOS Signal Source Adopting a 46fsrms Jitter D-Band Cascaded Subharmonically Injection-Locked Sub-Sampling PLL with a 274MHz Reference},
  author = {Byeong-Taek Moon and Hyun-Chul Park and Sang-Gug Lee},
  year = {2024},
  doi = {10.1109/ISSCC49657.2024.10454484},
  url = {https://doi.org/10.1109/ISSCC49657.2024.10454484},
  researchr = {https://researchr.org/publication/MoonPL24},
  cites = {0},
  citedby = {0},
  pages = {202-204},
  booktitle = {IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024},
  publisher = {IEEE},
  isbn = {979-8-3503-0620-0},
}