15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia

Daeyeon Kim, Yusung Kim 0002, Ayush Shrivastava, Gyusung Park, Anandkumar Mahadevan Pillai, Kunal Bannore, Tri Doan, Muktadir Rahman, Gwanghyeon Baek, Clifford Ong, Xiaofei Wang, Zheng Guo, Eric Karl. 15.2 A 2048x60m4 SRAM Design in Intel 4 with an Around-the-Array Power-Delivery Scheme Using PowerVia. In IEEE International Solid-State Circuits Conference, ISSCC 2024, San Francisco, CA, USA, February 18-22, 2024. pages 278-280, IEEE, 2024. [doi]

Abstract

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