Seungjong Lee - researchr alias

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Viewing Publication 1 - 19 from 19

2024

An Anti-Aliasing-Filter-Assisted 3rd-Order VCO-Based CTDSM With NS-SAR QuantizerHsiang-Wen Chen, Seungjong Lee, Michael P. Flynn. jssc, 59(4):1171-1183, April 2024. [doi]

2023

2022

An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute EngineJustin M. Correll, Lu Jie, Seungheun Song, Seungjong Lee, Junkang Zhu, Wei Tang 0010, Luke Wormald, Jack Erhardt, Nicolas Breil, Roger Quon, Deepak Kamalanathan, Siddarth A. Krishnan, Michael Chudzik, Zhengya Zhang, Wei D. Lu, Michael P. Flynn. vlsit 2022: 264-265 [doi]

A Multimode 157μW 4-Channel 80dBA-SNDR Speech-Recognition Frontend With Self-DOA Correction Adaptive BeamformerTaewook Kang, Seungjong Lee, Seungheun Song, Mohammad R. Haghighat, Michael P. Flynn. isscc 2022: 500-502 [doi]

An Eight-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature ExtractorSeungjong Lee, Taewook Kang, John Bell, Mohammad R. Haghighat, Alberto J. Martinez, Michael P. Flynn. jssc, 57(6):1812-1823, 2022. [doi]

rd Order CT SDM with a True TI NS QuantizerSeungjong Lee, Taewook Kang, Seungheun Song, Kyumin Kwon, Michael P. Flynn. vlsit 2022: 54-55 [doi]

6GS/s 8-channel CIC SAR TI-ADC with Neural Network CalibrationEvelyn Ware, Justin Correll, Seungjong Lee, Michael Flynn. esscirc 2022: 325-328 [doi]

2021

A 50μW 4-channel 83dBA-SNDR Speech Recognition Front-End with Adaptive Beamforming and Feature ExtractionTaewook Kang, Seungjong Lee, Mohammad Haghigat, Darren Abramson, Michael P. Flynn. cicc 2021: 1-2 [doi]

2020

An 8-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor with 60 Mel-Frequency Energy Features Enabling 95% Speech Recognition AccuracySeungjong Lee, Taewook Kang, John Bell, Mohammad R. Haghighat, Alberto J. Martinez, Michael P. Flynn. vlsic 2020: 1-2 [doi]

2015

An Ultra-Low-Voltage 160 MS/s 7 Bit Interpolated Pipeline ADC Using Dynamic AmplifiersJames Lin, Daehwa Paik, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa. jssc, 50(6):1399-1411, 2015. [doi]

Sub-Picosecond Resolution and High-Precision TDC for ADPLLs Using Charge Pump and SAR-ADCZule Xu, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa. ieicet, 98-A(2):476-484, 2015. [doi]

2013

A 0.55 V 7-bit 160 MS/s interpolated pipeline ADC using dynamic amplifiersJames Lin, Daehwa Paik, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa. cicc 2013: 1-4 [doi]

A 0.84ps-LSB 2.47mW time-to-digital converter using charge pump and SAR-ADCZule Xu, Seungjong Lee, Masaya Miyahara, Akira Matsuzawa. cicc 2013: 1-4 [doi]

2002

Interface synthesis between software chip model and target boardSeungjong Lee, Ando Ki, In-Cheol Park, Chong-Min Kyung. jsa, 48(1-3):49-57, 2002. [doi]

1999

Verification of a Microprocessor Using Real World ApplicationsYou-Sung Chang, Seungjong Lee, In-Cheol Park, Chong-Min Kyung. dac 1999: 181-184 [doi]

1998

Virtual Chip: Making Functional Models Work on Real Target SystemsNamseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, Chong-Min Kyung. dac 1998: 170-173 [doi]

1997

Verification methodology of compatible microprocessorsJoon-Seo Yim, Chang-Jae Park, Woo-Seung Yang, Hun-Seung Oh, Hee Choul Lee, Hoon Choi, Tae Hoon Kim, Seungjong Lee, Nara Won, Yung-Hei Lee, In-Cheol Park, Chong-Min Kyung. aspdac 1997: 173-180 [doi]

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