Abstract is missing.
- Embedded PLL Phase Noise Measurement Based on a PFD/CP MASH 1-1-1 ΔΣ Time-to-Digital Converter in 7nm CMOSMao-Hsuan Chou, Ya-Tin Chang, Tsung-Hsien Tsai, Tsung-Che Lu, Chia-Chun Liao, Hung-Yi Kuo, Ruey-Bin Sheen, Chih-Hsien Chang, Kenny C.-H. Hsieh, Alvin L.-S. Loke, Mark Chen 0001. 1-2 [doi]
- A 0.72 nW, 1 Sample/s Fully Integrated pH Sensor with 65.8 LSB/pH SensitivityYihan Zhang, Filipe A. Cardoso, Kenneth L. Shepard. 1-2 [doi]
- A 28-Gb/s/pin PAM-4 Single-Ended Transmitter with High-Linearity and Impedance-Matched Driver and 3-Point ZQ Calibration for Memory InterfacesYong-Un Jeong, Hyunkyu Park, Changho Hyun, Suhwan Kim. 1-2 [doi]
- A 36-Channel SPAD-Integrated Scanning LiDAR Sensor with Multi-Event Histogramming TDC and Embedded Interference FilterHyeongseok Seo, Heesun Yoon, Dongkyu Kim, Jungwoo Kim, Seong-Jin Kim, Jung-Hoon Chun, Jaehyuk Choi. 1-2 [doi]
- An Ultra-Low Latency 7.8-13.6 pJ/b Reconfigurable Neural Network-Assisted Polar Decoder with Multi-Code Length SupportChieh-Fang Teng, Chun-Hsiang Chen, An-Yeu Andy Wu. 1-2 [doi]
- A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting MM CDR and Adaptive DFE with Single Shared Error SamplerMoon-Chul Choi, Han-Gon Ko, Jonghyun Oh, Hye-Yoon Joo, KwangHo Lee, Deog Kyoon Jeong. 1-2 [doi]
- Managing Chip Design Complexity in the Domain-Specific SoC EraYunsup Lee, Andrew Waterman. 1-2 [doi]
- An 8Ω, 1.4W, 0.0024% THD+N Class-D Audio Amplifier with Bridge-Tied Load Half-Side Switching Mode Achieving Low Standby Quiescent Current of 660μAJi-Hun Lee, Gyeong-Gu Kang, Min-Woo Ko, Gyu-Hyeong Cho, Hyun-Sik Kim. 1-2 [doi]
- A 22nm 96KX144 RRAM Macro with a Self-Tracking Reference and a Low Ripple Charge Pump to Achieve a Configurable Read Window and a Wide Operating Voltage RangeChung-Cheng Chou, Zheng-Jun Lin, Chien-An Lai, Chin-I Su, Pei-Ling Tseng, Wei-Chi Chen, Wu-Chin Tsai, Wen-Ting Chu, Tong-Chern Ong, Harry Chuang, Yu-Der Chih, Tsung-Yung Jonathan Chang. 1-2 [doi]
- Sample and Average Common-Mode Feedback in a 101 nW Acoustic AmplifierRohit Rothe, Sechang Oh, Kyojin David Choo, Seokhyeon Jeong, Minchang Cho, Dennis Sylvester, David T. Blaauw. 1-2 [doi]
- A 1MS/s to 1GS/s Ringamp-Based Pipelined ADC with Fully Dynamic Reference Regulation and Stochastic Scope-on-Chip Background Monitoring in 16nmBenjamin P. Hershberg, Nereo Markulic, Jorge Lagos, Ewout Martens, Davide Dermit, Jan Craninckx. 1-2 [doi]
- 2 Simultaneous Wireless Inter-Tier Data and Power TransferBenjamin J. Fletcher, Terrence S. T. Mak, Shidhartha Das. 1-2 [doi]
- Z-PIM: An Energy-Efficient Sparsity Aware Processing-In-Memory Architecture with Fully-Variable Weight PrecisionJi-Hoon Kim, Juhyoung Lee, Jinsu Lee, Hoi-Jun Yoo, Joo-Young Kim 0001. 1-2 [doi]
- An N-Path Switched-Capacitor Rectifier for Piezoelectric Energy Harvesting Achieving 13.9× Power Extraction ImprovementLoai G. Salem. 1-2 [doi]
- A 293/440 GHz Push-Push Double Feedback Oscillators with 5.0/-3.9 dBm Output Power and 2.9/0.6 % DC-to-RF Efficiency in 65 nm CMOSDzuhri Radityo Utomo, Dae-Woong Park, Byeonghun Yun, Sang-Gug Lee. 1-2 [doi]
- A -105dB THD 88dB-SNDR VCO-Based Sensor Front-End Enabled by Background-Calibrated Differential Pulse Code ModulationJiannan Huang, Patrick P. Mercier. 1-2 [doi]
- A 1200×1200 8-Edges/Vertex FPGA-Based Motion-Planning Accelerator for Dual-Arm-Robot Manipulation SystemsAtsutake Kosuge, Takashi Oshima. 1-2 [doi]
- A 29% PAE 1.5Bit-DSM-Based Polar Transmitter with Spur-Mitigated Injection-Locked PLLYuncheng Zhang, Bangan Liu, Xiaofan Gu, Chun Wang, Kiyoshi Yanagisawa, Junjun Qiu, Yun Wang, Jian Pang, Atsushi Shirane, Kenichi Okada. 1-2 [doi]
- 315-GHz Self-Synchronizing Minimum Shift Keying Receiver in 65-nm CMOSIbukunoluwa Momson, Shenggang Dong, Pavan Yelleswarapu, Wooyeol Choi 0001, K. O. Kenneth. 1-2 [doi]
- A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic CountermeasuresRaghavan Kumar, Xiaosen Liu, Vikram Suresh, Harish Krishnamurthy, Mark Anders, Himanshu Kaul, Krishnan Ravichandran, Vivek De, Sanu Mathew. 1-2 [doi]
- Dual-Port Field-Free SOT-MRAM Achieving 90-MHz Read and 60-MHz Write Operations under 55-nm CMOS Technology and 1.2-V Supply VoltageMasanori Natsui, Akira Tamakoshi, H. Honjo, T. Watanabe, Takashi Nasuno, C. Zhang, T. Tanigawa, H. Inoue, M. Niwa, T. Yoshiduka, Y. Noguchi, Mitsuo Yasuhira, Y. Ma, H. Shen, Shunsuke Fukami, H. Sato, S. Ikeda, H. Ohno, Tetsuo Endoh, Takahiro Hanyu. 1-2 [doi]
- A 247 and 272 GHz Two-Stage Regenerative Amplifiers in 65 nm CMOS with 18 and 15 dB Gain Based on Double-Gmax Gain Boosting TechniqueDae-Woong Park, Dzuhri Radityo Utomo, Jong-Phil Hong, Kristof Vaesen, Piet Wambacq, Sang-Gug Lee. 1-2 [doi]
- An 8b 1GS/s 2.55mW SAR-Flash ADC with Complementary Dynamic AmplifiersDong-Ryeol Oh, Kyoung-Jun Moon, Won-Mook Lim, Ye-Dam Kim, Eun-Ji An, Seung-Tak Ryu. 1-2 [doi]
- Open-Source Synthesizable Analog Blocks for High-Speed Link Designs: 20-GS/s 5b ENOB Analog-to-Digital Converter and 5-GHz Phase InterpolatorSung Jin Kim, Zachary Myers, Steven Herbst, ByongChan Lim, Mark Horowitz. 1-2 [doi]
- 2 Area in 180nmLuigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto. 1-2 [doi]
- A 177mW 10GS/s NRZ DAC with Switching-Glitch Compensation Achieving > 64dBc SFDR and < -77dBc IM3Hung-Yi Huang, Xin-Yu Chen, Tai-Haur Kuo. 1-2 [doi]
- A Domino Bootstrapping 12V GaN Driver for Driving an On-Chip 650V eGaN Power Switch for 96% High EfficiencyHsuan-Yu Chen, Wei-Tin Lin, Cheng-Hsiang Liao, Zong-Yi Lin, Zhi Qiang Zhang, Yu-Yung Kao, Ke-Horng Chen, Ying-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai. 1-2 [doi]
- A 4V-0.55V Input Fully Integrated Switched-Capacitor Converter Enabling Dynamic Voltage Domain Stacking and Achieving 80.1% Average EfficiencyTim Thielemans, Filip Tavernier. 1-2 [doi]
- SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML EfficiencyIvan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy. 1-2 [doi]
- 2 All-Dynamic Capacitance-to-Digital Converter with Energy-Efficient Charge ReuseHaoming Xin, Kevin Pelzers, Peter G. M. Baltus, Eugenio Cantatore, Pieter Harpe. 1-2 [doi]
- A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing UnitS. Paul, T. Majumder, Charles Augustine, Andres F. Malavasi, S. Usirikayala, R. Kumar, Jisna Kollikunnel, S. Chhabra, Satish Yada, M. L. Barajas, C. Ornelas, D. Lake, Muhammad M. Khellah, Jim Tschanz, V. De. 1-2 [doi]
- A Monolithically Integrated Silicon Photonics 8×8 Switch in 90nm SOI CMOSJonathan E. Proesel, Nicolas Dupuis, Herschel A. Ainspan, Christian W. Baks, Fuad E. Doany, Nicolas Boyer, Elaine Cyr, Benjamin G. Lee. 1-2 [doi]
- A 28nm 10Mb Embedded Flash Memory for IoT Product with Ultra-Low Power Near-1V Supply Voltage and High Temperature for Grade 1 OperationHoyoung Shin, Jisung Kim, Shinwuk Kang, Sungung Kwak. 1-2 [doi]
- High-Density and Large-Scale MEA System Featuring 236, 880 Electrodes at 11.72μm Pitch for Neuronal Network AnalysisYuri Kato, Yoshihisa Matoba, Katsumi Honda, Koji Ogawa, Kan Shimizu, Masataka Maehara, Atsushi Fujiwara, Aoi Odawara, Chigusa Yamane, Naohiko Kimizuka, Jun Ogi, Tadayuki Taura, Ikuro Suzuki, Yusuke Oike. 1-2 [doi]
- A 7nm Fin-FET 4.04-Mb/mm2 TCAM with Improved Electromigration Reliability Using Far-Side Driving Scheme and Self-Adjust Reference Match-Line AmplifierMakoto Yabuuchi, Masao Morimoto, Yasumasa Tsukamoto, Shinji Tanaka. 1-2 [doi]
- An Artificial Iris ASIC with High Voltage Liquid Crystal Driver, 10 nA Light Range Detector and 40 nA Blink Detector for LCD Flicker RemovalBogdan C. Raducanu, Samira Zali Asl, Stefano Stanzione, Chris van Liempd, Andrés Vásquez Quintero, Herbert De Smet, Johan De Baets, Chris Van Hoof, Nick Van Helleputte. 1-2 [doi]
- A Compact 14 GS/s 8-Bit Switched-Capacitor DAC in 16 nm FinFET CMOSPietro Caragiulo, Oscar Elisio Mattia, Amin Arbabian, Boris Murmann. 1-2 [doi]
- A Mixed-Signal Time-Domain Generative Adversarial Network Accelerator with Efficient Subthreshold Time Multiplier and Mixed-Signal On-Chip Training for Low Power Edge DevicesZhengyu Chen, Sihua Fu, Qiankai Cao, Jie Gu. 1-2 [doi]
- 28 Challenge-Response Machine-Learning Resistant Strong-PUF in 14nm CMOS Featuring Stability-Aware Adversarial Challenge SelectionVikram B. Suresh, Raghavan Kumar, Mark Anders, Himanshu Kaul, Vivek De, Sanu Mathew. 1-2 [doi]
- A 617 TOPS/W All Digital Binary Neural Network Accelerator in 10nm FinFET CMOSPhil C. Knag, Gregory K. Chen, Huseyin Ekin Sumbul, Raghavan Kumar, Mark A. Anders, Himanshu Kaul, Steven K. Hsu, Amit Agarwal 0001, Monodeep Kar, Seongjong Kim, Ram K. Krishnamurthy. 1-2 [doi]
- A -107.8 dB THD+N Low-EMI Multi-Level Class-D Audio AmplifierHuajun Zhang, Shoubhik Karmakar, Lucien J. Breems, Quino Sandifort, Marco Berkhout, Kofi A. A. Makinwa, Qinwen Fan. 1-2 [doi]
- A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight SkippingSangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, Hoi-Jun Yoo. 1-2 [doi]
- Low-Clock-Power Digital Standard Cell IPs for High-Performance Graphics/AI Processors in 10nm CMOSSteven Hsu, Amit Agarwal 0001, Simeon Realov, Mark Anders, Gregory K. Chen, Monodeep Kar, Raghavan Kumar, Huseyin Sumbul, Phil V. Knag, Himanshu Kaul, Vikram B. Suresh, Sanu Mathew, Iqbal Rajwani, Satish Damaraju, Ram Krishnamurthy, Vivek De. 1-2 [doi]
- A 8.7ppm/°C, 694nW, One-Point Calibrated RC Oscillator using a Nonlinearity-Aware Dual Phase-Locked Loop and DSM-Controlled Frequency-Locked LoopsGiorgio Cristiano, Jiawei Liao, Alessandro Novello, Gabriele Atzeni, Taekwang Jang. 1-2 [doi]
- A 3.2-to-3.8GHz Calibration-Free Harmonic-Mixer-Based Dual-Feedback Fractional-N PLL Achieving -66dBc Worst-Case In-Band Fractional SpurMasaru Osada, Zule Xu, Tetsuya Iizuka. 1-2 [doi]
- An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAMZhehong Wang, Ziyun Li, Li Xu, Qing Dong 0001, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw. 1-2 [doi]
- A 435MHz, 2.5Mbps/W Side-Channel-Attack Resistant Crypto-Processor for Secure RSA-4K Public-Key Encryption in 14nm CMOSRaghavan Kumar, Sudhir Satpathy, Vikram Suresh, Mark Anders, Himanshu Kaul, Vivek De, Sanu Mathew. 1-2 [doi]
- A 785nW Multimodal (V/I/R) Sensor Interface IC for Ozone Pollutant Sensing and Correlated Cardiovascular Disease MonitoringPeng Wang, Rishika Agarwala, Henry L. Bishop, Anjana Dissanayake, Benton H. Calhoun. 1-2 [doi]
- An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current SteeringZakir Zakir Ahmed, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Christopher Schaef, Nachiket V. Desai, Krishnan Ravichandran, James W. Tschanz, Vivek De. 1-2 [doi]
- 2 Ultra High Density SRAM Macro using 7nm FinFET Technology with Dual-Edge Driven Wordline/Bitline and Write/Read-Assist CircuitYoshisato Yokoyama, Miki Tanaka, Koji Tanaka, Masao Morimoto, Makoto Yabuuchi, Yuichiro Ishii, Shinji Tanaka. 1-2 [doi]
- 2 Programmable Bayesian Inference Accelerator for Unsupervised Machine Perception using Parallel Gibbs Sampling in 16nmGlenn G. Ko, Yuji Chai, Marco Donato, Paul N. Whatmough, Thierry Tambe, Rob A. Rutenbar, David Brooks 0001, Gu-Yeon Wei. 1-2 [doi]
- A 10nm SRAM Design using Gate-Modulated Self-Collapse Write Assist Enabling 175mV VMIN Reduction with Negligible Power OverheadZheng Guo, Jami Wiedemer, Yusung Kim, Prithvee Sundararajan Ramamoorthy, Prateeksha Bindiganavile Sathyaprasad, Smita Shridharan, Daeyeon Kim, Eric Karl. 1-2 [doi]
- A Performance-Flexible Energy-Optimized Automotive-Grade Cortex-R4F SoC through Combined AVS/ABB/Bias-in-Memory-Array Closed-Loop Regulation in 28nm FD-SOIR. G. Gomez, Edwige Bano, Andreia Cathelin, Sylvain Clerc. 1-2 [doi]
- 1024-Electrode Hybrid Voltage/Current-Clamp Neural Interface System-on-Chip with Dynamic Incremental-SAR AcquisitionJun Wang, Akshay Paul, Dinghong Zhang, Jiajia Wu, Yuchen Xu, Yimin Zou, Chul Kim, Gert Cauwenberghs. 1-2 [doi]
- A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BWZhelu Li, Arnab Dutta 0004, Abhishek Mukherjee, Xiyuan Tang, Linxiao Shen, Lenian He, Nan Sun. 1-2 [doi]
- A Low Noise Read-Out IC with Gate Driver for Full Front Display Area Optical Fingerprint SensorsY. Kwon, M. Kim, S. Park, M. Jeong, S. M. Lee, S.-H. Lee, W. H. Lee, Y. K. Choi, J. Y. Lee. 1-2 [doi]
- A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory InterfaceJieqiong Du, Jia Zhou, Chia-Jen Liang, Boyu Hu, Yuan Du, Mau-Chung Frank Chang. 1-2 [doi]
- An RF Transceiver with Full Digital Interface Supporting 5G New Radio FR1 with 3.84Gbps DL/1.92Gbps UL and Dual-Band GNSS in 14nm FinFET CMOSSangwook Han, Jaehyuk Jang, Jaeseung Lee, Daechul Jeong, Joonhee Lee, Jongsoo Lee, Chung Lau, Juyoung Han, Sung-Jun Lee, Jeongyeol Bae, Ikkyun Cho, Sang-Yun Lee, Shinwoong Kim, Jae-Hoon Lee, Yanghoon Lee, Jaehong Jung, Junho Huh, Jongwoo Lee, Thomas Cho, Inyup Kang. 1-2 [doi]
- A 4×112 Gb/s ADC-DSP Based Multistandard Receiver in 7nm FinFETHaidang Lin, Charles Boecker, Masum Hossain, Shankar Tangirala, Roxanne Vu, Socrates D. Vamvakos, Eric Groen, Simon Li, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Hossein Taghavi, Marcus van Ierssel, AdilHussain Maniyar, Adam Wodkowski, Nhat Nguyen, Shaishav Desai. 1-2 [doi]
- An 8-Element Frequency-Selective Acoustic Beamformer and Bitstream Feature Extractor with 60 Mel-Frequency Energy Features Enabling 95% Speech Recognition AccuracySeungjong Lee, Taewook Kang, John Bell, Mohammad R. Haghighat, Alberto J. Martinez, Michael P. Flynn. 1-2 [doi]
- A Packaged Ingestible Bio-Pill with 15-Pixel Multiplexed Fluorescence Nucleic-Acid Sensor and Bi-Directional Wireless Interface for In-Vivo Bio-Molecular SensingChengjie Zhu, Yuhan Wen, Tao Liu, Haw Yang, Kaushik Sengupta. 1-2 [doi]
- A 440μW, 109.8dB DR, 106.5dB SNDR Discrete-Time Zoom ADC with a 20kHz BWEfraïm Eland, Shoubhik Karmakar, Burak Gönen, Robert H. M. van Veldhoven, Kofi A. A. Makinwa. 1-2 [doi]
- nd-Order Noise-Shaping Hybrid Voltage-Time Two-Step ADC Achieving 170.9 dB FoMSYifan Lyu, Filip Tavernier. 1-2 [doi]
- A 200μW Eddy Current Displacement Sensor with 6.7nmRMS ResolutionMatheus F. Pimenta, Çagri Gürleyük, Paul Walsh, Daniel O'Keeffe, Masoud Babaie, Kofi A. A. Makinwa. 1-2 [doi]
- A 920MHz 16-FSK Receiver Achieving a Sensitivity of -103dBm at 0.6mW Via an Integrated N-Path Filter BankAli Nikoofard, Hamed Abbasi Zadeh, Patrick P. Mercier. 1-2 [doi]
- A Probabilistic Self-Annealing Compute Fabric Based on 560 Hexagonally Coupled Ring Oscillators for Solving Combinatorial Optimization ProblemsIbrahim Ahmed 0002, Po-Wei Chiu, Chris H. Kim. 1-2 [doi]
- UniCaP-2: Phase-Locked Adaptive Clocking with Rapid Clock Cycle Recovery in 65nm CMOSXun Sun, Akshat Boora, Rajesh Pamula 0001, Chi-Hsiang Huang, Diego Peña-Colaiocco, Visvesh S. Sathe 0001. 1-2 [doi]
- An Automotive-Use Battery-to-Load GaN-Based Power Converter with Anti-Aliasing Multi-Rate Spread-Spectrum Modulation and In-Cycle ZVS SwitchingDong Yan, Dongsheng Brian Ma. 1-2 [doi]
- A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and InferenceJinwook Oh, Sae Kyu Lee, Mingu Kang, Matthew M. Ziegler, Joel Silberman, Ankur Agrawal, Swagath Venkataramani, Bruce M. Fleischer, Michael Guillorn, Jungwook Choi, Wei Wang, Silvia Mueller, Shimon Ben-Yehuda, James Bonanno, Nianzheng Cao, Robert Casatuta, Chia-Yu Chen, Matt Cohen, Ophir Erez, Thomas W. Fox, George Gristede, Howard Haynie, Vicktoria Ivanov, Siyu Koswatta, Shih-Hsien Lo, Martin Lutz, Gary W. Maier, Alex Mesh, Yevgeny Nustov, Scot Rider, Marcel Schaal, Michael Scheuermann, Xiao Sun, Naigang Wang, Fanchieh Yee, Ching Zhou, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang. 1-2 [doi]
- Low Swing and Column Multiplexed Bitline Techniques for Low-Vmin, Noise-Tolerant, High-Density, 1R1W 8T-Bitcell SRAM in 10nm FinFET CMOSJaydeep P. Kulkarni, Andres Malavasi, Charles Augustine, Carlos Tokunaga, Jim Tschanz, Muhammad M. Khellah, V. De. 1-2 [doi]
- nd-Order ΔΣ Modulator with Digital Feedforward Extrapolation in 28nm CMOSDongyang Jiang, Liang Qi, Sai-Weng Sin, Franco Maloberti, R. P. Martins. 1-2 [doi]
- A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOSWei-Chih Chen, Chin-Hua Wen, Chin-Ming Fu, Tsung-Hsien Tsai, Yu-Chi Chen, Wen-Hung Huang, Chien-Chun Tsai, Alvin L.-S. Loke, C. H. Kenny. 1-2 [doi]
- A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular SystemsChi-Chih Wen, Yu-Chi Lee, Yi-Chung Wu, Chen-Chien Kao, Chia-Hsiang Yang. 1-2 [doi]
- A Single-Trim Switched Capacitor CMOS Bandgap Reference with a 3σ Inaccuracy of +0.02%, -0.12% for Battery Monitoring ApplicationsJun-Ho Boo, Kang-Il Cho, Ho-Jin Kim, Jae-Geun Lim, Yong-Sik Kwak, Seung-Hoon Lee, Gil-Cho Ahn. 1-2 [doi]
- Model Predictive Control of an Integrated Buck Converter for Digital SoC Domains in 65nm CMOSXun Sun, Akshat Boora, Rajesh Pamula 0001, Chi-Hsiang Huang 0003, Diego Peña-Colaiocco, Visvesh S. Sathe 0001. 1-2 [doi]
- MANA: A Monolithic Adiabatic iNtegration Architecture Microprocessor using 1.4zJ/op Superconductor Josephson Junction DevicesChristopher L. Ayala, Tomoyuki Tanaka, Ro Saito, Mai Nozoe, Naoki Takeuchi, Nobuyuki Yoshikawa. 1-2 [doi]
- 2 28nm FDSOI STT-MRAM with Current Starved Read Path, 52Ω/Sigma Offset Voltage Sense Amplifier and Fully Trimmable CTAT ReferenceEl Mehdi Boujamaa, Samsudeen Mohamed Ali, Steve Ngueya Wandji, Alexandra Gourio, Suk-Soo Pyo, Gwanhyeob Koh, Yoonjong Song, Taejoong Song, Jongwook Kye, Jean-Christophe Vial, Andrew Sowden, Manuj Rathor, Cyrille Dray. 1-2 [doi]
- A Pressure Sensing System with ±0.75 mmHg (3σ) Inaccuracy for Battery-Powered Low Power IoT ApplicationsSeokhyeon Jeong, Yejoong Kim, Gyouho Kim, David T. Blaauw. 1-2 [doi]
- A 1.8 Gb/s/pin 16Tb NAND Flash Memory Multi-Chip Package with F-Chip of Toggle 4.0 Specification for High Performance and High Capacity Storage SystemsJang-Woo Lee, Dae-Hoon Na, Anil Kavala, Hwasuk Cho, Junha Lee, Manjae Yang, Eunjin Song, Tongsung Kim, Seon-Kyoo Lee, Dong-Su Jang, Byung-Kwan Chun, Youngmin Jo, Sunwon Jung, Doo-Il Jung, Chan Ho Kim, Daewoon Kang, Tae-Sung Lee, Byunghoon Jeong, Chiweon Yoon, Dongku Kang, Seungjae Lee, Jungdon Ihm, Dae-Seok Byeon, Jin-Yup Lee, Sangjoon Hwang, Jai Hyuk Song. 1-2 [doi]
- 32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum LogicKoki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue. 1-2 [doi]
- A Portable NMR System with 50-kHz IF, 10-us Dead Time, and Frequency TrackingSungjin Hong, Nan Sun. 1-2 [doi]
- A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple CancellationXiyuan Tang, Yi Shen, Xin Xin, Shubin Liu, Jueping Cai, Zhangming Zhu, Nan Sun. 1-2 [doi]
- A 0.9pJ/Cycle 8ppm/°C DFLL-Based Wakeup Timer Enabled by a Time-Domain Trimming and An Embedded Temperature SensingMing Ding 0003, Minyoung Song, Evgenii Tiurin, Stefano Traferro, Yao-Hong Liu, Christian Bachmann. 1-2 [doi]
- A Multichannel, MEMS-Less -99dBm 260nW Bit-Level Duty Cycled Wakeup ReceiverAnjana Dissanayake, Henry L. Bishop, Jesse Moody, Henry Muhlbauer, Benton H. Calhoun, Steven M. Bowers. 1-2 [doi]
- 2 Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance SensingKwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo. 1-2 [doi]
- 1.03pW/b Ultra-Low Leakage Voltage-Stacked SRAM for Intelligent Edge ProcessorsJingcheng Wang, Hyochan An, Qirui Zhang, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester. 1-2 [doi]
- A 50.7dB-DR Finger-Resistance Extractable Multi-Touch Sensor IC Achieving Finger-Classification Accuracy of 97.7% on 6.7-Inch Capacitive Touch Screen PanelTae-Gyun Song, Dong-Kyu Kim, Jeong-Hyun Cho, Ji-Hun Lee, Hyun-Sik Kim. 1-2 [doi]
- Multi-Sensor Platform with Five-Order-of-Magnitude System Power Adaptation down to 3.1nW and Sustained Operation under Moonlight HarvestingLongyang Lin, Saurabh Jain, Massimo Alioto. 1-2 [doi]
- A Reconfigurable High-Bandwidth CMOS-MEMS Capacitive Accelerometer Array with High-g Measurement Capability and Low Bias InstabilityXiaoliang Li, Vincent P. J. Chung, Metin G. Guney, Tamal Mukherjee, Gary K. Fedder, Jeyanandh Paramesh. 1-2 [doi]
- A 120-330V, Sub-μA, 4-Channel Driver for Microrobotic Actuators with Wireless-Optical Power Delivery and over 99% Current EfficiencyJan S. Rentmeister, M. Hassan Kiani, Kristofer Pister, Jason T. Stauth. 1-2 [doi]
- A 170μW Image Signal Processor Enabling Hierarchical Image Recognition for Intelligence at the EdgeHyochan An, Siddharth Venkatesan, Sam Schiferl, Tim Wesley, Qirui Zhang, Jingcheng Wang, Kyojin Choo, Shiyu Liu, Bowen Liu, Ziyun Li, Hengfei Zhong, Luyao Gong, David T. Blaauw, Ronald G. Dreslinski, Dennis Sylvester, Hun-Seok Kim. 1-2 [doi]
- 2 6.7μW Three-Stage Amplifier Capable of Driving 0.5-to-1.9nF Capacitive Load with >0.68MHz GBW without Compensation ZeroHongseok Shin, Jinuk Kim, Doojin Jang, Donghee Cho, Yoontae Jung, Hyungjoo Cho, Unbong Lee, Chul Kim, Sohmyung Ha, Minkyu Je. 1-2 [doi]
- A 4.4μW -92/-90.3dBm Sensitivity Dual-Mode BLE/Wi-Fi Wake-up ReceiverPo-Han Peter Wang, Patrick P. Mercier. 1-2 [doi]
- A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SAB-ELD-Merged Integrator and 3-Stage OpampKai Xing, Wei Wang 0177, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 1-2 [doi]
- 17.3 GCUPS Pruning-Based Pair-Hidden-Markov-Model Accelerator for Next-Generation DNA SequencingXiao Wu 0002, Arun Subramaniyan 0001, Zhehong Wang, Satish Narayanasamy, Reetu Das, David T. Blaauw. 1-2 [doi]
- A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable DevicesDongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, Hoi-Jun Yoo. 1-2 [doi]
- A 3.0μW@5fps QQVGA Self-Controlled Wake-Up Imager with On-Chip Motion Detection, Auto-Exposure and Object RecognitionArnaud Verdant, William Guicquero, Nicolas Royer, Guillaume Moritz, Sébastien Martin, Florent Lepin, Sylvain Choisnet, Fabrice Guellec, Benoît Deschamps, Sylvain Clerc, Jérôme Chossat. 1-2 [doi]
- 2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited WorkloadsCharles Augustine, Somnath Paul, Turbo Majumder, James W. Tschanz, Muhammad M. Khellah, Vivek De. 1-2 [doi]
- A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTCJaehong Jung, Sangdon Jung, Kyungmin Lee, Jun-Hee Jung, Seungjin Kim, Byungki Han, Seunghyun Oh, Jongwoo Lee. 1-2 [doi]
- A 65nm Image Processing SoC Supporting Multiple DNN Models and Real-Time Computation-Communication Trade-Off Via Actor-Critical Neuro-ControllerNingyuan Cao, Baibhab Chatterjee, Minxiang Gong, Muya Chang, Shreyas Sen, Arijit Raychowdhury. 1-2 [doi]
- A 25×50Gb/s 2.22pJ/b NRZ RX with Dual-Bank and 3-Tap Speculative DFE for Microprocessor Application in 7nm FinFET CMOSYang You, Glen A. Wiedemeier, Chad Marquart, Chris Steffen, Erik English, Dereje Yilma, Thomas Pham, Venkat Nammi, Jeffrey Okyere, Nathan Blanchard, Akil Sutton, Ze Zhang, David Friend, Diego Barba, Tyler Bohlke, Michael Spear, Vikram Raj, James Crugnale, Daniel Dreps, Pier Andrea Francese, Marcel A. Kossel, Thomas Morf. 1-2 [doi]
- A 28-GHz CMOS Phased-Array Beamformer Supporting Dual-Polarized MIMO with Cross-Polarization Leakage CancellationJian Pang, Zheng Li, Xueting Luo, Joshua Alvin, Rattanan Saengchan, Ashbir Aviat Fadila, Kiyoshi Yanagisawa, Yi Zhang, Zixin Chen, Zhongliang Huang, Xiaofan Gu, Rui Wu, Yun Wang, Dongwon You, Bangan Liu, Zheng Sun, Yucheng Zhang, Hongye Huang, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. 1-2 [doi]
- A 3.3-GHz 101fsrms-Jitter, -250.3dB FOM Fractional-N DPLL with Phase Error Detection Accomplished in Fully Differential Voltage DomainLianbo Wu, Thomas Burger, Philipp Schönle, Qiuting Huang. 1-2 [doi]
- A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High EfficiencyXiaosen Liu, Harish K. Krishnamurthy, Claudia P. Barrera, Jing Han, Rajasekhara M. Narayana Bhatla, Scott Chiu, Zakir K. Ahmed, Krishnan Ravichandran, James W. Tschanz, Vivek De. 1-2 [doi]
- A Fast Locking 5.8 - 7.2 GHz Fractional-N Synthesizer with Sub-2 us Settling Time in 22 nm FDSOIJeffrey Prinzie, Shuja Andrabi, Christophe Beghein, Changhua Cao, Xiaochuan Guo, Jon Strange, Bernard Tenbroek. 1-2 [doi]
- A 0.5V 560kHz 18.8fJ/Cycle Ultra-Low Energy Oscillator in 65nm CMOS with 96.1ppm/°C Stability using a Duty-Cycled Digital Frequency-Locked LoopDaniel S. Truesdell, Shuo Li 0008, Benton H. Calhoun. 1-2 [doi]
- A 65nm 16kb SRAM with 131.5pW Leakage at 0.9V for Wireless IoT Sensor NodesShourya Gupta, Daniel S. Truesdell, Benton H. Calhoun. 1-2 [doi]
- A 6.78 MHz Wireless Power Transfer System Enabling Perpendicular Wireless Powering with Efficiency Increase from 0.02% to 48.2% by Adaptive Magnetic Field Adder IC Integrating Shared Coupling Coefficient SensorHao Qiu, Toru Sai, Makoto Takamiya. 1-2 [doi]
- A 2D-SPAD Array and Read-Out AFE for Next-Generation Solid-State LiDARTuan Thanh Ta, Hiroshi Kubota, Koichi Kokubun, Toshiki Sugimoto, Masatoshi Hirono, Mitsuhiro Sengoku, Hisaaki Katagiri, Hidenori Okuni, Satoshi Kondo, Shinichi Ohtsuka, Honam Kwon, Keita Sasaki, Yutaka Ota, Kazuhiro Suzuki, Katsuyuki Kimura, Kentaro Yoshioka, Akihide Sai, Nobu Matsumoto. 1-2 [doi]
- Industrial IoT with Crystal-Free Mote-on-ChipTengfei Chang, Timothy Claeys, Malisa Vucinic, Xavier Vilajosana, Titan Yuan, Brad Wheeler, Filip Maksimovic, David C. Burnett, Brian Kilberg, Kris Pister, Thomas Watteyne. 1-2 [doi]
- 2 using Sneaking Current Suppression and Compensation TechniquesJianguo Yang, Xiaoyong Xue, Xiaoxin Xu, Hangbing Lv, Feng Zhang 0014, Xiaoyang Zeng, Meng-Fan Chang, Ming Liu 0022. 1-2 [doi]
- An Always-on 4× Compressive VGA CMOS Imager with 51pJ/Pixel and >32dB PSNRWenda Zhao, Chanmin Park, Injun Park, Nan Sun, Youngcheol Chae. 1-2 [doi]
- A Proactive Voltage-Droop-Mitigation System in a 7nm Hexagon™ ProcessorVijay Kiran Kalyanam, Eric Mahurin, Keith Bowman, Jacob A. Abraham. 1-2 [doi]
- A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality ApplicationsMonodeep Kar, Amit Agarwal 0001, Steven Hsu, David Moloney, Gregory K. Chen, Raghavan Kumar, Huseyin Sumbul, Phil V. Knag, Mark Anders, Himanshu Kaul, Jonathan Byrne, Luca Sarti, Ram Krishnamurthy, Vivek De. 1-2 [doi]