George Gristede - researchr alias

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Viewing Publication 1 - 17 from 17

2020

2018

2016

A synthesis-parameter tuning system for autonomous design-space explorationMatthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni. date 2016: 1148-1151 [doi]

A Scalable Black-Box Optimization System for Auto-Tuning VLSI Synthesis ProgramsMatthew M. Ziegler, Hung-Yi Liu, George Gristede, Bruce Owens, Ricardo Nigaglioni, Luca P. Carloni. date 2016: 8-12 [doi]

2014

POWER8 design methodology innovations for improving productivity and reducing powerMatthew M. Ziegler, Ruchir Puri, Bob Philhower, Robert Franch, Wing Luk, Jens Leenstra, Peter Verwegen, Niels Fricke, George Gristede, Eric Fluhr, Victor V. Zyuban. cicc 2014: 1-9 [doi]

2013

Power reduction by aggressive synthesis design space explorationMatthew M. Ziegler, George Gristede, Victor V. Zyuban. islped 2013: 421-426 [doi]

2009

A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR)Milena Vratonjic, Matthew M. Ziegler, George Gristede, Victor V. Zyuban, Thomas Mitchell, Ee Cho, Chandu Visweswariah, Vojin G. Oklobdzija. patmos 2010: 307-316 [doi]

The opportunity cost of low power design: a case study in circuit tuningMatthew M. Ziegler, Victor V. Zyuban, George Gristede, Milena Vratonjic, Joshua Friedrich. islped 2009: 133-138 [doi]

2005

Characterization of logic circuit techniques and optimization for high-leakage CMOS technologiesPhillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky. integration, 38(3):491-504, 2005. [doi]

2004

Characterization of logic circuit techniques for high leakage CMOS technologiesPhillip Chin, Charles A. Zukowski, George Gristede, Stephen V. Kosonocky. glvlsi 2004: 230-235 [doi]

2003

Low-power circuits and technology for wireless digital systemsStephen V. Kosonocky, Azeez J. Bhavnagarwala, Kenneth Chin, George Gristede, Anne-Marie Haen, Wei Hwang, Mark B. Ketchen, Suhwan Kim, Daniel R. Knebel, Kevin W. Warren, Victor V. Zyuban. ibmrd, 47(2-3):283-298, 2003. [doi]

2001

Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI designW. Chen, Wei Hwang, Prabhakar Kudva, George Gristede, Stephen V. Kosonocky, Rajiv V. Joshi. islped 2001: 263-266 [doi]

2000

A comparison of dual-rail pass transistor logic families in 1.5V, 0.18µm CMOS technology for low power applicationsGeorge Gristede, Wei Hwang. glvlsi 2000: 101-106 [doi]

A scannable pulse-to-static conversion register array for self-timed circuitsWei Hwang, Rajiv V. Joshi, George Gristede. jssc, 35(1):125-128, 2000. [doi]

1990

Measuring Error Propagation in Waveform Relaxation AlgorithmsCharles A. Zukowski, George Gristede, Albert E. Ruehli. iccad 1990: 170-173

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