- Farshad Aghasharif, Mohammadreza Malekpour, Reza Bigdeli, Pooya Torkzadeh. An 8 bits, RF UHF-Band DAC based on interleaved bandpass delta sigma modulator assisted by background digital calibration. Integration, 84:102-110, 2022.
- Tahesin Samira Delwar, Abrar Siddique, Manas Ranjan Biswal, Prangyadarsini Behera, Ahmed Nabih Zaki Rashed, Yeji Choi, Jee-Youl Ryu. A novel dual mode configurable and tunable high-gain, high-efficient CMOS power amplifier for 5G applications. Integration, 83:77-87, 2022.
- Samuel Sirois, Messaoud Ahmed-Ouameur, Daniel Massicotte. High level synthesis strategies for ultra fast and low latency matrix inversion implementation for massive MIMO processing. Integration, 82:29-36, 2022.
- Tsung-Han Tsai 0001, Hsing-Chuang Liu. Design and implementation of filterbank for MPEG-2/4 AAC system. Integration, 82:155-162, 2022.
- Ashima Gupta, Anil Singh, Manu Bansal, Alpana Agarwal. Functional validation of highly synthesizable voltage comparator on FPGA. Integration, 84:151-158, 2022.
- Ankur Gogoi, Bibhas Ghoshal, Akash Sachan, Rakesh Kumar, Kanchan Manna. Application driven routing for mesh based Network-on-Chip architectures. Integration, 84:26-36, 2022.
- P. Meenakshi Vidya, S. Sudha. A fully integrated VLSI architecture using chaotic PWM for RF transmitter design with electromagnetic interference reduction. Integration, 83:33-45, 2022.
- Mohamed Chentouf, Zine El Abidine Alaoui Ismaili. A PUS based nets weighting mechanism for power, hold, and setup timing optimization. Integration, 84:122-130, 2022.
- Van-Toan Tran, Quang-Kien Trinh, Van-Phuc Hoang. A robust Euclidean metric based ID extraction method using RO-PUFs in FPGA. Integration, 82:37-47, 2022.
- Venkata Krishna Odugu, C. Venkata Narasimhulu, K. Satya Prasad. A novel filter-bank architecture of 2D-FIR symmetry filters using LUT based multipliers. Integration, 84:12-25, 2022.