Marcus van Ierssel - researchr alias

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Viewing Publication 1 - 18 from 18

2023

Synchronous Die-to-Die Signaling Using Aeonic ConnectMarcus van Ierssel, Fred N. Buhler, David Moore, Jeffrey Fredenburg. cicc 2023: 1-6 [doi]

2021

10-to-112-Gb/s DSP-DAC-Based Transmitter in 7-nm FinFET With Flex Clocking ArchitectureEric Groen, Charlie Boecker, Masum Hossain, Roxanne Vu, Socrates D. Vamvakos, Haidang Lin, Simon Li, Marcus van Ierssel, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Mohammad Hossein Taghavi, Kulwant Brar, Nhat Nguyen, Shaishav Desai. jssc, 56(1):30-42, 2021. [doi]

2020

2018

A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate supportMohammad Sadegh Jalali, Mohammad Hossein Taghavi, Angus McLaren, Jennifer Pham, Kamran Farzan, Dominic DiClemente, Marcus van Ierssel, William Song, Saman Asgaran, Chris D. Holdenried, Saman Sadr. isscc 2018: 106-108 [doi]

2014

Performance of edge tap decision feedback equalization methods for wireline receiversChris D. Holdenried, Ryan Bespalko, Marcus van Ierssel, Mehrdad Ramezani, David Cassan, Siamak Sarvari, Saman Sadr. newcas 2014: 5-8 [doi]

2011

An 8.4mW/Gb/s 4-lane 48Gb/s multi-standard-compliant transceiver in 40nm digital CMOS technologyMehrdad Ramezani, Mohamed Abdalla, Ayal Shoval, Marcus van Ierssel, Afshin Rezayee, Angus McLaren, Chris D. Holdenried, Jennifer Pham, Eric So, David Cassan, Saman Sadr. isscc 2011: 352-354 [doi]

2008

Event-Driven Modeling of CDR Jitter Induced by Power-Supply Noise, Finite Decision-Circuit Bandwidth, and Channel ISIMarcus van Ierssel, Hisakatsu Yamaguchi, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker. tcas, 55-I(5):1306-1315, 2008. [doi]

2007

A 3.2 Gb/s CDR Using Semi-Blind Oversampling to Achieve High Jitter ToleranceMarcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker. jssc, 42(10):2224-2234, 2007. [doi]

2006

A 3.2Gb/s Semi-Blind-Oversampling CDRMarcus van Ierssel, Ali Sheikholeslami, Hirotaka Tamura, William W. Walker. isscc 2006: 1304-1313 [doi]

A 5Gb/s Transmitter with Reflection Cancellation for Backplane TransceiversRicky Yuen, Marcus van Ierssel, Ali Sheikholeslami, William W. Walker, Hirotaka Tamura. cicc 2006: 413-416 [doi]

2004

An adaptive 4-PAM decision-feedback equalizer for chip-to-chip signalingMarcus van Ierssel, Joyce Wong, Ali Sheikholeslami. socc 2004: 297-300 [doi]

2003

Signaling capacity of FR4 PCB traces for chip-to-chip communicationMarcus van Ierssel, Tooraj Esmailian, Ali Sheikholeslami, P. S. Pasupathy. iscas 2003: 85-88 [doi]

1998

The Transmogrifier-2: a 1 million gate rapid-prototyping systemDavid M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow. tvlsi, 6(2):188-198, 1998. [doi]

1997

The Transmogrifier-2: A 1 Million Gate Rapid Prototyping SystemDavid M. Lewis, David R. Galloway, Marcus van Ierssel, Jonathan Rose, Paul Chow. fpga 1997: 53-61 [doi]

1993

A Field Programmable Accelerator for Compiled-Code ApplicationsDavid M. Lewis, Marcus van Ierssel, Daniel H. Wong. iccd 1993: 491-496

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