Abstract is missing.
- 4.2 An E-Band High-Linearity Antenna-LNA Front-End with 4.8dB NF and 2.2dBm IIP3 Exploiting Multi-Feed On-Antenna Noise-Canceling and Gm-BoostingSensen Li, Taiyun Chi, Doohwan Jung, Tzu-Yuan Huang, Min-Yu Huang, Hua Wang. 1-3 [doi]
- 9.2 A 134µW 24kHz-BW 103.5d8-DR CT ΔΣ Modulator with Chopped Negative-R and Tri-Level FIR DACMoon Hyung Jang, Changuk Lee, Youngcheol Chae. 1-3 [doi]
- 1.1 The Deep Learning Revolution and Its Implications for Computer Architecture and Chip DesignJeffrey Dean. 8-14 [doi]
- 1.2 Fertilizing AIoT from Roots to LeavesKou-Hung Lawrence Loh. 15-21 [doi]
- 1.3 Future Scaling: Where Systems and Technology MeetNadine Collaert. 25-29 [doi]
- 1.4 The Future of Computing: Bits + Neurons + QubitsDario Gil, William M. J. Green. 30-39 [doi]
- 2.1 Zen 2: The AMD 7nm Energy-Efficient High-Performance x86-64 Microprocessor CoreTeja Singh, Sundar Rangarajan, Deepesh John, Russell Schreiber, Spence Oliver, Rajit Seahra, Alex Schaefer. 42-44 [doi]
- 2.2 AMD Chiplet Architecture for High-Performance Server and Desktop ProductsSamuel Naffziger, Kevin Lepak, Milam Paraschou, Mahesh Subramony. 44-45 [doi]
- 2@ 82%-Peak-Efficiency DC-DC ConvertersPascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panadès, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sebastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frederic Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy. 46-48 [doi]
- 2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPUYoung-Duk Kim, WooKyeong Jeong, Lakkyung Jung, Dongsuk Shin, Jae Geun Song, Jinook Song, Hyeokman Kwon, Jaeyoung Lee, Jaesu Jung, MyungJin Kang, Jaehun Jeong, Yoonjoo Kwon, Nak Hee Seong. 48-50 [doi]
- 2.5 A 7nm FinFET 2.5GHz/2.0GHz Dual-Gear Octa-Core CPU Subsystem with Power/Performance Enhancements for a Fully Integrated 5G Smartphone SoCHugh Mair, Ericbill Wang, Ashish Nayak, Rolf Lagerquist, Loda Chou, Gordon Gammie, HsinChen Chen, Lee-Kee Yong, Manzur Rahman, Jenny Wiedemeier, Ramu Madhavaram, Alex Chiou, Blundt Li, Vincent Lin, Rory Huang, Michael Yanq, Achuta Thippana, Osric Su, S. A. Huang. 50-52 [doi]
- 2.6 A 16nm 3.5B+ Transistor >14TOPS 2-to-10W Multicore SoC Platform for Automotive and Embedded Applications with Integrated Safety MCU, 512b Vector VLIW DSP, Embedded Vision and Imaging AccelerationRama Venkatasubramanian, Don Steiss, Greg Shurtz, Tim Anderson, Kai Chirca, Raghavendra Santhanagopal, Niraj Nandan, Anish Reghunath, Hetul Sanghvi, Daniel Wu, Abhijeet Chachad, Brian Karguth, Denis Beaudoin, Charles Fuoco, Lewis Nardini, Chunhua Hu, Sam Visalli, Amrit Mundra, Devanathan Varadarajan, Frank Cano, Shane Stelmach, Mihir Mody, Arthur Redfern, Haydar Bilhan, Maher Sarraj, Ali Siddiki, Anthony Lell, Eldad Falik, Anthony M. Hill, Abhinay Armstrong, Todd Beck, Vijay Kanumuri, Steven Mullinnix, Darnell Moore, Jason Jones, Manoj Koul, Sanjive Agarwala. 52-54 [doi]
- 2.7 IBM z15: A 12-Core 5.2GHz MicroprocessorChristopher J. Berry, Brian Bell, Adam Jatkowski, Jesse Surprise, John Isakson, Ofer Geva, Brian Deskin, Mark Cichanowski, Dina Hamid, Chris Cavitt, Gregory Fredeman, Anthony Saporito, Ashutosh Mishra, Alper Buyuktosunoglu, Tobias Webel, Preetham Lobo, Pradeep Parashurama, Ramon Bertran, Dureseti Chidambarrao, David Wolpert 0001, Brandon Bruen. 54-56 [doi]
- 3.1 An Integrated BAW Oscillator with <±30ppm Frequency Stability Over Temperature, Package Stress, and Aging Suitable for High-Volume ProductionDanielle Griffith, Ernest Ting-Ta Yen, Kaichien Tsai, Habeeb Ur Rahman Mohammed, Baher Haroun, Ali Kiaei, Ahmad Bahai. 58-60 [doi]
- 2 FoM in 65nm CMOSAmr Khashaba, Junheng Zhu, Ahmed Elmallah, Mostafa Gamal Ahmed, Pavan Kumar Hanumolu. 60-62 [doi]
- 3.3 A 0.51nW 32kHz Crystal Oscillator Achieving 2ppb Allan Deviation Floor Using High-Energy-to-Noise-Ratio Pulse InjectionLi Xu 0006, Tae-Kwang Jang, Jongyup Lim, Kyojin David Choo, David T. Blaauw, Dennis Sylvester. 62-64 [doi]
- 3.4 A 16MHz CMOS RC Frequency Reference with ±400ppm Inaccuracy from -45°C to 85°C After Digital Linear Temperature CompensationÇagri Gürleyük, Sining Pan, Kofi A. A. Makinwa. 64-66 [doi]
- 3.5 A 34µW 32MHz RC Oscillator with ±530ppm Inaccuracy from -40°C to 85°C and 80ppm/V Supply Sensitivity Enabled by Pulse-Density Modulated ResistorsAmr Khashaba, Junheng Zhu, Mostafa Ahmed, Nilanjan Pal, Pavan Kumar Hanumolu. 66-68 [doi]
- 3.6 A CMOS Resistor-Based Temperature Sensor with a 10fJ·K2 Resolution FoM and 0.4°C (30) Inaccuracy From -55°C to 125°C After a 1-point TrimSining Pan, Kofi A. A. Makinwa. 68-70 [doi]
- 2Saleh Heidary Shalmany, Kamran Souri, Uaur Sonmez, Kianoush Souri, Michele D'Urbino, Said Hussaini, Darryl Tauro, Sassan Tabatabaei. 70-72 [doi]
- 3.8 A 23.6ppm/°C Monolithically Integrated GaN Reference Voltage Design with Temperature Range from -50°C to 200°C and Supply Voltage Range from 3.9 to 24VChenu-Hsing Liao, Shang-Hsien Yang, Meng-Yin Liao, Kai-Cheng Chung, Neha Kumari, Ke-Horng Chen, Yin-Hsi Lin, Shian-Ru Lin, Tsung-Yen Tsai, Ying-Zong Juang. 72-74 [doi]
- 4.1 A 39GHz-Band CMOS 16-Channel Phased-Array Transceiver IC with a Companion Dual-Stream IF Transceiver IC for 5G NR Base-Station ApplicationsH. C. Park, D. Kang, S. M. Lee, B. Park, K. Kim, J. Lee, Y. Aoki, Y. Yoon, S. Lee, D. Lee, D. Kwon, S. Kim, J. Kim, W. Lee, C. Kim, S. Park, J. Park, B. Suh, J. Jang, M. Kim, D. Minn, I. Park, S. Kim, K. Min, J. Park, S. Jeon, A.-S. Ryu, Y. Cho, S.-T. Choi, K. H. An, Y. Kim, J. H. Lee, J. Son, S.-G. Yang. 76-78 [doi]
- 4.3 A 28GHz 4-Element MIMO Beam-Space Array in 65nm CMOS with Simultaneous Spatial Filtering and Single-Wire Frequency-Domain MultiplexingRobin Garg, Gaurav Sharma, Ali Binaie, Sanket Jain, Sohail Ahasan, Armagan Dascurcu, Harish Krishnaswamy, Arun Natarajan. 80-82 [doi]
- 4.4 A 28/37GHz Scalable, Reconfigurable Multi-Layer Hybrid/Digital MIMO Transceiver for TDD/FDD and Full-Duplex CommunicationSusnata Mondal, L. Richard Carley, Jeyanandh Paramesh. 82-84 [doi]
- 4.5 A 64Gb/s 1.4pJ/b/element 60GHz 2×2-Element Phased-Array Receiver with 8b/symbol Polarization MIMO and Spatial Interference ToleranceAnandaroop Chakrabarti, Chintan Thakkar, Shuhei Yamada, Debabani Choudhury, James E. Jaussi, Bryan Casper. 84-86 [doi]
- 4.6 Space-Time Modulated 71-to-76GHz mm-Wave Transmitter Array for Physically Secure Directional Wireless LinksXuyang Lu, Suresh Venkatesh, Bingjun Tang, Kaushik Sengupta. 86-88 [doi]
- 4.7 A Single-Antenna W-Band FMCW Radar Front-End Utilizing Adaptive Leakage CancellationMilad Kalantari, Hossein Shirinabadi, Ali Fotowat Ahmadi, C. Patrick Yue. 88-90 [doi]
- 4.8 A Terahertz FMCW Comb Radar in 65nm CMOS with 100GHz BandwidthXiang Yi, Cheng Wang 0009, Muting Lu, Jinchen Wang, Jesus Grajal, Ruonan Han 0001. 90-92 [doi]
- 2 Voltage/Time Dual-Data-Converter-Based AFESatoshi Kondo, Hiroshi Kubota, Hisaaki Katagiri, Yutaka Ota, Masatoshi Hirono, Tuan Thanh Ta, Hidenori Okuni, Shinichi Ohtsuka, Yoshinari Ojima, Tomohiko Sugimoto, Hirotomo Ishii, Kentaro Yoshioka, Katsuyuki Kimura, Akihide Sai, Nobu Matsumoto. 94-96 [doi]
- 5.2 A 1200×900 6µm 450fps Geiger-Mode Vertical Avalanche Photodiodes CMOS Image Sensor for a 250m Time-of-Flight Ranging System Using Direct-Indirect-Mixed Frame Synthesis with Configurable-Depth-Resolution Down to 10cmToru Okino, Shota Yamada, Yusuke Sakata, Shigetaka Kasuga, Masato Takemoto, Yugo Nose, Hiroshi Koshida, Masaki Tamaru, Yuki Sugiura, Shigeru Saito, Shinzo Koyama, Mitsuyoshi Mori, Yutaka Hirose, Masayuki Sawada, Akihiro Odagawa, Tsuyoshi Tanaka. 96-98 [doi]
- 5.3 An Up-to-1400nm 500MHz Demodulated Time-of-Flight Image Sensor on a Ge-on-Si PlatformC. L. Chen, S.-W. Chu, B.-J. Chen, Y.-F. Lyu, K.-C. Hsu, C.-F. Liang, S.-S. Su, M. J. Yang, C. Y. Chen, S. L. Cheng, H.-D. Liu, C.-T. Lin, K. P. Petrov, H. W. Chen, K. C. Chu, P. C. Wu, P.-T. Huang, N. Na, S. L. Chen. 98-100 [doi]
- 5.4 A Dynamic Pseudo 4-Tap CMOS Time-of-Flight Image Sensor with Motion Artifact Suppression and Background Light Cancelling Over 120kluxDonguk Kim, Seunghyun Lee, Dahwan Park, Canxing Piao, JiHoon Park, Yeonsoo Ahn, Kihwan Cho, Jungsoon Shin, Seung-Min Song, Seong-Jin Kim, Jung-Hoon Chun, Jaehyuk Choi. 100-102 [doi]
- - Temporal Noise and -105dB Parasitic Light Sensitivity Backside-Illuminated 2.3µm-Pixel Voltage-Domain Global Shutter CMOS Image Sensor Using High-Capacity DRAM Capacitor TechnologyJaekyu Lee, Seung-Sik Kim, In-Gyu Baek, Heesung Shim, Taehoon Kim, Taehyoung Kim, Jungchan Kyoung, Dongmo Im, Jinyong Choi, KeunYeong Cho, Daehoon Kim, Haemin Lim, Min-Woong Seo, Juyoung Kim, Doowon Kwon, Jiyoun Song, Jiyoon Kim, Minho Jang, Joosung Moon, Hyunchul Kim, Chong Kwang Chang, Jingyun Kim, Kyoungmin Koh, Hanjin Lim, JungChak Ahn, Hyeongsun Hong, Kyupil Lee, Ho-Kyu Kang. 102-104 [doi]
- 5.6 A 1/2.65in 44Mpixel CMOS Image Sensor with 0.7µm Pixels Fabricated in Advanced Full-Depth Deep-Trench Isolation TechnologyHyunchul Kim, JongEun Park, Insung Joe, Doowon Kwon, Joo Hyoung Kim, Dongsuk Cho, Taehun Lee, ChangKyu Lee, Haeyong Park, Soojin Hong, Chongkwang Chang, Jingyun Kim, Hanjin Lim, Youngsun Oh, Yitae Kim, Seungjoo Nah, Sangil Jung, Jaekyu Lee, JungChak Ahn, Hyeongsun Hong, Kyupil Lee, Ho-Kyu Kang. 104-106 [doi]
- 5.7 A 132dB Single-Exposure-Dynamic-Range CMOS Image Sensor with High Temperature ToleranceYorito Sakano, Takahiro Toyoshima, Ryosuke Nakamura, Tomohiko Asatsuma, Yuki Hattori, Takayuki Yamanaka, Ryoichi Yoshikawa, Naoki Kawazu, Tomohiro Matsuura, Takahiro Iinuma, Takahiro Toya, Tomohiko Watanabe, Atsushi Suzuki, Yuichi Motohashi, Junichiro Azami, Yasushi Tateshita, Tsutomu Haruta. 106-108 [doi]
- -rmsNoise 1.45µm-Pitch CMOS Image Sensor with Reference-Shared In-Pixel Differential Amplifier at 8.3Mpixel 35fpsMamoru Sato, Yuhi Yorikado, Yusuke Matsumura, Hideki Naganuma, Eriko Kato, Takuya Toyofuku, Akihiko Kato, Yusuke Oike. 108-110 [doi]
- 5.9 A 0.8V Multimode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM PixelTzu-Hsiang Hsu, Yen-Kai Chen, Jun-Shen Wu, Wen-Chien Ting, Cheng-Te Wang, Chen-Fu Yeh, Syuan-Hao Sie, Yi Ren Chen, Ren-Shuo Liu, Chung-Chuan Lo, Kea-Tiong Tang, Meng-Fan Chang, Chih-Cheng Hsieh. 110-112 [doi]
- 5.10 A 1280×720 Back-Illuminated Stacked Temporal Contrast Event-Based Vision Sensor with 4.86µm Pixels, 1.066GEPS Readout, Programmable Event-Rate Controller and Compressive Data-Formatting PipelineThomas Finateu, Atsumi Niwa, Daniel Matolin, Koya Tsuchimoto, Andrea Mascheroni, Etienne Reynaud, Pooria Mostafalu, Frederick T. Brady, Ludovic Chotard, Florian LeGoff, Hirotsugu Takahashi, Hayato Wakabayashi, Yusuke Oike, Christoph Posch. 112-114 [doi]
- 6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFETJay Im, Kevin Zheng, Adam Chou, Lei Zhou, Jae Wook Kim, Stanley Chen, Yipeng Wang, Hao-Wei Hung, Kee Hian Tan, Winson Lin, Arianne Roldan, Declan Carey, Ilias Chlis, Ronan Casey, Ade Bekele, Ying Cao, David Mahashin, Hong Ahn, Hongtao Zhang, Yohan Frans, Ken Chang. 116-118 [doi]
- 6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET TechnologyTamer Ali, E.-Hung Chen, Henry Park, Ramy Yousry, Yu-Ming Ying, Mohammed Abdullatif, Miguel Gandara, Chun-Cheng Liu, Po-Shuan Weng, Huan-Sheng Chen, Mohammad Elbadry, Qaiser Nehal, Kun-Hung Tsai, Kevin Tan, Yi-Chieh Huang, Chung-Hsien Tsai, Yuyun Chang, Yuan-Hao Tung. 118-120 [doi]
- 6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFETEric Groen, Charlie Boecker, Masum Hossain, Roxanne Vu, Socrates D. Vamvakos, Haidang Lin, Simon Li, Marcus van Ierssel, Prashant Choudhary, Nanyan Wang, Masumi Shibata, Mohammad Hossein Taghavi, Nhat Nguyen, Shaishav Desai. 120-122 [doi]
- 6.4 A 56Gb/s 7.7mW/Gb/s PAM-4 Wireline Transceiver in 10nm FinFET Using MM-CDR-Based ADC Timing Skew Control and Low-Power DSP with Approximate MultiplierByoung-Joo Yoo, Dong-Hyuk Lim, Hyonguk Pang, June-Hee Lee, Seung-Yeob Baek 0002, Naxin Kim, Dong-Ho Choi, Young-Ho Choi, Hyeyeon Yang, Taehun Yoon, Sang-Hyeok Chu, Kangjik Kim, WooChul Jung, Bong Kyu Kim, Jaechol Lee, Gunil Kang, Sang-Hune Park, Michael Choi, Jongshin Shin. 122-124 [doi]
- 6.5 A 6.4-to-32Gb/s 0.96pJ/b Referenceless CDR Employing ML-Inspired Stochastic Phase-Frequency Detection Technique in 40nm CMOSKwanseo Park, Minkyo Shim, Han-Gon Ko, Deog Kyoon Jeong. 124-126 [doi]
- 6.6 Reference-Noise Compensation Scheme for Single-Ended Package-to-Package LinksXi Chen 0033, Nikola Nedovic, Stephen G. Tell, Sudhir S. Kudva, Brian Zimmer, Thomas H. Greer, John W. Poulton, Sanquan Song, Walker J. Turner, John M. Wilson 0002, C. Thomas Gray. 126-128 [doi]
- 6.7 An 8Gb/s/µm FFE-Combined Crosstalk-Cancellation Scheme for HBM on Silicon Interposer with 3D-Staggered ChannelsHan-Gon Ko, Soyeong Shin, Jonghyun Oh, Kwanseo Park, Deog Kyoon Jeong. 128-130 [doi]
- 6.8 A 100Gb/s NRZ Transmitter with 8-Tap FFE Using a 7b DAC in 40nm CMOSPen-Jui Peng, Sheng-Tsung Lai, Wei-Hung Wang, Chiang-Wei Lin, Wei-Chien Huang, Ted Shih. 130-132 [doi]
- 7.1 A 3.4-to-13.3TOPS/W 3.6TOPS Dual-Core Deep-Learning Accelerator for Versatile AI Applications in 7nm 5G Smartphone SoCChien-Hung Lin, Chih-Chung Cheng, Yi-Min Tsai, Sheng-Je Hung, Yu-Ting Kuo, Perry H. Wang, Pei-Kuei Tsung, Jeng-Yun Hsu, Wei-Chih Lai, Chia-Hung Liu, Shao-Yu Wang, Chin-Hua Kuo, Chih-Yu Chang, Ming-Hsien Lee, Tsung-Yao Lin, Chih-Cheng Chen. 134-136 [doi]
- 7.2 A 12nm Programmable Convolution-Efficient Neural-Processing-Unit Chip Achieving 825TOPSYang Jiao, Liang Han, Rong Jin, Yi-Jung Su, Chiente Ho, Li Yin, Yun Li, Long Chen, Zhen Chen, Lu Liu, Zhuyu He, Yu Yan, Jun He, Jun Mao, Xiaotao Zai, Xuejun Wu, Yongquan Zhou, Mingqiu Gu, Guocai Zhu, Rong Zhong, Wenyuan Lee, Ping Chen, Yiping Chen, Weiliang Li, Deyu Xiao, Qing Yan, Mingyuan Zhuang, Jiejun Chen, Yun Tian, Yingzi Lin, Wei Wu, Hao Li, Zesheng Dou. 136-140 [doi]
- 7.3 STATICA: A 512-Spin 0.25M-Weight Full-Digital Annealing Processor with a Near-Memory All-Spin-Updates-at-Once Architecture for Combinatorial Optimization with Complete Spin-Spin InteractionsKasho Yamamoto, Kota Ando, Normann Mertig, Takashi Takemoto, Masanao Yamaoka, Hiroshi Teramoto, Akira Sakai, Shinya Takamaeda-Yamazaki, Masato Motomura. 138-140 [doi]
- 7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity ExploitationSanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Hoi-Jun Yoo. 140-142 [doi]
- 2, 1mm Package-on-PackageWilfred Gomes, Sanjeev Khushu, Doug B. Ingerly, Patrick N. Stover, Nasirul I. Chowdhury, Frank O'Mahony, Ajay Balankutty, Noam Dolev, Martin G. Dixon, Lei Jiang, Surya Prekke, Biswajit Patra, Pavel V. Rott, Rajesh Kumar. 144-146 [doi]
- 8.2 A Versatile 7nm Adaptive Compute Acceleration Platform ProcessorPrasun K. Raha, Tomai Knopp, Sagheer Ahmad, Ahmad Ansari, Fu-Hing Ho, Thomas To, Vamsi Nalluri, Mrinal Sarmah, Rajeev Patwari. 146-148 [doi]
- 8.3 A 3GHz ARM Neoverse N1 CPU in 7nm FinFET for Infrastructure ApplicationsRobert Christy, Stuart Riches, Sujil Kottekkat, Prasanth Gopinath, Ketan Sawant, Anitha Kona, Rob Harrison. 148-150 [doi]
- 8.4 Radeon RX 5700 Series: The AMD 7nm Energy-Efficient High-Performance GPUsSal Dasgupta, Teja Singh, Ashish Jain, Samuel Naffziger, Deepesh John, Chetan Bisht, Pradeep Jayaraman. 150-152 [doi]
- 9.1 A Current-Sensing Front-End Realized by A Continuous-Time Incremental ADC with 12b SAR Quantizer and Reset-Then-Open Resistive DAC Achieving 140dB DR and 8ppm INL at 4kS/sSu-Hao Wu, Yun-Shiang Shu, Albert Yen-Chih Chiou, Wei-Hsiang Huang, Zhi-Xin Chen, Hung-Yi Hsieh. 154-156 [doi]
- nd-Order Mismatch Error ShapingJiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Nan Sun. 158-160 [doi]
- th-Order Cascaded-Noise-Shaping SAR ADC with 88dB SNDR Over 100kHz BandwidthLu Jie, Boyi Zheng, Hsiang-Wen Chen, Runyu Wang, Michael P. Flynn. 160-162 [doi]
- 9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic AmplifierXiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun. 162-164 [doi]
- 9.6 A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial-Interleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset CalibrationYan Song, Yan Zhu 0001, Chi-Hang Chan, Rui Paulo Martins. 164-166 [doi]
- 9.7 Background Multi-Rate LMS Calibration Circuit for 15MHz-BW 74dB-DR CT 2-2 MASH ΔΣ ADC in 28nm CMOSMitsuya Fukazawa, Takashi Oshima, Masaki Fujiwara, Katsuki Tateyama, Alsubaie Raed, Masao Ito, Tetsuya Matsumoto, Tetsuo Matsui. 166-168 [doi]
- 9.8 A Low-Cost 4-Channel Reconfigurable Audio Interface for Car Entertainment SystemsRobert van Veldhoven, Marco Lammers, Leon van der Dussen, Khalid Mabtoul. 168-170 [doi]
- 10.1 A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB NoiseGengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui P. Martins. 172-174 [doi]
- 10.2 A SAW-Less Direct-Digital RF Modulator with Tri-Level Time-Approximation Filter and Reconfigurable Dual-Band Delta-Sigma ModulationShiyu Su, Mike Shuo-Wei Chen. 174-176 [doi]
- 10.3 A 12nm CMOS RF Transceiver Supporting 4G/5G UL MIMOMing-Da Tsai, Song-Yu Yang, Chi-Yao Yu, Ping-Yu Chen, Tzung-Han Wu, Mohammed Hassan, Chi-Tsan Chen, Chao-Wei Wang, Yen-Chuan Huang, Li-Han Hung, Wei-Hao Chiu, Anson Lin, Bo-Yu Lin, Arnaud Werquin, Chien-Cheng Lin, Yen-horng Chen, Jen-Che Tsai, Yuan-Yu Fu, Bernard Tenbroek, Chinq-Shiun Chiu, Yi-Bin Lee, Guang-Kaai Dehng. 176-178 [doi]
- 10.4 A 4×4 Dual-Band Dual-Concurrent WiFi 802.11ax Transceiver with Integrated LNA, PA and T/R Switch Achieving +20dBm 1024-QAM MCS11 Pout and -43dB EVM Floor in 55nm CMOSEric Lu, Wen-Kai Li, Zhiming Deng, Edris Rostami, Pi-An Wu, Keng-Meng Chang, Yu-Chen Chuang, Chang-Ming Lai, Yang Chuan Chen, Tzu-Hsuin Peng, Tzung-Chuen Tsai, Hui-Hsien Liu, Chien-Chih Chiu, Bryan Huang, Yao-Chi Wang, Jing-Hong Conan Zhan, Osama Shana'a. 178-180 [doi]
- 10.5 A Fully Integrated 27dBm Dual-Band All-Digital Polar Transmitter Supporting 160MHz for WiFi 6 ApplicationsAssaf Ben Bassat, Shahar Gross, Anna Nazimov, Ashoke Ravi, Bassam Khamaisi, Elan Banin, Eli Borokhovich, Nahum Kimiagarov, Phillip Skliar, Rotem Banin, Sarit Zur, Sebastian Reinhold, Smadar Bruker, Tzvi Maimon, Uri Parker, Ofir Degani. 180-182 [doi]
- 10.6 A 4G/5G Cellular Transmitter in 12nm FinFET with Harmonic RejectionMing-Da Tsai, Chien-Wei Tseng, Kuen-Jou Tsai, Shuja Andrabi, Pin-Cheng Huang, Federico Beffa, Yangjian Chen, Bernard Tenbroek. 182-184 [doi]
- 2 DPD-Less Quadrature Digital Transmitter With 30dB Pout Range in 65nm CMOSSi-Wook Yoo, Shih-Chang Hung, Jeffrey S. Walling, David J. Allstot, Sang-Min Yoo. 184-186 [doi]
- 10.8 A 4-Element 500MHz-Modulated-BW 40mW 6b 1GS/s Analog-Time-to-Digital-Converter-Enabled Spatial Signal Processor in 65nm CMOSErfan Ghaderi, Chase Puglisi, Shrestha Bansal, Subhanshu Gupta. 186-188 [doi]
- 11.1 A Direct 12V/24V-to-1V 3W 91.2%-Efficiency Tri-State DSD Power Converter with Online VCF Rebalancing and In-Situ Precharge Rate RegulationKang Wei, Yogesh Ramadass, Dongsheng Brian Ma. 190-192 [doi]
- 11.2 A Fully Integrated Resonant Switched-Capacitor Converter with 85.5% Efficiency at 0.47W Using On-Chip Dual-Phase Merged-LC ResonatorPrescott H. McLaughlin, Ziyu Xia, Jason T. Stauth. 192-194 [doi]
- 11.3 A One-Step 325V to 3.3-to-10V 0.5W Resonant DC-DC Converter with Fully Integrated Power Stage and 80.7% EfficiencyChristoph Rindfleisch, Bernhard Wicht. 194-196 [doi]
- 11.4 A 48-to-80V Input 2MHz Adaptive ZVT-Assisted GaN-Based Bus Converter Achieving 14% Light-Load Efficiency ImprovementQi Cheng, Lin Cong, Hoi Lee. 196-198 [doi]
- 11.5 A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5Mo Huang, Yan Lu, Rui P. Martins. 198-200 [doi]
- 2 Simultaneous Energy-Transferring Single-Inductor Bipolar-Output Converter with a Flying Capacitor for Highly Efficient AMOLED Display in 0.5µm CMOSSung-Wan Hong. 200-202 [doi]
- 11.7 A Voltage-Tolerant Three-Level Buck-Boost DC-DC Converter with Continuous Transfer Current and Flying Capacitor Soft Charger Achieving 96.8% Power Efficiency and 0.87µs/V DVS RateJongbeom Baek, Takahiro Nomiyama, Seungchan Park, Young-Ho Jung, Dongsu Kim, Jae-Yeol Han, Jun-Suk Bang, Yumi Lee, Ik-Hwan Kim, Ji-Seon Paek, Jongwoo Lee, Thomas Byunghak Cho. 202-204 [doi]
- 11.8 A 96.8%-Efficiency Continuous Input/Output-Current Step-Up/Down Converter Powering Disposable IoTs with Reconfigurable Multi-Cell-Balanced Alkaline BatteriesMin-Woo Ko, Gyeong-Gu Kang, Ki-Duk Kim, Ji-Hun Lee, Seok-Tae Koh, Tae-Hwang Kong, Sang-Ho Kim, Sungyong Lee, Michael Choi, Jongshin Shin, Gyu-Hyeong Cho, Hyunsik Kim. 204-206 [doi]
- 12.1 A 3D-Integrated Microring-Based 112Gb/s PAM-4 Silicon-Photonic Transmitter with Integrated Nonlinear Equalization and Thermal ControlHao Li, Ganesh Balamurugan, Meer Sakib, Ranjeet Kumar, Hasitha Jayatilleka, Haisheng Rong, James E. Jaussi, Bryan Casper. 208-210 [doi]
- 12.2 A 4-Channel 200Gb/s PAM-4 BiCMOS Transceiver with Silicon Photonics Front-Ends for Gigabit Ethernet ApplicationsEnrico Sentieri, Tino Copani, Andrea Paganini, Matteo Traldi, Angelo Palladino, Antonio Santipo, Lorenzo Gerosa, Matteo Repossi, Gianluca Catrini, Marta Campo, Francesco Radice, Andrea Diodato, Roberto Pelleriti, Daniele Baldi, Laura Tarantini, Luca Maggi, Gianluca Radaelli, Stefano Cervini, Francesco Clerici, Angelo Moroni. 210-212 [doi]
- 12.3 A 48GHz BW 225mW/ch Linear Driver IC with Stacked Current-Reuse Architecture in 65nm CMOS for Beyond-400Gb/s Coherent Optical TransmittersTeruo Jyo, Munehiko Nagatani, Josuke Ozaki, Mitsuteru Ishikawa, Hideyuki Nosaka. 212-214 [doi]
- 12.4 A 700mW 4-to-1 SiGe BiCMOS 100GS/s Analog Time-InterleaverHannes Ramon, Michiel Verplaetse, Michael Vanhoecke, Haolin Li, Johan Bauwelinck, Peter Ossieur, Xin Yin, Guy Torfs. 214-216 [doi]
- 13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO RateDoo-Hyun Kim, Hyunggon Kim, Sung-Won Yun, Youngsun Song, Jisu Kim, Sung-Min Joe, Kyung-hwa Kang, Joonsuc Jang, Hyun-Jun Yoon, Kangbin Lee, Minseok Kim, Joonsoo Kwon, Jonghoo Jo, Sehwan Park, Jiyoon Park, Jisoo Cho, Sohyun Park, Garam Kim, Jinbae Bang, Heejin Kim, JongEun Park, Deokwoo Lee, Seonyong Lee, Hwajun Jang, Hanjun Lee, DongHyun Shin, Jungmin Park, Jungkwan Kim, Jongmin Kim, Kichang Jang, II Han Park, Seuna Hyun Moon, Myung-Hoon Choi, Pansuk Kwak, Joo-Yong Park, Youngdon Choi, Sanglok Kim, Seungjae Lee, Dongku Kang, Jeong-Don Lim, Dae-Seok Byeon, Ki-Whan Song, Jung Hwan Choi, Sangjoon Hwang, Jaeheon Jeong. 218-220 [doi]
- 13.2 A 1Tb 4b/Cell 96-Stacked-WL 3D NAND Flash Memory with 30MB/s Program Throughput Using Peripheral Circuit Under Memory Cell Array TechniqueHwang Huh, Wanik Cho, Jinhaeng Lee, Yujong Noh, Yongsoon Park, Sunghwa Ok, Jongwoo Kim, Kayoung Cho, Hyunchul Lee, Geonu Kim, Kangwoo Park, Kwanho Kim, Heejoo Lee, Sooyeol Chai, Chankeun Kwon, Hanna Cho, Chanhui Jeong, Yujin Yang, Jayoon Goo, Jangwon Park, Juhyeong Lee, Heonki Kirr, Kangwook Jo, Cheoljoong Park, Hyeonsu Nam, HyunSeok Song, Sangkyu Lee, Woopyo Jeong, Kun-Ok Ahn, Tae-Sung Jung. 220-221 [doi]
- 13.3 A 22nm 32Mb Embedded STT-MRAM with 10ns Read Speed, 1M Cycle Write Endurance, 10 Years Retention at 150°C and High Immunity to Magnetic Field InterferenceYu-Der Chih, Yi-Chun Shih, Chia-Fu Lee, Yen-An Chang, Po-Hao Lee, Hon-Jarn Lin, Yu-Lin Chen, Chieh-Pu Lo, Meng-Chun Shih, Kuei-Hung Shen, Harry Chuang, Tsung-Yung Jonathan Chang. 222-224 [doi]
- 13.4 A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read Bandwidth for Security-Aware Mobile DevicesTung-Cheng Chang, Yen-Cheng Chiu, Chun-Ying Lee, Je-Min Hung, Kuang-Tang Chang, Cheng-Xin Xue, Ssu-Yen Wu, Hui-Yao Kao, Peng Chen, Hsiao-Yu Huang, Shih-Hsih Teng, Meng-Fan Chang. 224-226 [doi]
- 13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µsToshiyuki Kouchi, Noriyasu Kumazaki, Masashi Yamaoka, Sanad Bushnaq, Takuyo Kodama, Yuki Ishizaki, Yoko Deguchi, Akio Sugahara, Akihiro Imamoto, Norichika Asaoka, Ryosuke Isomura, Takaya Handa, Junichi Sato, Hiromitsu Komai, Atsushi Okuyama, Naoaki Kanagawa, Yasufumi Kajiyama, Yuri Terada, Hidekazu Ohnishi, Hiroki Yabe, Cynthia Hsu, Mami Kakoi, Masahiro Yoshihara. 226-228 [doi]
- 14.1 A 510nW 0.41V Low-Memory Low-Computation Keyword-Spotting Chip Using Serial FFT-Based MFCC and Binarized Depthwise Separable Convolutional Neural Network in 28nm CMOSWeiwei Shan, Minhao Yang, Jiaming Xu, Yicheng Lu, Shuai Zhang, Tao Wang, Jun Yang, Longxing Shi, Mingoo Seok. 230-232 [doi]
- 14.2 A 65nm 24.7µJ/Frame 12.3mW Activation-Similarity-Aware Convolutional Neural Network Video Processor Using Hybrid Precision, Inter-Frame Data Reuse and Mixed-Bit-Width Difference-Frame Data CodecZhe Yuan, Yixiong Yang, Jinshan Yue, Ruoyang Liu, Xiaoyu Feng, Zhiting Lin, Xiulong Wu, Xueqing Li, Huazhong Yang, Yongpan Liu. 232-234 [doi]
- 14.3 A 65nm Computing-in-Memory-Based CNN Processor with 2.9-to-35.8TOPS/W System Energy Efficiency Using Dynamic-Sparsity Performance-Scaling Architecture and Energy-Efficient Inter/Intra-Macro Data ReuseJinshan Yue, Zhe Yuan, Xiaoyu Feng, Yifan He, Zhixiao Zhang, Xin Si, Ruhui Liu, Meng-Fan Chang, Xueqing Li, Huazhong Yang, Yongpan Liu. 234-236 [doi]
- 15.1 A 5nm 135Mb SRAM in EUV and High-Mobility-Channel FinFET Technology with Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN ApplicationsJonathan Chang, Yen-Huei Chen, Gary Chan, Hank Cheng, Po-Sheng Wang, Yangsyu Lin, Hidehiro Fujiwara, Robin Lee, Hung-Jen Liao, Ping-Wei Wang, Geoffrey Yeap, Quincy Li. 238-240 [doi]
- 15.2 A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Compute-in-Memory Macro for AI Edge ChipsJian-Wei Su, Xin Si, Yen-Chi Chou, Ting-Wei Chang, Wei-Hsing Huang, Yung-Ning Tu, Ruhui Liu, Pei-Jung Lu, Ta-Wei Liu, Jing-Hong Wang, Zhixiao Zhang, Hongwu Jiang, Shanshi Huang, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Shyh-Shyuan Sheu, Sih-Han Li, Heng-Yuan Lee, Shih-Chieh Chang, Shimeng Yu, Meng-Fan Chang. 240-242 [doi]
- 15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning ApplicationsQing Dong 0001, Mahmut E. Sinangil, Burak Erbagci, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang. 242-244 [doi]
- 15.4 A 22nm 2Mb ReRAM Compute-in-Memory Macro with 121-28TOPS/W for Multibit MAC Computing for Tiny AI Edge DevicesCheng-Xin Xue, Tsung-Yuan Huang, Je-Syu Liu, Ting-Wei Chang, Hui-Yao Kao, Jing-Hong Wang, Ta-Wei Liu, Shih-Ying Wei, Sheng-Po Huang, Wei-Chen Wei, Yi Ren Chen, Tzu-Hsiang Hsu, Yen-Kai Chen, Yun-Chen Lo, Tai-Hsing Wen, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Meng-Fan Chang. 244-246 [doi]
- 15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge ChipsXin Si, Yung-Ning Tu, Wei-Hsing Huang, Jian-Wei Su, Pei-Jung Lu, Jing-Hong Wang, Ta-Wei Liu, Ssu-Yen Wu, Ruhui Liu, Yen-Chi Chou, Zhixiao Zhang, Syuan-Hao Sie, Wei-Chen Wei, Yun-Chen Lo, Tai-Hsing Wen, Tzu-Hsiang Hsu, Yen-Kai Chen, William Shih, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Nan-Chun Lien, Wei-Chiang Shih, Yajuan He, Qiang Li, Meng-Fan Chang. 246-248 [doi]
- 16.1 A 12b 18GS/s RF Sampling ADC with an Integrated Wideband Track-and-Hold Amplifier and Background CalibrationAhmed M. A. Ali, Hüseyin Dinc, Paritosh Bhoraskar, Scott Bardsley, Christopher Dillon, Mohit Kumar, Matthew McShea, Ryan Bunch, Joel Prabhakar, Scott Puckett. 250-252 [doi]
- 16.2 A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz InputMinglei Zhang, Yan Zhu 0001, Chi-Hang Chan, Rui P. Martins. 252-254 [doi]
- 16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue GenerationZihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu 0001, Chi-Hang Chan, Jan Craninckx, Rui P. Martins. 254-256 [doi]
- 16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement SchemeTsung-Chih Hung, Jia-Ching Wang, Tai-Haur Kuo. 256-258 [doi]
- 29.9 A 4×4 Distributed Multi-Layer Oscillator Network for Harmonic Injection and THz Beamforming with 14dBm EIRP at 416GHz in a Lensless 65nm CMOS ICHooman Saeidi, Suresh Venkatesh, ChandraKanth Reddy Chappidi, Tushar Sharma, Chengjie Zhu, Kaushik Sengupta. 256-258 [doi]
- 2 40MS/s SAR ADC with kT/C Noise CancellationJiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun. 258-260 [doi]
- 16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction FilterHajime Shibata, Gerry Taylor, Bob Schell, Victor Kozlov, Sharvil Patil, Donald Paterson, Asha Ganesan, Yunzhi Dong, Wenhua Yang, Yue Yin, Zhao Li, Prawal Shrestha, Athreya Gopal, Aathreya Bhat, Shanthi Pavan. 260-262 [doi]
- 16.7 A 40MHz-BW 76.2dB/78.0dB SNDR/DR Noise-Shaping Nonuniform Sampling ADC with Single Phase-Domain Level Crossing and Embedded Nonuniform Digital Signal Processor in 28nm CMOSTzu-Fan Wu, Mike Shuo-Wei Chen. 262-264 [doi]
- 17.1 A -240dB-FoMjitter and -115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise ReductionYongsun Lee, Taeho Seong, Jeonghyun Lee, Chanwoong Hwanq, Hangi Park, Jaehyouk Choi. 266-268 [doi]
- 17.2 A 66fsrmsJitter 12.8-to-15.2GHz Fractional-N Bang-Bang PLL with Digital Frequency-Error Recovery for Fast LockingAlessio Santiccioli, Mario Mercandelli, Luca Bertulessi, Angelo Parisi, Dmytro Cherniak, Andrea Leonardo Lacaita, Carlo Samori, Salvatore Levantino. 268-270 [doi]
- 17.3 A -58dBc-Worst-Fractional-Spur and -234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control WordTaeho Seong, Yongsun Lee, Chanwoong Hwang, Jeonghyun Lee, Hangi Park, Kyuho Jason Lee, Jaehyouk Choi. 270-272 [doi]
- 17.4 A 18.6-to-40.1GHz 201.7dBc/Hz FoMT Multi-Core Oscillator Using E-M Mixed-Coupling Resonance BoostingYiyang Shu, Huizhen Jenny Qian, Xun Luo. 272-274 [doi]
- 17.5 A 12.5GHz Fractional-N Type-I Sampling PLL Achieving 58fs Integrated JitterMario Mercandelli, Alessio Santiccioli, Angelo Parisi, Luca Bertulessi, Dmytro Cherniak, Andrea Leonardo Lacaita, Carlo Samori, Salvatore Levantino. 274-276 [doi]
- 25.5 A Self-Calibrated 1.2-to-3.8GHz 0.0052mm2 Synthesized Fractional-N MDLL Using a 2b Time-Period Comparator in 22nm FinFET CMOSSomnath Kundu, Likai Chai, Kailash Chandrashekar, Stefano Pellerano, Brent R. Carlton. 276-278 [doi]
- 17.6 A 21.7-to-26.5GHz Charge-Sharing Locking Quadrature PLL with Implicit Digital Frequency-Tracking Loop Achieving 75fs Jitter and -250dB FoMYizhe Hu, Xi Chen, Teerachot Siriburanon, Jianglin Du, Zhong Gao, Vivek Govindaraj, AnDing Zhu, Robert Bogdan Staszewski. 276-278 [doi]
- 17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp BandwidthPratap Tumkur Renukaswamy, Nereo Markulic, Sehoon Park, Anirudh Kankuppe, Qixian Shi, Piet Wambacq, Jan Craninckx. 278-280 [doi]
- 17.8 A 170MHz-Lock-In-Range and -253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge GeneratorYounghyun Lim, Juyeop Kim, Yongwoo Jo, Jooeun Bang, Seyeon Yoo, Hangi Park, Heein Yoon, Jaehyouk Choi. 280-282 [doi]
- rd-Harmonic-Rich Current-Output VCO, a Harmonic-Current Filter and a 60GHz TIAChao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, Rui P. Martins. 282-284 [doi]
- 18.1 A Self-Health-Learning GaN Power Converter Using On-Die Logarithm-Based Analog SGD Supervised Learning and Online Tj-Independent Precursor MeasurementYuanqing Huang, Yingping Chen, Dongsheng Brian Ma. 286-288 [doi]
- 18.2 A Monolithic E-Mode GaN 15W 400V Offline Self-Supplied Hysteretic Buck Converter with 95.6% EfficiencyMaik Kaufmann, Michael Lueders, Cetin Kaya, Bernhard Wicht. 288-290 [doi]
- 18.3 A 120mA Non-Isolated Capacitor-Drop AC/DC Power SupplyYogesh Ramadass, Andrés Blanco, Boqiang Xiao, John Cummings. 290-292 [doi]
- 18.4 An 11MHz Fully Integrated 5kV Isolated DC-DC Converter Without Cross-Isolation-Barrier FeedbackLisong Li, Xiangming Fang, Rongxiang Wu. 292-294 [doi]
- 18.5 ZVS Flyback-Converter ICs Optimizing USB Power Delivery for Fast-Charging Mobile Devices to Achieve 93.5% EfficiencyWei-Hsu Chang, Kun-Yu Lin, Chun Ching Lee, Li-Di Lo, Jenn-Yu Lin, Ta-Yung Yang. 294-296 [doi]
- 18.6 A 92.8%-Peak-Efficiency 60A 48V-to-1V 3-Level Half-Bridge DC-DC Converter with Balanced Voltage on a Flying CapacitorMinho Choi, Deog Kyoon Jeong. 296-298 [doi]
- 18.7 A DC to 35MHz Fully Integrated Single-Power-Supply Isolation Amplifier for Current- and Voltage-Sensing Front-Ends of Power ElectronicsSatoshi Takaya, Hiroaki Ishihara, Kohei Onizuka. 298-300 [doi]
- 18.8 A Fully-Generic-Process Galvanic Isolator for Gate Driver with 123mW 23% Power Transfer and Full-Triplex 21/14/0.5Mb/s Bidirectional Communication Utilizing Reference-Free Dual-Modulation FSKHiroaki Ishihara, Kohei Onizuka. 300-302 [doi]
- 19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum ComputersBishnu Patra, Jeroen P. G. van Dijk, Sushil Subramanian, Andrea Corna, Xiao Xue, Charles Jeon, Farhana Sheikh, Esdras Juarez Hernandez, Brando Perez Esparza, Huzaifa Rampurawala, Brent R. Carlton, Nodar Samkharadze, Surej Ravikumar, Carlos Nieva, Sungwon Kim, Hyung-Jin Lee, Amir Sammak, Giordano Scappucci, Menno Veldhorst, Lieven M. K. Vandersypen, Masoud Babaie, Fabio Sebastiano, Edoardo Charbon, Stefano Pellerano. 304-306 [doi]
- 19.2 A 110mK 295µW 28nm FDSOI CMOS Quantum Integrated Circuit with a 2.8GHz Excitation and nA Current Sensing of an On-Chip Double Quantum DotLoïck Le Guevel, Gérard Billiot, Xavier Jehl, Silvano De Franceschi, Marcos Zurita, Yvain Thonnart, Maud Vinet, Marc Sanquer, Romain Maurand, Aloysius G. M. Jansen, Gaël Pillonnet. 306-308 [doi]
- 19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing ApplicationsJiang Gong, Yue Chen, Fabio Sebastiano, Edoardo Charbon, Masoud Babaie. 308-310 [doi]
- 20.1 A 28µW IoT Tag That Can Communicate with Commodity WiFi Transceivers via a Single-Side-Band QPSK Backscatter Communication TechniquePo-Han Peter Wang, Chi Zhang, Hongsen Yang, Dinesh Bharadia, Patrick P. Mercier. 312-314 [doi]
- 20.2 A 57nW Software-Defined Always-On Wake-Up Chip for IoT Devices with Asynchronous Pipelined Event-Driven Architecture and Time-Shielding Level-Crossing ADCZhixuan Wang, Le Ye, Hao Zhanq, Jiayoon Ru, Haitao Fan, Yangyuan Wang, Ru Huang. 314-316 [doi]
- 3-MEMS CMOS Integrated E-Nose with Embedded 4×Gas Sensors, a Temperature Sensor and a Relative Humidity SensorSi Hoon Lee, Kwangmin Park, Jaeheung Lim, Minchul Lee, Jeongho Park, Hyun Kim, Young Ok Lee, Hyun Su Ahn, Eunseok Shin, Hyungjong Ko, Seoung-Jae Yoo, Hyunsurk Ryu, Yongin Park, Joonseok Kim, Long Yan. 316-318 [doi]
- 20.4 3D Surgical Alignment with 100µm Resolution Using Magnetic-Field Gradient-Based LocalizationSaransh Sharma, Grace Ding, Aditya Telikicherla, Fatemeh Aghlmand, Arian Hashemi Talkhooncheh, Minwo Wang, Mikhail G. Shapiro, Azita Emami. 318-320 [doi]
- 21.1 A Fully Integrated Genetic Variant Discovery SoC for Next-Generation SequencingYi-Chung Wu, Yen-Lung Chen, Chung-Hsuan Yang, Chao-Hsi Lee, Chao-Yang Yu, Nian-Shyang Chang, Ling-Chien Chen, Jia Rong Chang, Chun-Pin Lin, Hung-Lieh Chen, Chi-Shi Chen, Jui-Hung Hung, Chia-Hsiang Yang. 322-324 [doi]
- 21.2 A 1.5μJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro RobotsChieh Chung, Chia-Hsiang Yang. 324-326 [doi]
- 2 0.98nJ/Pixel Image-Processing SoC with 24b High-Dynamic-Range and Multiple Sensor Format Support for Automotive ApplicationsChi-Cheng Ju, Tsu-Ming Liu, Yung-Chang Chang, Chih-Ming Wang, Chang-Hung Tsai, Ying-Jui Chen, Tung-Hsing Wu, Hue-Min Lin, Han-Liang Chou, Abrams Chen, Andy-HB Wang, W. C. Gu, Wayne Hsieh, Jing-Ying Chang, Shou-Chun Liao, Chen-Tsai Ho, Larry Chu, Sokonisa Wei, Chi-Hui Wang, Kevin Jou. 326-328 [doi]
- 22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC SchemeChi Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, SeungSeob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin Guk Kim, Hye-In Choi, Hyuk-jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee. 330-332 [doi]
- 22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBISTDong Uk Lee, Ho Sung Cho, Jihwan Kim, Young Jun Ku, Sangmuk Oh, Chul Dae Kim, Hyun Woo Kim, Wooyoung Lee, Tae-Kyun Kim, Tae Sik Yun, Min-Jeong Kim, SeungGyeon Lim, Seong-Hee Lee, Byung Kuk Yun, Jun Il Moon, Ji-Hwan Park, Seokwoo Choi, Young-Jun Park, Chang Kwon Lee, Chunseok Jeong, Jae-Seung Lee, Sang-Hun Lee, Woo Sung We, Jong-Chan Yun, Doobock Lee, Junghyun Shin, Seungchan Kim, Junghwan Lee, Jiho Choi, Yucheon Ju, Myeong-Jae Park, Kang Seol Lee, Youngdo Hur, Daeyong Shim, Sangkwon Lee, Junhyun Chun, Kyowon Jin. 334-336 [doi]
- 22.4 A 32Gb/s Digital-Intensive Single-Ended PAM-4 Transceiver for High-Speed Memory Interfaces Featuring a 2-Tap Time-Based Decision Feedback Equalizer and an In-Situ Channel-Loss MonitorPo-Wei Chiu, Chris H. Kim. 336-338 [doi]
- 22.5 An 8nm 18Gb/s/pin GDDR6 PHY with TX Bandwidth Extension and RX Training TechniqueSoo-Min Lee, Kihwan Seong, Joohee Shin, HyoungJoong Kim, Jaehyun Jeong, Shinyoung Yi, Juyoung Kim, Eunsu Kim, Sukhyun Jung, Sangyun Hwang, Jihun Oh, Kwanyeob Chae, Kyounghoi Koo, Sanghune Park, Jongshin Shin, Jaehong Park. 338-340 [doi]
- 22.6 A 0.8-to-2.3GHz Quadrature Error Corrector with Correctable Error Range of 101.6ps Using Minimum Total Delay Tracking and Asynchronous Calibration On-Off Scheme for DRAM InterfaceSoyeong Shin, Han-Gon Ko, Sungchun Jang, Dongkyun Kim, Deog Kyoon Jeong. 340-342 [doi]
- 23.1 A 4GS/s 80dB DR Current-Domain Analog Front-End for Phase-Coded Pulse-Compression Direct Time-of-Flight Automotive LiDARMahdi Kashmiri, Behnam Behroozpour, Vladimir Petkov, Ken Wojciechowski, Christoph Lang. 344-346 [doi]
- 2 Wireless Sensor with 32 Channels of Resistive and Capacitive Sensors and Edge-Encoded PWM UWB TransceiverYuxuan Luo, Yida Li, Aaron Voon-Yew Thean, Chun-Huat Heng. 346-348 [doi]
- 23.3 A 0-to-60V-Input VCM Coulomb Counter with Signal-Dependent Supply Current and ±0.5% Gain Inaccuracy from -50°C to 125°CCaspar P. L. van Vroonhoven. 348-350 [doi]
- 23.4 A 28W -108.9dB/-102.2dB THD/THD+N Hybrid ΔΣ-PWM Class-D Audio Amplifier with 91% Peak Efficiency and Reduced EMI EmissionShoubhik Karmakar, Huajun Zhang, Robert H. M. van Veldhoven, Lucien J. Breems, Marco Berkhout, Qinwen Fan, Kofi A. A. Makinwa. 350-352 [doi]
- 23.5 A 0.41mA Quiescent Current, 0.00091% THD+N Class-D Audio Amplifier with Frequency Equalization for PWM-Residual-Aliasing ReductionShih-Hsiung Chien, Tai-Haur Kuo, Hung-Yi Huang, Hong-bin Wang, Yi-Zhi Qiu. 352-354 [doi]
- 23.6 A 2pA/√Hz Transimpedance Amplifier for Miniature Ultrasound Probes with 36dB Continuous-Time Gain CompensationEunchul Kang, Mingliang Tan, Jae-Sung An, Zu-yao Chang, Philippe Vince, Nicolas Sénégond, Tony Mateo, Cyril Meynier, Michiel Pertijs. 354-356 [doi]
- 23.7 A 130dB CMRR Instrumentation Amplifier with Common-Mode ReplicationSanfeng Zhang, Chen Gao, Xiong Zhou, Qiang Li. 356-358 [doi]
- 23.8 A 41μW 16MS/s 99.2dB-SFDR Capacitively Degenerated Dynamic Amplifier with Nonlinear-Slope-Factor CompensationYunhong Kim, Sungsik Park, Seung-Woo Song, Sangwoo Lee, Moon Hyung Jang, Changuk Lee, Youngcheol Chae. 358-360 [doi]
- 24.1 A 24-to-30GHz Watt-Level Broadband Linear Doherty Power Amplifier with Multi-Primary Distributed-Active-Transformer Power-Combining Supporting 5G NR FR2 64-QAM with >19dBm Average Pout and >19% Average PAEFei Wang, Hua Wang. 362-364 [doi]
- 24.2 A Reconfigurable Series/Parallel Quadrature-Coupler-Based Doherty PA in CMOS SOI with VSWR Resilient Linearity and Back-Off PAE for 5G MIMO ArraysMannem Naga Sasikanth, Min-Yu Huang, Tzu-Yuan Huang, Sensen Li, Hua Wang. 364-366 [doi]
- 24.3 A 28GHz Current-Mode Inverse-Outphasing Transmitter Achieving 40%/31% PA Efficiency at Psat/6dB PBO and Supporting 15Gbit/s 64-QAM for 5G CommunicationSensen Li, Min-Yu Huang, Doohwan Jung, Tzu-Yuan Huang, Hua Wang. 366-368 [doi]
- 24.4 A Watt-Level Multimode Multi-Efficiency-Peak Digital Polar Power Amplifier with Linear Single-Supply Class-G TechniqueSi-Wook Yoo, Shih-Chang Hung, Sang-Min Yoo. 368-370 [doi]
- 24.5 A 15b Quadrature Digital Power Amplifier with Transformer-Based Complex-Domain Power-Efficiency EnhancementDiyang Zheng, Yun Yin, Yiting Zhu, Liang Xiong, Yicheng Li, Na Yan, Hongtao Xu. 370-372 [doi]
- 24.6 An Instantaneously Broadband Ultra-Compact Highly Linear PA with Compensated Distributed-Balun Output Network Achieving >17.8dBm P1dB and >36.6% PAEP1dB over 24 to 40GHz and Continuously Supporting 64-/256-QAM 5G NR Signals over 24 to 42GHzFei Wang, Hua Wang. 372-374 [doi]
- 24.7 A 15dBm 12.8%-PAE Compact D-Band Power Amplifier with Two-Way Power Combining in 16nm FinFET CMOSBart Philippe, Patrick Reynaert. 374-376 [doi]
- 24.8 A W-Band Power Amplifier with Distributed Common-Source GaN HEMT and 4-Way Wilkinson-Lange Combiner Achieving 6W Output Power and 18% PAE at 95GHzWeibo Wang, Fangjin Guo, Tangsheng Chen, Keping Wang. 376-378 [doi]
- 25.1 A Fully Synthesizable Distributed and Scalable All-Digital LDO in 10nm CMOSSuyoung Bang, Wootaek Lim, Charles Augustine, Andres Malavasi, Muhammad M. Khellah, James Tschanz, Vivek De. 380-382 [doi]
- 2 Current DensityJonghyun Oh, Jun-Eun Park, Young Ha Hwang, Deog Kyoon Jeong. 382-384 [doi]
- 22.2 An 8.5Gb/s/pin 12Gb-LPDDR5 SDRAM with a Hybrid-Bank Architecture using Skew-Tolerant, Low-Power and Speed-Boosting Techniques in a 2nd generation 10nm DRAM ProcessHyung-Joon Chi, Chang-Kyo Lee, Junghwan Park, Jin-Seok Heo, Jaehoon Jung, Dongkeon Lee, Dae-Hyun Kim, Dukha Park, Kihan Kim, Sang Yun Kim, Jinsol Park, Hyunyoon Cho, Sukhyun Lim, YeonKyu Choi, Youngil Lim, Daesik Moon, Geuntae Park, Jin-Hun Jang, Kyungho Lee, Isak Hwang, Cheol Kim, Younghoon Son, Gil-Young Kang, Kiwon Park, Seungjun Lee, Su-Yeon Doo, Chang-Ho Shin, Byongwook Na, Ji-Suk Kwon, Kyung-Ryun Kim, Hye-In Choi, Seouk-Kyu Choi, Soobong Chang, Wonil Bae, Hyuck-Joon Kwon, Young-Soo Sohn, Seung-Jun Bae, Kwang-Il Park, Jung-Bae Lee. 382-384 [doi]
- 25.3 A 65nm Edge-Chasing Quantizer-Based Digital LDO Featuring 4.58ps-FoM and Side-Channel-Attack ResistanceYan He, Kaiyuan Yang. 384-386 [doi]
- 25.4 A Scalable 20GHz On-Die Power-Supply Noise Analyzer with Compressed SensingPengfei Zhai, Xiong Zhou, Yan Cai, Zheng Zhu, Fan Zhang, Qiang Li. 386-388 [doi]
- 25.6 A 5.25GHz Subsampling PLL with a VCO-Phase-Noise Suppression TechniqueHsiu-Hsien Ting, Tai-Cheng Lee. 390-392 [doi]
- 25.7 Time-Borrowing Fast Mux-D Scan Flip-Flop with On-Chip Timing/Power/VMIN Characterization Circuits in 10nm CMOSAmit Agarwal 0001, Steven Hsu, Simeon Realov, Mark Anders, Gregory K. Chen, Monodeep Kar, Raghavan Kumar, Huseyin Sumbul, Phil C. Knag, Himanshu Kaul, Sanu Mathew, Mahesh Kumashikar, Ram Krishnamurthy, Vivek De. 392-394 [doi]
- 25.8 A Near- Threshold-Voltage Network-on-Chip with a Metastability Error Detection and Correction Technique for Supporting a Quad-Voltage/Frequency-Domain Ultra-Low-Power System-on-a-ChipChuxiong Lin, Weifeng He, Yanan Sun, Bingxi Pei, Zhigang Mao, Mingoo Seok. 394-396 [doi]
- 25.9 Reconfigurable Transient Current-Mode Global Interconnect Circuits in 10nm CMOS for High-Performance Processors with Wide Voltage-Frequency Operating RangeMark A. Anders, Himanshu Kaul, Seongjong Kim, Gregory K. Chen, Raghavan Kumar, Huseyin Ekin Sumbul, Phil C. Knag, Monodeep Kar, Steven K. Hsu, Amit Agarwal 0001, Vikram B. Suresh, Sanu K. Mathew, Ram K. Krishnamurthy, Vivek De. 396-398 [doi]
- 2 Multimodal Biosensing SoC for PPG, ECG, BIOZ and GSR Acquisition in Consumer Wearable DevicesYun-Shiang Shu, Zhi-Xin Chen, Yu-Hong Lin, Su-Hao Wu, Wei-Hsiang Huang, Albert Yen-Chih Chiou, Chang-Yang Huang, Hung-Yi Hsieh, Fan-Wei Liao, Teng-Feng Zou, Ping Chen. 400-402 [doi]
- 26.2 A Neuromorphic Multiplier-Less Bit-Serial Weight-Memory-Optimized 1024-Tree Brain-State Classifier and Neuromodulation SoC with an 8-Channel Noise-Shaping SAR ADC ArrayGerard O'Leary, Jianxiong Xu, Liam Long, Jose Sales Filho, Camilo Tejeiro, Maged El Ansary, Chenxi Tang, Homeira Moradi, Prajay Shah, Taufik A. Valiante, Roman Genov. 402-404 [doi]
- 26.4 A Cell-Capacitance-Insensitive CMOS Sample-and-Hold Chronoamperometric Sensor for Real-Time Measurement of Small Molecule Drugs in Whole BloodJun-Chau Chien, Hyongsok Tom Soh, Amin Arbabian. 406-408 [doi]
- 26.3 A Closed-Loop Neuromodulation Chipset with 2-Level Classification Achieving 1.5Vpp CM Interference Tolerance, 35dB Stimulation Artifact Rejection in 0.5ms and 97.8% Sensitivity Seizure DetectionYuwei Wang, Quan Sun, Hongrui Luo, Xinlei Chen, Xiaofei Wang, Hong Zhang. 406-408 [doi]
- 26.5 A 20µW Heartbeat Detection System-on-Chip Powered by Human Body Heat for Self-Sustaining Wearable HealthcareSoumya Bose, Boyu Shen, Matthew L. Johnston. 408-410 [doi]
- 26.6 A 6.5µW 10kHz-BW 80.4dB-SNDR Continuous-Time ΔΣ Modulator with Gm-Input and 300mVpp Linear Input Range for Closed-Loop Neural RecordingChanguk Lee, Taejune Jeon, MoonHyung Jane, Sanggeon Park, Yeowool Huh, Youngcheol Chae. 410-412 [doi]
- 26.7 A 280µW 108dB DR Readout IC with Wireless Capacitive Powering Using a Dual-Output Regulating Rectifier for Implantable PPG RecordingFatemeh Marefat, Reza Erfani, Kevin L. Kilgore, Pedram Mohseni. 412-414 [doi]
- 26.8 A Trimodal Wireless Implantable Neural Interface System-on-ChipYaoyao Jia, Ulkuhan Guler, Yen-Pang Lai, Yan Gong, Arthur J. Weber, Wen Li, Maysam Ghovanloo. 414-416 [doi]
- 2 Wireless Neural Recording IC for Motor Prediction with Near-Infrared-Based Power and Data TelemetryJongyup Lim, Eunseong Moon, Michael Barrow, Samuel R. Nason, Paras R. Patel, Parag G. Patil, Sechang Oh, Inhee Lee, Hun-Seok Kim, Dennis Sylvester, David T. Blaauw, Cynthia A. Chestek, Jamie Phillips, Tae-Kwang Jang. 416-418 [doi]
- 27.1 A 65nm Energy-Harvesting ULP SoC with 256kB Cortex-M0 Enabling an 89.1µW Continuous Machine Health Monitoring Wireless Self-Powered SystemJonathan K. Brown, David Abdallah, Jim Boley, Nicholas Collins, Kyle Craig, Greg Glennon, Kuo-Ken Huang, Christopher J. Lukas, William Moore, Richard K. Sawyer, Yousef Shakhsheer, Farah B. Yahya, Alice Wang, Nathan E. Roberts, David D. Wentzloff, Benton H. Calhoun. 420-422 [doi]
- 27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep PowerPranay Prabhat, Benoît Labbé, Graham Knight, Anand Savanth, Jonas Svedas, Matthew J. Walker, Supreet Jeloka, Philex Ming-Yan Fan, Fernando Garcia-Redondo, Thanusree Achuthan, James Myers. 422-424 [doi]
- 27.3 EM and Power SCA-Resilient AES-256 in 65nm CMOS Through >350× Current-Domain Signature AttenuationDebayan Das, Josef Danial, Anupam Golder, Nirmoy Modak, Shovan Maity, Baibhab Chatterjee, Dong-Hyun Seo, Muya Chang, Avinash Varna, Harish Krishnamurthy, Sanu Mathew, Santosh Ghosh, Arijit Raychowdhury, Shreyas Sen. 424-426 [doi]
- 27.4 Physically Unclonable Function in 28nm FD801 Technology Achieving High Reliability for AEC-Q100 Grade 1 and 1SO26262 ASIL-BYunhyeok Choi, Bohdan Karpinskyy, Kyoung-Moon Ahn, YongSoo Kim, Soonkwan Kwon, Jieun Park, Yongki Lee, Mijung Noh. 426-428 [doi]
- 28.1 A Capacitive Touch Chipset with 33.9dB Charge-Overflow Reduction Using Amplitude-Modulated Multi-Frequency Excitation and Wireless Power and Data Transfer to an Active StylusJae-Sung An, Jong-Hyun Ra, Eunchul Kang, Michiel A. P. Pertijs, Sang-Hyun Han. 430-432 [doi]
- 28.2 A 51dB-SNR 120Hz-Scan-Rate 32×18 Segmented-VCOM LCD In-Cell Touch-Display-Driver IC with 96-Channel Compact Shunt-Sensing Self-Capacitance Analog Front-EndHongjae Jang, Hyungcheol Shin, Jaemin Lee, Changwon Yoo, Kanghyup Chun, Ilhyun Yun. 432-434 [doi]
- 28.3 A 5.2Mpixel 88.4dB-DR 12in CMOS X-Ray Detector with 16b Column-Parallel Continuous-Time ΔΣ ADCsSangwoo Lee, Jinwoong Jeong, Taewoong Kim, Chanmin Park, Taewoo Kim, Youngcheol Chae. 434-436 [doi]
- 28.4 A CMOS Multimodality In-Pixel Electrochemical and Impedance Cellular Sensing Array for Massively Paralleled Synthetic Exoelectrogen CharacterizationDoohwan Jung, Sagar Ramesh Kumashi, Jong Seok Park, Sara Tejedor Sanz, Sandra Ivonne Grijalva, Adam Wang, Sensen Li, Hee Cheol Cho, Caroline Ajo-Franklin, Hua Wang. 436-438 [doi]
- 29.1 A 0.42THz 9.2dBm 64-Pixel Source-Array SoC with Spatial Modulation Diversity for Computational Terahertz ImagingRitesh Jain, Philipp Hillger, Janusz Grzyb, Ullrich R. Pfeiffer. 440-442 [doi]
- 29.2 A 0.59THz Beam-Steerable Coherent Radiator Array with 1mW Radiated Power and 24.1dBm EIRP in 40nm CMOSKaizhe Guo, Patrick Reynaert. 442-444 [doi]
- 29.3 Non-Magnetic 0.18µm SOI Circulator with Multi-Watt Power Handling Based on Switched-Capacitor Clock BoostingAravind Nagulu, Tingjun Chen, Gil Zussman, Harish Krishnaswamy. 444-446 [doi]
- 29.4 High-Performance Isolators and Notch Filters Based on N-Path Negative TransresistanceMohammad Khorshidian, Negar Reiskarimian, Harish Krishnaswamy. 446-448 [doi]
- 29.5 Sub-THz CMOS Molecular Clock with 43ppt Long-Term Stability Using High-Order Rotational Transition Probing and Slot-Array CouplersCheng Wang 0009, Xiang Yi, Mina Kim, Ruonan Han 0001. 448-450 [doi]
- 29.6 A 660-to-676GHz 4×2 Oscillator-Radiator Array with Intrinsic Frequency-Filtering Feedback for Harmonic Power Boost Achieving 7.4dBm EIRP in 40nm CMOSGabriel Guimaraes, Patrick Reynaert. 450-452 [doi]
- 29.7 A 490GHz 32mW Fully Integrated CMOS Receiver Adopting Dual-Locking FLLKyung-Sik Choi, Dzuhri Radityo Utomo, Keun-Mok Kim, Byeonghun Yun, Sang-Gug Lee, In-Young Lee. 452-454 [doi]
- 3 Deep-Tissue Ultrasonic Implantable Luminescence Oxygen SensorSoner Sonmezoglu, Michel M. Maharbiz. 454-456 [doi]
- 29.8 THzID: A 1.6mm2 Package-Less Cryptographic Identification Tag with Backscattering and Beam-Steering at 260GHzMohamed I. Ibrahim, Muhammad Ibrahim, Wasiq Khan, Wanyeong Jung, Rabia Tugce Yazicigil, Chiraag Shashikant Juvekar, Anantha P. Chandrakasan, Ruonan Han 0001. 454-456 [doi]
- 30.1 A Temperature-Robust 27.6nW -65dBm Wakeup Receiver at 9.6GHz X-BandPouyan Bassirian, Divya Duvvuri, Daniel S. Truesdell, Ningxi Liu, Benton H. Calhoun, Steven M. Bowers. 460-462 [doi]
- 30.2 NB-IoT and GNSS All-in-One System-on-Chip Integrating RF Transceiver, 23dBm CMOS Power Amplifier, Power Management Unit and Clock Management System for Low-Cost SolutionJongsoo Lee, Jae-Yeol Han, Chilun Lo, Jongmi Lee, Wan Kim, Seungjin Kim, Byoungjoong Kang, Juyoung Han, Sangdon Jung, Takahiro Nomiyama, Jongwoo Lee, Thomas Byunghak Cho, Inyup Kang. 462-464 [doi]
- 30.3 A SAW-Less NB-IoT RF Transceiver with Hybrid Polar and On-Chip Switching PA Supporting Power Class 3 Multi-Tone TransmissionHuimin Guo, Tat Fu Chan, Yat Tung Lai, Kam Chuen Wan, Lu Chen, Wai Po Wong. 464-466 [doi]
- 30.4 A 370µW 5.5dB-NF BLE/BT5.0/IEEE 802.15.4-Compliant Receiver with >63dB Adjacent Channel Rejection at >2 Channels Offset in 22nm FDSOIBart J. Thijssen, Eric A. M. Klumperink, Philip Quinlan, Bram Nauta. 466-468 [doi]
- 30.5 A 0.5V BLE Transceiver with a 1.9mW RX Achieving -96.4dBm Sensitivity and 4.1dB Adjacent Channel Rejection at 1MHz Offset in 22nm FDSOIMasahisa Tamura, Hideyuki Takano, Satoru Shinke, Hiroaki Fujita, Hironori Nakahara, Norihito Suzuki, Yutaka Nakada, Yusuke Shinohe, Shinichirou Etou, Tetsuya Fujiwara, Yasushi Katayama. 468-470 [doi]
- 30.6 A Low-Power BLE Transceiver with Support for Phase-Based Ranging, Featuring 5µs PLL Locking Time and 5.3ms Ranging Time, Enabled by Staircase-Chirp PLL with Sticky-Lock Channel-SwitchingElbert Bechthum, Johan Dijkhuis, Ming Ding 0003, Yuming He, Johan H. C. van den Heuvel, Paul Mateman, Gert-Jan van Schaik, Kenichi Shibata, Minyoung Song, Evgenii Tiurin, Stefano Traferro, Yao-Hong Liu, Christian Bachmann. 470-472 [doi]
- 30.7 A Crystal-Less BLE Transmitter with -86dBm Freq µ ency-Hopping Back-Channel WRX and Over-the-Air Clock Recovery from a GFSK-Modulated BLE PacketAbdullah Mohammed Alghaihab, Xing Chen, Yao Shi, Daniel S. Truesdell, Benton H. Calhoun, David D. Wentzloff. 472-474 [doi]
- 30.8 A 3.5mm×3.8mm Crystal-Less MICS Transceiver Featuring Coverages of ±160ppm Carrier Frequency Offset and 4.8-VSWR Antenna Impedance for Insertable Smart PillsMinyoung Song, Ming Ding 0003, Evgenii Tiurin, Kai Xu, Erwin Allebes, Gaurav Singh, Peng Zhang, Stefano Traferro, Hannu Korpela, Nick Van Helleputte, Robert Bogdan Staszewski, Yao-Hong Liu, Christian Bachmann. 474-476 [doi]
- 31.1 A 65nm 8.79TOPS/W 23.82mW Mixed-Signal Oscillator-Based NeuroSLAM Accelerator for Applications in Edge RoboticsJong-Hyeok Yoon, Arijit Raychowdhury. 478-480 [doi]
- 31.2 CIM-Spin: A 0.5-to-1.2V Scalable Annealing Processor Using Digital Compute-In-Memory Spin Operators and Register-Based Spins for Combinatorial Optimization ProblemsYuqi Su, Hyunjoon Kim, Bongjin Kim. 480-482 [doi]
- 31.3 A Compute-Adaptive Elastic Clock-Chain Technique with Dynamic Timing Enhancement for 2D PE-Array-Based AcceleratorsTianyu Jia, Yuhao Ju, Jie Gu. 482-484 [doi]
- 32.1 A 13.56MHz Current-Mode Wireless Power and Data Receiver with Efficient Power Extracting Controller and Energy-Shift Keying Technique for Loosely Coupled Implantable DevicesSung-Wan Hong. 486-488 [doi]
- 32.2 Self-Tunable Phase-Shifted SECE Piezoelectric Energy-Harvesting IC with a 30nW MPPT Achieving 446% Energy-Bandwidth Improvement and 94% EfficiencyAdrien Morel, Anthony Quelen, Carlos Augusto Berlitz, David Gibus, Pierre Gasnier, Adrien Badel, Gaël Pillonnet. 488-490 [doi]
- 32.3 Electromagnetic Mechanical Energy-Harvester IC with No Off-Chip Component and One Switching Period MPPT Achieving up to 95.9% End-to-End Efficiency and 460% Energy-Extraction GainAnthony Quelen, Gaël Pillonnet, Pierre Gasnier, François Rummens, Sebastien Boisseau. 490-492 [doi]
- 2 55fs-Transient-FoM Ring-Amplifier-Based Low-Dropout Regulator with Replica-Based PSR EnhancementJun-Eun Park, Jeongho Hwang, Jonghyun Oh, Deog Kyoon Jeong. 492-494 [doi]
- 32.5 A Scalable and PCB-Friendly Daisy-Chain Approach to Parallelize LDO Regulators with 2.613% Current-Sharing Accuracy Using Dynamic Element Matching for Integrated Current SensingBhushan Talele, Raveesh Magod, Keith Kunz, Sanjeev Manandhar, Bertan Bakkaloglu. 494-496 [doi]
- 33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical ModelsWeier Wan, Rajkumar Kubendran, Sukru Burc Eryilmaz, Wenqiang Zhang, Yan Liao, Dabin Wu, Stephen R. Deiss, Bin Gao 0006, Priyanka Raina, Siddharth Joshi, Huaqiang Wu, Gert Cauwenberghs, H.-S. Philip Wong. 498-500 [doi]
- 33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC ComputingQi Liu, Bin Gao 0006, Peng Yao, Dong Wu, Junren Chen, Yachuan Pang, Wenqiang Zhang, Yan Liao, Cheng-Xin Xue, Wei-Hao Chen, Jianshi Tang, Yu Wang, Meng-Fan Chang, He Qian, Huaqiang Wu. 500-502 [doi]
- 33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al ApplicationsMasanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Yusuke Araki, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi. 502-504 [doi]
- 34.1 A 64×64 Implantable Real-Time Single-Charged-Particle Radiation Detector for Cancer TherapyKyoungtae Lee, Jessica Scholey, Eric B. Norman, Inder K. Daftari, Kavita K. Mishra, Bruce A. Faddegon, Michel M. Maharbiz, Mekhail Anwar. 506-508 [doi]
- 34.2 1225-Channel Localized Temperature-Regulated Neuromorphic Retinal-Prosthesis SoC with 56.3nW/Channel Image ProcessorJeong Hoan Park, Joanne Si Ying Tan, Han Wu, Jerald Yoo. 508-510 [doi]
- 3 Implantable Neurostimulator with Magnetoelectric Power and Data TransferZhanghao Yu, Joshua C. Chen, Benjamin W. Avants, Yan He, Amanda Singer, Jacob T. Robinson, Kaiyuan Yang. 510-512 [doi]
- 34.5 Human-Body-Coupled Power-Delivery and Ambient-Energy-Harvesting ICs for a Full-Body-Area Power SustainabilityJiamin Li, Yilong Dong, Jeong Hoan Park, Longyang Lin, Tao Tang, Miaolin Zhanq, Han Wu, Lian Zhang, Joanne Si Ying Tan, Jerald Yoo. 514-516 [doi]
- 34.6 EEG Dust: A BCC-Based Wireless Concurrent Recording/Transmitting Concentric ElectrodeTao Tang, Long Yan, Jeong Hoan Park, Han Wu, Lian Zhang, Ho Yin Benjamin Lee, Jerald Yoo. 516-518 [doi]