- Maliang Liu, Jinhai Xiao, Peng Luo, Zhangming Zhu, Yintang Yang. Ultrawideband Power-Switchable Transmitter With 17.7-dBm Output Power for See-Through-Wall Radar. IEEE Trans. VLSI Syst., 28(5):1331-1335, 2020.
- Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo. Optimal Runtime Algorithm to Improve Fault Tolerance of Bus-Based Reconfigurable Designs. IEEE Trans. VLSI Syst., 28(4):914-925, 2020.
- Diwei Li, Dixian Zhao. High-Throughput Low-Power Area-Efficient Outphasing Modulator Based on Unrolled and Pipelined Radix-2 CORDIC. IEEE Trans. VLSI Syst., 28(2):480-491, 2020.
- Pallavi Paliwal, Vivek Yadav, Zeeshan Ali, Shalabh Gupta. A Fast Settling Fractional-N DPLL With Loop-Order Switching. IEEE Trans. VLSI Syst., 28(3):714-725, 2020.
- Jin-Woo Park, Hyokeun Lee, Boyeal Kim, Dong-Goo Kang, Seung-Oh Jin, Hyun Kim, Hyuk-Jae Lee. A Low-Cost and High-Throughput FPGA Implementation of the Retinex Algorithm for Real-Time Video Enhancement. IEEE Trans. VLSI Syst., 28(1):101-114, 2020.
- Trevor E. Pogue, Nicola Nicolici. Incremental Fault Analysis: Relaxing the Fault Model of Differential Fault Attacks. IEEE Trans. VLSI Syst., 28(3):750-763, 2020.
- Liting Yu, Xiaoxiao Wang, Fahim Rahman, Mark Tehranipoor. Interconnect-Based PUF With Signature Uniqueness Enhancement. IEEE Trans. VLSI Syst., 28(2):339-352, 2020.
- TaeHyun Kwon, Muhammad Imran, David Z. Pan, Joon-Sung Yang. Virtual-Tile-Based Flip-Flop Alignment Methodology for Clock Network Power Optimization. IEEE Trans. VLSI Syst., 28(5):1256-1268, 2020.
- Guanghui He, Xiaoyu Zhang, Zhuojun Liang. Algorithm and Architecture of an Efficient MIMO Detector With Cross-Level Parallel Tree-Search. IEEE Trans. VLSI Syst., 28(2):467-479, 2020.
- Liang Chen, Sheldon X.-D. Tan, Zeyu Sun, Shaoyi Peng, Min Tang, Junfa Mao. Fast Analytic Electromigration Analysis for General Multisegment Interconnect Wires. IEEE Trans. VLSI Syst., 28(2):421-432, 2020.