- Dawen Xu 0002, Zhuangyu Feng, Cheng Liu 0008, Li Li, Ying Wang 0001, Huawei Li, Xiaowei Li 0001. Taming Process Variations in CNFET for Efficient Last-Level Cache Design. IEEE Trans. VLSI Syst., 30(4):418-431, 2022.
- Yue-Ming Wu, Yu-Hsien Kao, Ta-Shun Chu. A 68-GHz Loss Compensated Distributed Amplifier Using Frequency Interleaved Technique in 65-nm CMOS Technology. IEEE Trans. VLSI Syst., 30(1):29-39, 2022.
- Leilei Jin, Wenjie Fu, Ming Ling, Longxing Shi. A Fast Cross-Layer Dynamic Power Estimation Method by Tracking Cycle-Accurate Activity Factors With Spark Streaming. IEEE Trans. VLSI Syst., 30(4):353-364, 2022.
- Nicholas A. Lanzillo, Albert Chu, Prasad Bhosale, Dan J. Dechene. Power Delivery Design, Signal Routing, and Performance of On-Chip Cobalt Interconnects in Advanced Technology Nodes. IEEE Trans. VLSI Syst., 30(1):60-67, 2022.
- Yuhao Chen, Hongge Li. Stochastic Computing Using Amplitude and Frequency Encoding. IEEE Trans. VLSI Syst., 30(5):656-660, 2022.
- Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Andrew Boutros, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Kuen Hung Tsoi, Xinyu Niu, Wayne Luk. Recurrent Neural Networks With Column-Wise Matrix-Vector Multiplication on FPGAs. IEEE Trans. VLSI Syst., 30(2):227-237, 2022.
- Abdullah Ibn Abbas, Glenn E. R. Cowan. A Receiver Front-End for VCSEL-Based Optical Links With 49 UI Turn-On Time. IEEE Trans. VLSI Syst., 30(4):539-543, 2022.
- Moslem Heidarpur, Mitra Mirhassani. Corrections to "An Efficient and High-Speed Overlap-Free Karatsuba-Based Finite-Field Multiplier for FPGA Implementation". IEEE Trans. VLSI Syst., 30(1):112, 2022.
- Mengyun Liu, Krishnendu Chakrabarty. Online Fault Detection in ReRAM-Based Computing Systems for Inferencing. IEEE Trans. VLSI Syst., 30(4):392-405, 2022.
- Divya Praneetha Ravipati, Rajesh Kedia, Victor M. van Santen, Jörg Henkel, Preeti Ranjan Panda, Hussam Amrouch. FN-CACTI: Advanced CACTI for FinFET and NC-FinFET Technologies. IEEE Trans. VLSI Syst., 30(3):339-352, 2022.