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- Juyong Lee, Hayoung Lee, Sooryeong Lee, Sungho Kang 0001. A Cost-Effective Per-Pin ALPG for High-Speed Memory Testing. IEEE Trans. VLSI Syst., 33(3):867-871, March 2025.
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- Bo-Wei Shih, Ying-Chun Chen, Jia-Yi Lee, Woei-Luen Chen. Complementary Voltage to Time Converter With Optimized Voltage Scaling Circuit. IEEE Trans. VLSI Syst., 33(5):1255-1263, May 2025.
- Ya-Rou Hsu, Aaron C.-W. Liang, Han-Ya Tsai, Yen-Ju Su, Charles H.-P. Wen, Hsuan-Ming Huang. Machine-Learning-Based Ranking of Cell Layout Delay Considering Layout-Dependent Effects. IEEE Trans. VLSI Syst., 33(6):1789-1793, June 2025.