Table of Contents

• Drift Correction Algorithms for Lifetime-based Transcutaneous Oxygen MeasurementsGokalp Cevik, Burak Kahraman, Vladimir Vakhter, Ulkuhan Guler 0001. 1-5 [doi]
• Enhancing Computer Organization Education: A Reformative Teaching ApproachCansong Zhou, Guofan Jiang, Peng Liu 0016. 1-5 [doi]
• MPQA: Mixed-Precision Quantization Accelerator for CNN InferenceBeining Zhao, Yu Li, Jiahao Zuo, Wei Zhang 0001, Xinyu Chen, Shan Cao, Zhiyuan Jiang. 1-5 [doi]
• A Low-Voltage Analog to Information Converter with Hybrid QuantizationHui Qian 0002, Zhiqiang Wang, Zhengyu Huang, Chenhui Feng. 1-5 [doi]
• HEALSound: Healthcare Education And Labeling for Cardiopulmonary SoundsYichen Long, Changyan Chen, Huajie Huang, Xuya Jiang, Qing Zhang, Yuhang Zhang, Jian Zhao, Rui Pan, Yongfu Li. 1-5 [doi]
• Design of a Hybrid High Resolution Digital PWM for a Smart Power Point-of-Load Power ConverterNeha Dalal, Matteo Landini, Paolo Vilmercati, Francesco Musolino, Paolo Stefano Crovetti. 1-5 [doi]
• Where to cut: Efficient ADC quantization for analog in-memory computing with discrete valuesJohannes Leugering, Shashank Bansal, Zhaoyi Liu, Jiahao Song, Bouchaib Cherif, Gert Cauwenberghs. 1-5 [doi]
• A 83.7% Resource Reduced FPGA-based Wired-Logic DNN Processor by Using Mixed-Precision Module Embedding Into Non-Linear Function LUTYuxuan Pan, Mototsugu Hamada, Atsutake Kosuge. 1-5 [doi]
• A 95% efficiency Buck-Boost Converter with Full-Cycle Continuous Current Sensing and Adaptive Mode ControlYutong Ying, Shenshaoju Chen, Jinhen Lee, Tong Ge. 1-5 [doi]
• 3 Power Density for AI ServersYichao Ji, Lin Cheng. 1-5 [doi]
• An Adaptive AI-based Approach to Detect and Protect COTS Systems against Micro-Single-Event-Latchups (μ-SELs) and SELsJunkai Zhao, Yin Sun, Tony Zhang, Kwen-Siong Chong, Wei Shu, Joseph S. Chang. 1-5 [doi]
• An Efficient and Flexible Hybrid Implementation of Pair and Triplet-Based STDP LearningZongfan Wu, Zhibin Luo, Junyi Mai, Enyi Yao. 1-5 [doi]
• Low-Complexity and Low-Power Receiver for Solar-Cell-Based Optical CommunicationsWalter D. Leon-Salas, Philo Kaulkin, Keetyn Burnett, Mauricio Postigo-Málaga, Miguel A. Vizcardo. 1-5 [doi]
• Robust Semantic Communication for UAV Control with Integrated Trajectory PredictionHai-Yan Huang, Yu-Jia Chen, Chia-Chun Hsu. 1-5 [doi]
• Enhanced Time Amplifier with Trimming Voltage for Error Reduction in Time-to-Digital ConvertersJavad Ahmadi-Farsani, Ion Vornicu, Laurentiu Acasandrei. 1-5 [doi]
• On the ESD Protection for 10V-Compliant Neural Stimulator in 65nm CMOS TechnologyNaef Ahmad, Sandip Lashkare, Laxmeesha Somappa. 1-5 [doi]
• A Simplified Analysis of Threshold Switch Based Neuron CircuitsAhmet Samil Demirkol, Richard Schroedter, Ioannis Messaris, Vasileios G. Ntinas, Dimitrios A. Prousalis, Ronald Tetzlaff, Alon Ascoli. 1-5 [doi]
• Towards Optimizing Physical Reservoir Computing: A Hybrid PCPO-ESN Framework for Time Series ForecastingDinda Pramanta, Ninnart Fuengfusin, Arie Rachmad Syulistyo, Hakaru Tamukoh. 1-5 [doi]
• A Low-Energy Spiking Neural Network Architecture for Reinforcement Learning toward Classification Tasks at the EdgeNecati Teoman Bahar, Joshua Ifeanyi Okonkwo, Hasan Ulusan, Ali Muhtaroglu. 1-5 [doi]
• VaLI: Variability-aware Fine-tuning with Low-rank Adapter and Iterative Training for ReRAM Computation-in-MemoryTao Wang, Naoko Misawa, Chihiro Matsui, Ken Takeuchi. 1-5 [doi]
• A 0.58mW dB-Linear Time Gain Compensation Amplifier with ±0.5-dB Gain Error for Imaging ApplicationsZhaoyang Cao, Jinhai Hu, Wang Ling Goh, Yuan Gao 0011. 1-5 [doi]
• CapPUF: A Tamper-Resistant PUF Utilizing I/O Capacitances for IoT NodesDilli Babu Porlapothula, Kurian Polachan. 1-5 [doi]
• A Lightweight and Efficient BRAM-free NTT Unit for Crystals-DilithiumJunjie Zhong, Bei Wang, Zeren Zhu, Weiqiang Liu 0001, Yijun Cui. 1-5 [doi]
• PRIM: Hybrid Array-Compressor Multipliers with Carry Disregard and OR-based ApproximationNima Amirafshar, Gulafshan, Hadi Shahriar Shahhoseini, Nima Taherinejad. 1-5 [doi]
• AxRA: Approximate Rowhammer Attack for Modern DRAM SystemsYuhang Hao, Yun Wu, Ziying Ni, Jack Miskelly, Máire O'Neill, Chongyan Gu. 1-5 [doi]
• Efficient End-to-End 6-Dof Grasp Detection Framework for Edge Devices with Hierarchical Heatmaps and Feature PropagationKaiqin Yang, Yixiang Dai, Guijin Wang, Siang Chen. 1-5 [doi]
• Fixed-Throughput GRAND with FIFO SchedulingFilippo Christen, Darja Nonaca, Christoph Studer. 1-5 [doi]
• Network-on-Interposer Co-Design for Heterogeneous Chiplet-Based Integrated SystemsAndres Ayes, Eby G. Friedman, Marilyn Wolf. 1-5 [doi]
• Low-power and Low-noise Amplifier with Intermittent Operation for Compressed Sensing in EEG Measurement SystemsKenji Mii, Daisuke Kanemoto, Tetsuya Hirose. 1-5 [doi]
• A Reconfigurable Digital Compute-In-Memory Heterogeneous Macro for Differential Frame Convolution and Spiking Neural NetworkCheng Zhao, Li Lun, Zhenhui Dai, Haozhe Chen, Yingying Cui, Xiaoxin Cui. 1-5 [doi]
• A 1.91 POPS/W Energy-Efficient SRAM Based Signed Multi-Bit Time Domain CIM ArchitectureSubhradip Chakraborty, Dinesh Kushwaha, Himanshu Ranjan, Sudeb Dasgupta. 1-5 [doi]
• 3D SRAM Disaggregation in Advanced CMOS Nodes using Hybrid Bonding TechnologyBhawana Kumari, Anurag Swarnkar, Dawit Burusie Abdi, Fernando García-Redondo, James Myers, Julien Ryckaert, Jaydeep Kulkarni, Dwaipayan Biswas. 1-5 [doi]
• An 102dB DR Current Mode Readout Frontend with Level-Crossing Based Ambient Light Monitoring and DC CancellationFengGe Liu, Mengyu Li, Siyao Cao, Xingze Xue, Kexin Xie, Feijun Zheng, Shiwei Wang 0001, Shuang Song 0003. 1-5 [doi]
• A Photo-Luminescence Modulator with Improved Linearity for Solar Cell-Based Optical CommunicationsWalter D. Leon-Salas, Mauricio Postigo-Málaga, Miguel A. Vizcardo. 1-5 [doi]
• An Ultra-Low Power 915 MHz LO with Adaptive Frequency Calibration for IoT Wake-Up ReceiversXianhong Xiu, Tian Huang, Qianhui Li, Meng Liu, Hao Min, Xiaohua Yu, Ronghua Ni. 1-5 [doi]
• High Energy Efficiency Spatial Parallel Stochastic Computing for Precision Scalable Neural Processing UnitYakun Zhou, Jienan Chen. 1-5 [doi]
• A 10-12 GHz Embedded Multi-Band LC Notch Filter Low-Noise Amplifier With High Anti-InterferenceJiabin Wang, Tianlong Zhang, Yidan Cheng, Chenge Wang, Zhiyu Wang 0001, Wei Chen, Faxin Yu. 1-5 [doi]
• Non-Volatile Content-Addressable Memory For Energy-Efficient & High-Performance Search And Update OperationsAlessandro Bedoya, Benjamin Zambrano, Ramiro Taco, Luis-Miguel Prócel, Marco Lanuzza, Esteban Garzón. 1-5 [doi]
• Cloud-Edge Architecture for 4K 360-Degree Video Encoding in FoV-based Live DASHAndoni Salcedo-Navarro, Miguel García Pineda, Juan Gutiérrez-Aguado. 1-5 [doi]
• Independent Parallel Signal Processing Using Programmable MetasurfacesJavad Shabanpour. 1-5 [doi]
• On the density of periodic windows for the Rössler systemZbigniew Galias. 1-5 [doi]
• InternVQA: Advancing Compressed Video Quality Assessment with Distilling Large Foundation ModelFengbin Guan, Zihao Yu, Yiting Lu, Xin Li, Zhibo Chen. 1-5 [doi]
• S-PAM: Superconductor-Semiconductor Interface Circuit with Pulse-Amplitude ModulationYerzhan Mustafa, Selçuk Köse. 1-5 [doi]
• An Integer-only Quantization Framework for Edge Deployment of Large Language ModelsYaqi Hu, Zhuqing Yuan, Weichen Gao, Sheng Zhang, Yongpan Liu. 1-5 [doi]
• A 145-ns Response Time High-Side Current Sense for a 100-V Monolithic GaN Half BridgeTommaso Francesco Tardani, Andrea Gambero, Sandro Rossi, Antonio Aprile, Edoardo Bonizzoni, Piero Malcovati. 1-5 [doi]
• ViT Coupled Efficient CMOS Image Sensor with Sparse Acquisition and Patch SelectionWilfred Kisku, Azad Singh, Amandeep Kaur 0005, Deepak Mishra 0003. 1-5 [doi]
• Two-step ADC with Self-Successive Doubling Algorithm for High-Speed CISKyungmin Lee, Minkyu Song, Soo Youn Kim. 1-5 [doi]
• Non-Linearity Cancellation of Gm-C Based DSMBishoy M. Zaky, John G. Kauffman, Francesco Conzatti, Maurits Ortmanns. 1-5 [doi]
• LiCSPA: Lightweight Countermeasure against Static Power Side-Channel AttacksJitendra Bhandari, Mohammed Nabeel 0001, Likhitha Mankali, Ozgur Sinanoglu, Ramesh Karri, Johann Knechtel. 1-5 [doi]
• A 40V High-Speed Low-FoM Capacitive Level Shifter with Feedback Discharge Control for Floating Supply Gate Drivers on BCD TechnologyFahd Khan, Niccolo' Brambilla, Sandro Rossi, Calogero Ribellino, Stefano Corona, Edoardo Bonizzoni, Piero Malcovati. 1-5 [doi]
• A Preset-Free Energy-Efficient Bidirectional Zero-Crossing-Based IntegratorJiasheng Chen, Qin Lei, Can Liang, Dan Wang, Jinyu Wang, Long Xu, Chao Chen, Zeyu Cai. 1-5 [doi]
• Real-Time Object Recognition Based on Parallel Ultra-Low-Power Microcontroller: A case study on Multisensory GloveRiccardo Testa, Mohamad Yaacoub, Christian Gianoglio, Maurizio Valle. 1-5 [doi]
• A 43 µm × 269 µm, Light-Tolerant and Power-Adaptive Forward-Bulk Optoelectrical Microsystem for Tetherless Neural RecordingRui Jiao, Yumin Zheng, Shahaboddin Ghajari, Sanaz Sadeghi, Alejandro J. Cortese, Paul L. McEuen, Alyosha C. Molnar, Sunwoo Lee 0002. 1-5 [doi]
• Design of Linear Battery Charger with Self-Blocking Reverse Current Path for Biomedical ApplicationsWen-Hsiang Huang, Ming-Dou Ker. 1-5 [doi]
• HieRFP: A Hierarchical Recognition and Floorplanning Framework for Reusable ModulesZixuan Li, Kanglin Tian, Jianwang Zhai, Zirui Li, Kang Zhao. 1-5 [doi]
• Optimization of CRC-Based Single-Bit Error Correction Using a Perfect Hash Table StructureZouhair Ziani, Stéphane Coulombe, François-Xavier Coudoux, Patrick Corlay. 1-5 [doi]
• SQNR Improvement of Incremental Zoom ADCs with Raised-Order CoI Filter and Dither InjectionLingxin Meng, Menglian Zhao, Zhichao Tan. 1-4 [doi]
• A Layer-wise N: M Sparsity Aware Transformer Accelerator leveraging Temporal Locality with Butterfly NetworkQinfan Wang, Yuan Song, Xilong Kang, Qingwen Wei, Cai Hao, Bo Liu. 1-5 [doi]
• A Low-Noise, High-Input-Impedance Pre-Amplifier for Piezoelectric MEMS MicrophoneWeiye Song, Yucong Huang, Zihan Chen, Xingbo Wang, Terry Tao Ye. 1-5 [doi]
• Improving the Efficiency of VVC using Partitioning of Reference FramesKamran Qureshi, Hadi Amirpour, Christian Timmerer. 1-5 [doi]
• PAT-ViT: Token Pruning-based Adversarial Tuning for Robust Vision TransformersYun-Hao Yang, Yuan-June Luo, Wan-Jung Chen, An-Yeu Andy Wu, Shih-Hsu Huang, Mladen Berekovic. 1-5 [doi]
• Live Demonstration: Haptic-Enhanced Bioimpedance Needle for Assisting Central Venous CatheterisationQingyu Zhang, Ahmed Al-Hindawi, Jiaxing Zhang, Andreas Demosthenous, Yu Wu 0007. 1 [doi]
• Unsupervised Learning of Fall Incidents using Radar-based SensingHamidreza Sadreazami, Marzieh Amini, Miodrag Bolic, Sreeraman Rajan. 1-5 [doi]
• Parasitic capacitance reduction for a Bi-directional floating-base-PNP ESD device for CAN BusXiahui Wang, Nils Johannes Kimmel, Christian Stromberg, Bhaskar Choubey. 1-4 [doi]
• A Convoluted Journey from CMOS to Spin WavesPantazis Anagnostou, Arne Van Zegbroeck, Said Hamdioui, Christoph Adelmann, Florin Ciubotaru, Sorin Cotofana. 1-5 [doi]
• A 2.53 fJ/Conversion Low-Power Hybrid ADC with Level-Crossing Assisted Sparisty Adaptivity for Implantable Neural InterfaceYutao Mao, Jinbo Chen, Hui Wu, Jie Yang, Xiaofei Kuang, Mohamad Sawan. 1-4 [doi]
• AMS-HD: Acute Mountain Sickness Detection with Hyperdimensional ComputingAbu Kaisar Mohammad Masum, Reeti Pradhananga, Jonas I. Schmidt, Mehran Shoushtari Moghadam, M. Hassan Najafi, Bige D. Unluturk, Ulkuhan Guler, Sercan Aygun. 1-5 [doi]
• Waveguide QED Analysis of Quantum-Coherent Links for Modular Quantum ComputingJunaid Khan, Sergio Navarro Reyes, Sahar Ben Rached, Eduard Alarcón, Peter Haring Bolívar, Carmen G. Almudéver, Sergi Abadal. 1-5 [doi]
• Electronic Photonic Integrated Circuits (EPICs): Fundamentals and ApplicationsVishal Saxena. 1-6 [doi]
• RRR: Robust runtime reconfigurable shared cache management scheme for GPGPUsVarun Venkitaraman, Shrasti Bhargava, Tejeshwar Bhagatsing Thorawade, K. Kokkiligadda, Rahul Kumar, Virendra Singh. 1-5 [doi]
• A 62.8 TOPS/W FP-INT Digital Computing-in Memory Processor with Bit-Reordered Adder Tree and Low Active Hierarchical AccumulatorSunjoo Whang, Sangwoo Ha, Soyeon Um, Sangjin Kim, Hoi-Jun Yoo. 1-5 [doi]
• Modern Hopfield-Heuristic Physical Computing Architecture for Diabetes PredictionRuoyu Wu, Guofan Jiang, Peng Liu. 1-5 [doi]
• High-throughput packet aggregator for the back-end DAQ of CERN CMS HGCAL detectorMartim Rosado, Pedro Tomás, Nuno Roma, André David. 1-5 [doi]
• MDE: Modality Discrimination Enhancement for Multi-modal RecommendationHang Zhou, Yucheng Wang, Huijing Zhan. 1-5 [doi]
• Ionoacoustic Dosimetry for FLASH Electron Beams: Design of Sensor Arrays and Reconstruction Algorithms through Computational SimulationsAlessandro Michele Ferrara, Elia Arturo Vallicelli, Maurizio Marrale, Fabio Di Martino, Giuliana Milluzzo, Francesco Romano, Mattia Romeo, Mattia Tambaro, Marcello De Matteis. 1-5 [doi]
• An SoC Design and Fabrication Hands-On Educational Course within One Week Using Structured ASICHideharu Amano, Atsutake Kosuge, Hirofumi Sumi, Naonobu Shimamoto, Yukinori Ochiai, Yurie Inoue, Tohru Mogami, Yoshio Mita, Makoto Ikeda. 1-5 [doi]
• A New Hardware Trojan Attack on Scan-obfuscated Logic-locked CircuitsAnjum Riaz, Gaurav Kumar, Yamuna Prasad, Satyadev Ahlawat, Virendra Singh. 1-5 [doi]
• Analysis of Virtual Load Damping Provision from IBR-Dominated Distribution NetworksAngelo Brambilla, Davide del Giudice, Daniele Linaro, Federico Bizzarri. 1-5 [doi]
• A 1280×1920 Global Shutter CMOS Image Sensor with On-Chip Background Light CancellationFei Wang, Che Qin, Zhigang Wu, Cheng Ma, Xinyang Wang, Zeyu Cai. 1-5 [doi]
• A High In-Bnad Linearity Gain-Boosted N-path Filter with BW-ExtendedXujia Luo, Shang Xu, Haotian Zhang, Guoan Wu, Lamin Zhan. 1-5 [doi]
• Towards a new dynamic phasor theory for modeling IBG penetrated power gridsÁlvaro A. Volpato, Luís F. C. Alberto. 1-5 [doi]
• CMOS-Based Wheatstone Bridge Stress Sensors Sensitive and Insensitive to Mechanical StressLeo Gocan, Andro Zamboki, Josip Mikulic, Gregor Schatzberger, Tvrtko Mandic, Adrijan Baric. 1-5 [doi]
• OTFS for Joint Radar and Communication: Algorithms, Prototypes, and ExperimentsXiaojuan Zhang, Yonghong Zeng, Francois Chin Po Shin. 1-5 [doi]
• Digital Back-end Design Considerations of a Laser Heterodyne RadiometerVu Hoang Thang Chau, Yadvender Singh Dhillon, James Bevington, Ediz Cetin. 1-5 [doi]
• Enabling Fault Isolation in Fault Injection for Automotive-grade Circuits SimulationYulong Liu, Junhao Lin, Yuheng Li, Pingsheng Zhang, Zenan Yan, Yuan Wang 0001, Song Jia. 1-5 [doi]
• TWavefussion: Wavelet-based Diffusion with Transformer for Multivariate Time Series Anomaly DetectionHongjun Sheng, Xinggan Peng, Van Kwan Zhi Koh, Bihan Wen, Zhiping Lin 0001. 1-5 [doi]
• Energy-Efficient Reconfigurable Skyrmion-Based Counter for Nanoscale ApplicationsC. Kishore, Santhosh Sivasubramani, Sarwath Sara, Arabinda Haldar, Chandrasekhar Murapaka, Rishad A. Shafik, Amit Acharyya. 1-5 [doi]
• Ultra-compact and Side-channel Resistant Design of FIFO-based NTT Core for PQCsJiatong Tian, Yijun Cui, Ziying Ni, Bei Wang, Fei Lyv, Chenghua Wang, Weiqiang Liu 0001. 1-5 [doi]
• Lightweight FPGA Implementation of the Shadow PUF Module for Generating Reconfigurable Proxy PUFsPablo Rojas, Sara Alahmadi, Magdy A. Bayoumi. 1-5 [doi]
• Dynamic Spatial Filtering with Residual Spectral Mapping for Lightweight Multichannel Speech EnhancementXingyu Shen, Runze Wang, Wei-Ping Zhu 0001. 1-5 [doi]
• Charge Pump Capacitance Ratio Read Out Design System ApproachEusebio Belfiore, Michele Vaiana, Angelo Genova, Carmelo Morello. 1-5 [doi]
• An All-Digital Voltage Droop Detector Utilizing a Multi-Phase Clock assisted Nyquist CounterZhangrui Qian, Kaize Zhou, Yuxuan Du, Zhiting Li, Weiwei Shan. 1-5 [doi]
• Analysis and Design of Broadband Transitions from Microstrip-to-CV-WSIW for mm-Wave ApplicationsAnil Kumar Nayak, Igor M. Filanovsky, Kambiz Moez, Amalendu Patnaik. 1-5 [doi]
• Monotonic Neural Network based Rate-Distortion Modeling for H.266/VVCXiang Pan, Zhenzhong Chen. 1-5 [doi]
• A 12.6V 130MHz Rail-to-Rail Output Bipolar Amplifier with Overdrive Supply Current LimitGautam R, Subha Sarkar. 1-5 [doi]
• EAS-CiM 2.0: Event-driven Asynchronous Stream-based Compute-in-Memory Kernels with Scalable PrecisionRahul Sreekumar, M. Morsali, Naomi Solomon, Yimin Gao, Minseong Park, Kyusang Lee, R. K. Krishnamurthy, Mircea R. Stan. 1-5 [doi]
• ROFD: Event-based 5k-fps Real-Time Optical Flow Detector for Transient Radiant Expanding FlaresShen Zhang, Boyi Wei, Jing Jin, Yibo Zhang, Wenzhe Zheng, Yan Shen, Weixiong Jiang, Chenyang Shi, Yajun Ha. 1-5 [doi]
• CIT-CTPlacer: An Analytical RDL Chiplet-Terminal Co-Placement Algorithm for Large-Scale 2.5D ICXihao Liang, Yujie Wang, Xupengkai Lu, Lang Feng 0001, Jixiang Zhu, Ying Wang, Yinhe Han. 1-5 [doi]
• Current Regulated LED Driver with Fast Switch-Off Behavior for Integrated Optoelectronic ImplantsAnton Geläschus, Julian A. Singer, Matthias Kuhl, Andreas Bahr. 1-5 [doi]
• A Reinforcement Learning Based Multi-objective Evolutionary Algorithm for High-level Synthesis Design Space ExplorationYuda Qian, Shanshan Wang, Chenglong Xiao. 1-5 [doi]
• STAPC: A Sparse Training Accelerator for Efficient On-Device DNN Learning via Position ConstraintsMiao Wang, Shengbing Zhang, Meng Zhang. 1-5 [doi]
• A 0.9 V Configurable Dual Mode Comparator using a Supply Boosting TechniqueSourabh Mestry, Siddharth R. K., Nithin Kumar Y. B, Vasantha M. H., Edoardo Bonizzoni. 1-5 [doi]
• A Crosstalk-aware Application Mapping Algorithm for Hybrid Optical Network-on-Chip ArchitectureSucharita Samanta, Nandan Surani, Devarsh Patel, Kanchan Manna. 1-5 [doi]
• Live Demonstration: Smart Watchdog Mechanism for Real-time Fault Detection in RISC-VDavid Simpson, Jim Harkin, Malachy McElholm, Liam McDaid. 1 [doi]
• A Token-Passing-Based Trigger-Prediction Methodology for Event-Driven ToF SensorsYifei Xiang, Zhao Wang, Haoyang Sang, Man Kay Law. 1-5 [doi]
• A Robust Data Compression Engine Dedicated For FMCW Radar RDMZhiluo Zhang, Kai Liu, Zhixin Yin, Leilei Huang, Chunqi Shi, Jinghong Chen, Runxi Zhang. 1-5 [doi]
• Ultra Low Power Video Understanding Smart Vision SoC with On-Chip Sensing and Hybrid Similarity-Aware SRAM/ROM CIM MacroHaoyang Sang, Zhao Wang, Ningchao Lin, Guangshu Zhao, Man Kay Law. 1-5 [doi]
• Live Demonstration: A Programmable A/D Converter Array with Interactive CompilerZhishuai Zhang, Chitian Yuan, Jiantao Li, Kun Lin, Yi Zhong, Nan Sun 0001, Lu Jie 0001. 1 [doi]
• On-Chip I/O ESD Protection for GaN-on-SOI Integrated CircuitsKatia Samperi, Urmimala Chatterjee, Salvatore Pennisi. 1-4 [doi]
• Efficient Feature Compression for Machines with Global Statistics PreservationMd Eimran Hossain Eimon, Hyomin Choi, Fabien Racapé, Mateen Ulhaq, Velibor Adzic, Hari Kalva, Borko Furht. 1-5 [doi]
• A 210-230GHz SiGe Hybrid Mixing System with Pre-And Post-Driving AmplifiersXin Zhang, Hao Liu, Fanyi Meng. 1-5 [doi]
• A 50 Gb/s Rad-Hard Quad TIA IC for Onboard Satellite InterconnectsPhilip Ostrovskyy, Aintzane Lujambio, David Lobato. 1-5 [doi]
• Robust Defect Detection for Phase-Locked Loops using All-Digital Built-In Self-Test (BIST) CircuitryMichael Sekyere, Marampally Saikiran, Rob Butler, Reed Adams, Degang Chen 0001. 1-5 [doi]
• New self-calibration algorithm for programmable multi-core memristor-CMOS chip for neuromorphic computingIván Díez de los Ríos, Luis A. Camuñas-Mesa, Teresa Serrano-Gotarredona, Bernabé Linares-Barranco. 1-5 [doi]
• A 40-nm 6.75 TOPS/W Quantization-Aware NN Processor for High-Energy-Efficiency Image RecognitionJun-Wei Yu, Jen-Chieh Cheng, Jia-You Yu, Shih-Yu Pan, Yi-Chung Wu. 1-5 [doi]
• Spatiotemporally Modulated Dual-MLP Architecture for Neural Video Representation and CompressionGong-Yao Wu, Cih-Wei Wong, Hsu-Feng Hsiao. 1-5 [doi]
• Leakage Optimization Using Mixed-Vth Cells: Vth Swapping and Cell RelocationYounggwang Jung, Daijoon Hyun. 1-5 [doi]
• A Failure Detection Technique for Au-Plated CMOS Microelectrode ArraysXin Zhang, Minghao Li, Sara S. Ghoreishizadeh. 1-5 [doi]
• PMIL: A Topology Module to Improve MIL-based WSI ClassificationAhmad Obeid 0001, Anabia Sohail, Said Boumaraf, Xiabi Liu, Sajid Javed, Hasan Almarzouqi, Jorge Dias 0001, Mohammed Bennamoun, Naoufel Werghi, Ibrahim Abe M. Elfadel. 1-5 [doi]
• Enhanced CNN Performance without Retraining Via Weight Approximation and Data ReuseMohammed F. Tolba 0002, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Thanos Stouraitis. 1-5 [doi]
• A 70 pW Self-Compensated Subthreshold Voltage Reference Achieving 190 °C Temperature Range and 0.07%/V Line SensitivityXiaoxian Feng, Yingping Chen, Qi Liu. 1-5 [doi]
• Zero-Aware Regularization for Energy-Efficient Inference on Akida Neuromorphic ProcessorTakehiro Habara, Takashi Sato 0001, Hiromitsu Awano. 1-5 [doi]
• A novel current-balanced adaptive zero current detection scheme for Buck DC-DC converterKai Shan Zheng, Li Niu, Ying Hou, Xiaosong Wang 0002, Yu Liu 0030. 1-5 [doi]
• A High Performance and Efficient Method for Enhancing Randomness in Linear Feedback Shift Registers(LFSR)Sonia Akter, Kasem Khalil, Magdy A. Bayoumi. 1-5 [doi]
• A hyperspectral reconstruction algorithm based on a Mask-free dual-cameraZeyu Cai, Ziyu Zhang, Gong Cheng, Chunlu Li, Ru Hong, Zilei Zhang, Chang Qiu, Minxia Li, Yufan Jiang, Jie Yang, Chengqian Jin, Feipeng Da. 1-5 [doi]
• Optimizing Area and Power of MAC Arrays in DNN Accelerators via Overflow-Aware Partial Sum ManagementZhaoteng Meng, Lin Shu, Zhan Li, Kailin Lv, Chang Lin, Long Xiao, Jie Hao. 1-5 [doi]
• A High-Accuracy and Low-Resource Design for Nonlinear Functions in AI AcceleratorsZirui Zhang, Liang Chen, Xin Liu, Dongjun Xu. 1-5 [doi]
• Dynamical analysis of novel Memristor Cellular Nonlinear Network cell topologiesChenyang Yu, Vasileios G. Ntinas, Dimitrios A. Prousalis, Ioannis Messaris, Ahmet Samil Demirkol, Alon Ascoli, Ronald Tetzlaff. 1-5 [doi]
• PSumSim: A Simulator for Partial-Sum Quantization in Analog Matrix-Vector MultipliersJoschua Conrad, Simon Wilhelmstätter, Holger Mandry, Paul Kässer, Ahmed Abdelaal, Rohan Asthana, Vasileios Belagiannis, Maurits Ortmanns. 1-5 [doi]
• Design of a TRNG in 600-nm IGZO-TFT FlexICs for Secure IoT ApplicationsJoão Cabacinho, Diogo Sousa, João Marcelino, Marco Fernandes, Pedro Barquinha, João Goes, João Casaleiro, Luís Bica Oliveira. 1-5 [doi]
• An FPGA Processor Combining Point Cloud and SNN for DVS-based ADAS ApplicationWenjia Wang, Hongwei Ren, Wente Yi, Kexun Cheng, Lehao Tan, Ying Cui, Chen Li, Bojun Cheng, Biao Pan. 1-5 [doi]
• Live Demonstration: Hardware/Software Co-Design to Exploit RRAM Programmability for Emerging Edge Classification Using ArC TWOCristian Sestito, Georgios Papandroulidakis, Patrick Foster, Spyros Stathopoulos, Shady Agwa, Themis Prodromakis. 1 [doi]
• Viewpoint-Adaptive Collage-based Streaming for 4K Light Field VideoKyungdae Park, Chae-Eun Rhee. 1-5 [doi]
• A Method for Improving the Wearability of Capsule Positioning System Using Particle FilterJiaxing Zhang, Qingyu Zhang, Yu Wu 0007, Dai Jiang, Andreas Demosthenous. 1-4 [doi]
• A High Performance Dual-Wordline RRAM Macro with Replica Bitline Delay Control CircuitHonghu Yang, Yongkang Han, Tianci Cai, Chengshuo Yu, Keji Zhou, Jianguo Yang. 1-5 [doi]
• Optimized Hardware Architecture for Respiration Rate Classification using Quadratic SVM and mmWave Radar SensorMujeev Khan, R. Shamim, Mohd Wajid, Abhishek Srivastava 0002. 1-5 [doi]
• A 9.13-to-15.31 GHz 205.1 dBc/Hz FOMT Dual-Core Dual-Mode VCO with Forward Body Bias Technique For Sub-7 GHz ApplicationsWanqing Wu, Ruiyong Xiang, Xinyi Zhang, Xian Tang, Songping Mai, Haigang Feng. 1-5 [doi]
• GDS2SEM: Diffusion-based Layout-to-SEM Post-Fabrication Emulation for IC ValidationWalaa Amer, Sani Nassif, Fadi J. Kurdahi. 1-5 [doi]
• Event-based Neural Spike Detection Using Spiking Neural Networks for Neuromorphic iBMI SystemsChanwook Hwang, Biyan Zhou, Ye Ke, Vivek Mohan, Jong Hwan Ko, Arindam Basu. 1-5 [doi]
• 2 Recurrent Neural Network Accelerator for Wideband Power Amplifier Digital Pre-DistortionAng Li, Haolin Wu, Yizhuo Wu, Qinyu Chen, Leo C. N. de Vreede, Chang Gao 0002. 1-5 [doi]
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• An Efficient Hardware Implementation of 2D Convolution based on the Discrete Hirschman TransformWeiwei Wang, Linda S. DeBrunner, Victor E. DeBrunner. 1-5 [doi]
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• Sparsity-Aware Optimization of In-Memory Bayesian Binary Neural Network AcceleratorsPrabodh Katti, Bashir M. Al-Hashimi, Bipin Rajendran. 1-5 [doi]
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• An Efficient Hardware Implementation of Improved Plantard Mod-Multiplication for Lattice-Based CryptographyMengxue Li, Jiansheng Chen, Bei Wang, Fei Lyv, Weiqiang Liu 0001, Yijun Cui. 1-5 [doi]
• A Hierarchical Compilation Method for Programmable Analog-to-Digital Converter ArraysZhishuai Zhang, Siyu Huang, Yi Zhong, Nan Sun 0001, Lu Jie 0001. 1-4 [doi]
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• A Total Noise Power Based Digital Calibration Method for Continuous-Time Delta-Sigma ModulatorsZhuojian Yao, Haikun Jia, Lilan Yu, Junfeng Liu, Yu Fu, Wei Deng 0001, Baoyong Chi. 1-5 [doi]
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• Monitoring Plant Growth: Using EM Waves With Memristive Echo State NetworksVineeta Vasudevan Nair, Jazim Ibrahim, Elizabeth George, Alex James. 1-5 [doi]
• Crosstalk Attack Resilient RNS Quantum AdditionBhaskar Gaur, Himanshu Thapliyal. 1-5 [doi]
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• A Hardware-Software Co-Design Platform to Evaluate SNN Workloads for ReRAM-based IMCNirmal Shah, Jayatika Sakhuja, Udayan Ganguly, Sandip Lashkare, Laxmeesha Somappa. 1-5 [doi]
• Efficient Image Compression through Extreme Image RescalingJiancong Chen, Yixuan Li, Peilin Chen 0001, Shiqi Wang 0001, Zhu Li 0001. 1-5 [doi]
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• A Reconfigurable Regulating Rectifier with a Maximum VCR of 3.66 for 402MHz Wireless Power Transfer SystemGuoao Liu, Lai Jiang, Jinge Ma, Yuanqi Hu. 1-5 [doi]
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• A Unified FFT/NTT Design for Efficient NTRU Equation Solving in FALCON CryptographyJun-Hao Liao, Kuan-Ting Cho, Ming-Der Shieh. 1-5 [doi]
• A DC-Coupled Neural Recording Analog Front-End with Bi-Level Bulk Modulation-Based EDO Compensation in 40nm Bulk CMOSArnau Diez-Clos, Xiaohua Huang, Bert Monna, Dante G. Muratore. 1-5 [doi]
• MTJ based Temperature-Adaptive VCO (TAVCO) for Compensating CP-PLL Frequency DriftYongliang Zhou, JingXue Zhong, Yingxue Sun, Chengxing Dai, Weizhe Tan, Chunyu Peng, Wenjuan Lu, Xin Li 0099, Zhiting Lin, Xiulong Wu. 1-5 [doi]
• A High-Efficient DC-DC Buck Converter with Adaptive Constant On-Time ControlJiaxiu Xu, Yun Fang, Shengjian Zhang, Chun Zhao, Hao Gao 0001. 1-5 [doi]
• Low Power and High Efficiency Power Management Circuits Based on Flexible LTPO Technologies for Wearable ApplicationsYunxi Gou, Xuguang Sun, Leilai Shao, Xiaolei Zhu. 1-5 [doi]
• Area-Efficient FPGA Architectures for Multidimensional DCT using Approximate Transforms and ComputingPathmapirian Nanthakumar, Chamith Wijenayake, Chamira U. S. Edussooriya, Arjuna Madanayake, Renato J. Cintra. 1-5 [doi]
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• A Current-Driven Potentiostat Architecture for Achieving Stability Over a Wide RangeJoydeep Mahato, Eslavath Chandrababu, Ashis Maity, Karabi Biswas. 1-5 [doi]
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• Precision-Factored Systolic Arrays: Balancing Accuracy and Efficiency in Floating-Point Computations for CNNsDantu Nandini Devi, Madhav Rao. 1-5 [doi]
• Constant-Power Constant-Voltage Charging Protocol Based on a Four-Phase Interleaved Buck Converter for Electric Vehicle BatteriesEl Nouha Mammeri, Oswaldo Lopez-Santos, Abdelali El Aroudi, Luis Martínez-Salamero. 1-5 [doi]
• Optimized and Reconfigurable Hardware Design for ASCON AEAD and Hash StandardsIslam Elsadek, Eslam Yahya Tawfik. 1-5 [doi]
• Machine Learning for Improving Timing AccuracyMohamed Amine Riahi, Sani Nassif, Norbert Wehn. 1-4 [doi]
• APCer: An Agile Physical Compiler for Multi-Port Register FileNa Bai, Tianbo Ming, Biwei Liu, Yaohua Xu, Yi Wang 0073. 1-5 [doi]
• Long-Short-GNN: A Novel Graph Neural Network for Detecting FPGA IP Circuits for Hardware AssuranceHeyi Zhang, Tong Lin 0001, Feng Ji, Deruo Cheng, Yiqiong Shi, Bah-Hwee Gwee. 1-5 [doi]
• A 5.8-GHz 4.8-mW -247.1dB-FoM DTC-free Sampling ∆Σ Fractional-N PLL with Embedded Phase InterpolationYe Wang, Jingcheng Tao, Chun-Huat Heng. 1-5 [doi]
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• Efficient Self-Adaptive Pseudo-Resistor with Rapid Settling and High Linearity for Neurorecording Front-End CircuitsHui Wu, Ziqi Tan, Xing Liu, Jinbo Chen, Wenjun Zou, Qiming Hou, Siyu Lin, Yutao Mao, Xiaofei Kuang, Jie Yang, Mohamad Sawan. 1-5 [doi]
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• EEPNet: Efficient Edge Pixel-based Matching Network for Cross-Modal Dynamic Registration between LiDAR and CameraYuanchao Yue, Hui Yuan, Shuai Li, Qi Jiang. 1-5 [doi]
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• Data-Driven Modeling of the Koopman-Oriented Chua Circuit Based on Reservoir ComputersGülnur Yilmaz Bingöl, Enis Günay. 1-5 [doi]
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• Analysis of Sub-Sampling PLL False Lock and Lock-in Range EstimationWenzhe Chen, Tian Xia 0005. 1-5 [doi]
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• A Wideband Open-Loop Residue Amplifier for a 7-bit 10GS/s Two-Step Flash ADC in 22nm SOI CMOS ProcessJenny Lichtenstein, Äantas Kesten, Friedel Gerfers. 1-5 [doi]
• 98.9% Efficiency Fully-integrated GaN Driver for Underwater Wireless Charging ApplicationTzung-Je Lee, Yi-Ting Deng, Jyu-Heng Chen. 1-4 [doi]
• A Pre-charge based Data Cell Dynamic Reference Sensing Scheme for Reliable Read Operations in STT-MRAMKyongsoo Kim, Taehwan Kim, Jongsun Park 0001. 1-5 [doi]
• Ultra-Low-Power Low-Frequency CMOS Integrated Oscillators for Energy-Efficient IoT DevicesSrayan Sankar Chatterjee, Joydeep Basu. 1-5 [doi]
• A Hardware Architecture for Efficient Adaptive Threshold-Based Sampling using Weyl's DiscrepancyAnna Werzi, Simon Dorrer, Bernhard Alois Moser, Michael Lunglmayr. 1-5 [doi]
• Function-Reused Oscillator-PA for IoT ApplicationsJiawen Chen, Kai Xu, Robert Bogdan Staszewski. 1-5 [doi]
• Design of a spurious-free VCO-ADC for AudioAndrés Quintero, Carlos Perez, Pedro Amaral, Dietmar Straeussnigg, Andreas Wiesbauer. 1-5 [doi]
• A Memory-Based Continuous-Flow FFT Processor with a Conflict-Free In-Place Addressing Scheme Supporting Composite Power PointsChih-Chia Chang, Hung-Shu Yu, Pei-Yun Tsai 0001. 1-5 [doi]
• A Fully Flexible Temperature Sensor for Wearable ApplicationsMaxx A. Seminario, Ayden Uerling, Sina Balkir, Michael W. Hoffman, Joseph A. Schmitz, Eric J. Markvicka. 1-5 [doi]
• Cross-Space Alignment-based Attribute Artifact Removal for V-PCCYu Liu, Mingfei Hu, Qiang Zhu, Zeliang Li, Siu-Kei Au-Yeung, Shuyuan Zhu, Lihuo He, Fan Zhang 0017. 1-5 [doi]
• C-Arch: Chained Architecture towards Foundation Modeling of CMOS/FinFET Circuit DesignsRitwik Basyas Goswami, Mohammad Rehan Akhtar, Andleeb Zahra, Zia Abbas. 1-5 [doi]
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• Kung-Fu: An Energy-Efficient Compute-In-Memory Approach for Neural Network Inference Using Multi-Level Binary Computing FusionTianyu Liao, Yiming Chen, Wenjun Tang, Zhonghao Chen, Yu Wang 0002, Huazhong Yang, Xueqing Li 0002. 1-5 [doi]
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• Live Demonstration: A Frame-Based CMOS Vision Sensor with High Dynamic Range for Events GenerationMarko Jaklin, Daniel García-Lesta, P. López, Víctor M. Brea 0001. 1 [doi]
• A Single-Inductor Multi-Ratio Resonant Ladder dc-dc Converter Achieving > 80% Efficiency over 0.4-to-1.4V Output Voltage RangeLoai G. Salem. 1-5 [doi]
• Enhanced Tower Field Mask Scheme with Affine Transformation-based Dynamic S-boxThai-Ha Tran, Duc-Thuan Dam, Van-Phuc Hoang, Trong-Thuc Hoang, Cong-Kha Pham. 1-5 [doi]
• A 103.9-dB SNDR 5-kHz BW Continuous-Time Dynamic Zoom ADC with Switched Resistor Technique for Reducing Thermal NoiseJaedo Kim, Taehun Kim, Yeonhong Kim, Jeongjin Roh. 1-5 [doi]
• Control Loop Architectures for High-Frequency Switching-Mode DC-DC Buck ConvertersFilippo Boera, Elisabetta Moisello, Cristian Garbossa, Edoardo Bonizzoni. 1-5 [doi]
• Passive-Integrated Two-Port-Quasi-Reflectionless RF Bandpass Filters With Beyond-3-dB-Bandwidth Flat Group DelayNasrin Iranpour, Li Yang 0011, Roberto Gómez-García, Xi Zhu 0001. 1-5 [doi]
• FPGA-Par: An Efficient Algorithm for Elegant Partitioning in Multi-FPGA SystemsHengyue Gao, Chenyang Dai, Jinlun Ji, Bin Yan, Qiyue Zhao, Jiangtao Yuan, Feng Li, Li Li, Yuxiang Fu. 1-5 [doi]
• A Multi-Channel Auditory Signal Encoder with Adaptive Resolution Using Volatile MemristorsDongxu Guo, Deepika Yadav, Spyros Stathopoulos, Mingyi Chen, Themis Prodromakis, Shiwei Wang 0001. 1-5 [doi]
• A 172.1dB-FoM 19.5kHz-BW DT ΔΣ ADC Using CLS-Assisted Fast Self-Quenching Floating Inverter Amplifier with Sampling Noise CancellationXiming Wang, Yo Kumano, Tomohiro Nezuka, Yoshikazu Furuta, Tetsuya Iizuka. 1-5 [doi]
• Feature Perturbation Agent based Adversarial Attack Method for Weakly Supervised Video Anomaly DetectionZhen Yang, Yuanfang Guo, Ruijie Yang, Di Huang 0001, Jiantao Zhou 0001. 1-5 [doi]
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• CDM-QTA: Quantized Training Acceleration for Efficient LoRA Fine-Tuning of Diffusion ModelJinming Lu, Minghao She, Wendong Mao, Zhongfeng Wang 0001. 1-5 [doi]
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• Ultra-low Power Current Mode Distance Calculation Circuit for K-Means ClusteringNishant Biyani, Dimitar Dimitrov, Aatmesh Shrivastava. 1-5 [doi]
• Classification-Based False Alarm Suppression for SAR Target DetectionNan Yang, Libo Huang, Zhulin An, Yongjun Xu 0001, Xia Hong, Wing-kuen Ling. 1-5 [doi]
• An Always Dual-Path Hybrid DC-DC Converter with Multiphase Interleaving Switched-Capacitor Cell Obtaining 45% Output Ripple ReductionZhewen Yu, Junwei Huang, Zhiguo Tong, Mo Huang, Rui Paulo Martins, Yan Lu 0002. 1-5 [doi]
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• 15-40 GHz Broadband Variable Gain Amplifier with 24.5 dB Linear-in-Decibel Gain Control Range in SiGe BiCMOSXun Chen, Jonas Winkelhake, Muh-Dey Wei, Renato Negra. 1-4 [doi]
• Outdoor Check Stop HAZMAT Placard Detection Using Synthetic Images and YOLOv5-SmallRiel Castro-Zunti, Juan Yepez, Seok-Bum Ko. 1-5 [doi]
• A Novel Methodology for Obstructive Sleep Apnea Detection from ECG using Deep Learning ApproachRashmi Kumari, Prateek Agrawal, Surita Sarkar, Pabitra Das, Amit Acharyya. 1-5 [doi]
• A SHA-Less Front-end Stage Structure Suitable for Time-Interleaved Pipeline ADCMeng Ni, Peng Wang, Fule Li, Hanjun Jiang, Zhihua Wang. 1-5 [doi]
• Efficient Layered New Bit-Flipping QC-MDPC Decoder for BIKE Post-Quantum CryptographyJiaxuan Cai, Xinmiao Zhang 0001. 1-5 [doi]
• Multi-Level Analog Computing-In-Memory FeFET-based Unit Cell for Deep LearningÓscar Pereira-Rial, Hannes Dahlberg, Daniel García-Lesta, Víctor M. Brea 0001, P. López, Diego Cabello, Lars-Erik Wernersson. 1-5 [doi]
• High-Speed VGSOT-MRAM Design for Non-Volatile Cache MemoriesXianzeng Guo, Chao Wang, Luman Xiang, Zhaohao Wang. 1-5 [doi]
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• A Highly-Integrated 64-QAM Ku-Band Transceiver in SiGe BiCMOS for 6G Cell-Free MIMOAxel Engelhardt, Finn Stapelfeldt, Meghana Kadam, Paulo Oliveira, Hans-Dieter Wohlmuth, Vadim Issakov. 1-5 [doi]
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• Live Demonstration: Event-based Learning in Spiking Networks on Analog Hardware using JAXElias Arnold, Eric Müller 0001, Johannes Schemmel. 1 [doi]
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• An Event-Driven Load Regulation Enhanced LDO IC with 9.2fs-Transient-FoM and 1.6µA-Quiescent Current for Low Voltage IoT ApplicationsDehong Wang, Siyao Cao, Mengyu Li, Shiwei Wang 0001, Xiaopeng Yu 0002, Zhichao Tan, Menglian Zhao, Shuang Song 0003. 1-5 [doi]
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• Live Demonstration: RF Frame Detection Using YOLOv8 for Spectrum SensingA. Rojas, Gustavo Liñán Cembrano, Gordana Jovanovic-Dolecek, J. M. de la Rosa. 1 [doi]
• Live Demonstration: Improving efficiency of speech recognition with neuro-inspired units on AIU SpyreYannick Schnider, Thomas Ortner, Stanislaw Wozniak, Alberto Mannari, Angeliki Pantazi. 1 [doi]
• Digital Twin Assisted Performance Aware Power Management for FPGA MPSoC using High Speed Reinforcement LearningKartik Laad, Ratnala Vinay, Parveen Nisha, Vidhumouli Hunsigida, Appa Rao Nali, Amit Acharyya. 1-5 [doi]
• Towards spiking analog hardware implementation of a trajectory interpolation mechanism for smooth closed-loop control of a spiking robot armDaniel Casanueva-Morato, Chenxi Wu, Giacomo Indiveri, Juan Pedro Dominguez-Morales, Alejandro Linares-Barranco. 1-5 [doi]
• A Low-Power Analog Hardware Sigmoid-based Neural Network for Biomedical ApplicationsVassilis Alimisis, Christos Dimas, Andreas Papathanasiou, Paul P. Sotiriadis. 1-5 [doi]
• A Fully Hardware Implemented Accelerator Design in ReRAM Analog Computing without ADCsPeng Dang, Huawei Li 0001, Wei Wang. 1-5 [doi]
• A Unified SpatioTemporal Network with Structural Pruning for Video Action RecognitionYang-Jie Chen, Rashid Ali, Hsu-Feng Hsiao. 1-5 [doi]
• High Time-Resolution PWM generator for GaN ConvertersMichelangelo Orabona, Stefano Passi, Andrea Gambero, Roberto Bardelli, Francesco D'Angelo. 1-5 [doi]
• Ceramic Fiber Interconnects Beyond 1000°C Enabled by Automatic Gain Compensated Millimeter-Wave CMOS TransceiversAbhishek Sharma, Christopher Kniss, Ratanak Phon, Rod Kim. 1-5 [doi]
• A Reconfigurable High-Dynamic Range ∆Σ Front-End with Event-Based Decimation for Bandwidth-Efficient Implantable Neural InterfacesNatalia Martínez, Juan Sapriza, Pasquale Davide Schiavone, Giovanni Ansaloni, Luke Bashford, Andrew Jackson 0001, David Atienza, Timothy G. Constandinou. 1-5 [doi]
• A Fast Transient FVF LDO With Improved Gate Buffer and Level Triggered Transient Enhancement Circuit in 22 nm processJianjun Zhu, Wanqing Wu, Haigang Feng, Songping Mai, Xian Tang. 1-4 [doi]
• In pixel VCO-based 5V 58.5μW Capacitance Sensing for Large Area Electrowetting ArraysMauricio Velazquez Lopez, Samuel Olafusi, François Berghmans, Nikolas P. Papadopoulos, Kris Myny. 1-5 [doi]
• SRIF: Energy- and Area-Efficient Soft Reset Integrate-and-Fire Neuron for High-Accuracy Spiking Neural NetworkTianci Cai, Qiqiao Wu, Yixuan Liu, Yue Cao, Yu Jiang, Keji Zhou, Jianguo Yang. 1-5 [doi]
• A Calibration Free 8-to-12 b, 1-to-20 MSPS Reconfigurable SAR ADC with Optimized Window-Switching SchemeZhong Zhang 0002, Fan Xiong, Ganping Li, Qihui Zhang, Jing Li 0022, Kejun Wu, Qi Yu 0002, Ning Ning 0002. 1-5 [doi]
• A 0.74 μJ/decision and 22.59 TOPS/W Keyword Spotting CIM Processor with Short-Current-Free Multi-level ReRAM and Adaptive-Decision-Level Nonlinear ADCDongwook Kim, Hoichang Jeong, Keonhee Park, Seungbin Kim, Sunhong An, KyuHo Lee. 1-5 [doi]
• Breaking the Trade-off Between Input Impedance and Mixer Paths in Sub-Harmonic N-Path Mixer-First RF Front-endRaviteja Kammari, Vijay Shankar Pasupureddi. 1-5 [doi]
• Hard Thresholding based Stochastic Algorithm for Distributed Sparse RecoveryKetan Atul Bapat, Shashank S, Mrityunjoy Chakraborty. 1-5 [doi]
• Analysis and Design of Bias-Current-Free Hybrid Phase-Locked Loops with Multi-Phase Time-Interleaved Phase DetectorQibang Sun, Liqun Feng, Woogeun Rhee, Zhihua Wang. 1-4 [doi]
• A 6.86mW 1.5 GS/s 9 b Pipelined SAR ADC with TDC-Assisted Residue QuantizationChenghao Zhang, Maliang Liu, Yuan Chang, Yihang Yang, Jinhai Xiao, Yintang Yang, Yuanjin Zheng. 1-5 [doi]
• A Hybrid SST-CML Full Duplex Simultaneous Bi-Directional Signaling LinkSree Kumar R. G., V. K. Surya, Nijwm Wary, Bibhu Datta Sahoo 0003. 1-5 [doi]
• Miniaturized Wirelessly-Powered Biphasic Current Stimulator for Implantable NeurostimulationChang-Chun Yang, Ming-Dou Ker. 1-5 [doi]
• A Frequency-Domain Transfer Model for Predicting FM Error of FMCW Radar Chirp GeneratorsYue Zhu, Kaige Wang, Dalin Li, Chunqi Shi, Leilei Huang, Runxi Zhang, Hao Deng, Jinghong Chen. 1-5 [doi]
• A Generic Circuit Platform of Covering All Rational Numbers for Determnistic Stochastic Computing in the Time DimensionXiangye Wei, Junjian Ma, Liming Xiu, YiMao Cai. 1-5 [doi]
• Stacked Ring Oscillator Design for Broadband Memory Testing from 3MHz to 3.7GHzJunha Lee, Dongho Shin, Kang-Yoon Lee. 1-4 [doi]
• Optimal Transport Based and Softplus Loss Functions for Anomaly DetectionKai-Lin Hu, Jian-Jiun Ding. 1-5 [doi]
• Structural Health Monitoring System using Active Ultrasonic Nodes Powered by Optical FiberSujay Hosur, Md Arifur Rahman Sarker, Ardavan Javid, Noel Christopher Giebink, Mehdi Kiani. 1-5 [doi]
• Live Demonstration: Real-Time High-Amplitude Signal Acquisition with 2-Channel Modulo ADCZeyuan Li, Wenyi Yan, Ruixiang Zhu, Lu Gan 0005, Hongqing Liu. 1 [doi]
• A 365-µW 915-MHz & 2.45-GHz Flexible Mixer-First Discrete-Time-Receiver Front-EndSandro Binsfeld Ferreira, Amir Bozorg, Filipe D. Baumgratz, Sergio Bampi. 1-5 [doi]
• A Design Study of Power-Efficient Opamp Topologies for Discrete-Time ∆Σ ModulatorsMahmoud-Ghoneim, Omar Ismail, John G. Kauffman, Maurits Ortmanns. 1-5 [doi]
• Assessing the Reusability of Cloud-Received Feature Streams on Advanced NetworksJiawang Liu, Ao Liu, Hualong Yu, Heming Sun, Lu Yu 0003. 1-5 [doi]
• A 12-bit 1-MS/s 2-bit/cycle Asynchronous SAR ADC for MEMS Inertial Sensors ReadoutAlessandro Colombi, Antonio Aprile, Daniele Gardino, Michele Folz, Edoardo Bonizzoni, Piero Malcovati. 1-5 [doi]
• LLAD: A Low-Latency Active Detection Method for High-Frequency Periodic GPIO Signals in LinuxJingtao Zhang, Long Gao. 1-5 [doi]
• N) PolynomialsD. R. Vasanthi, Daksh Sharma, Sanampudi Gopala Krishna Reddy, Madhav Rao. 1-5 [doi]
• A Method for Selecting the Wiring Direction from Terminals using a Planar Graph Drawing MethodTakuto Amari, Heihachirou Hasumi, Kunihiro Fujiyoshi. 1-4 [doi]
• A 16-channel ASIC for in-vivo measurement of pancreatic beta-cell activity and FOPP detectionMoustafa Nawito, Harald Richter 0001, Jens Anders, Joachim N. Burghartz. 1-5 [doi]
• Stream-Driven Acceleration for Embedded RISC-V SoCsJoão Maia, Ana Silveira, Gonçalo Midões, Nuno Neves 0002, Pedro Tomás, Nuno Roma. 1-5 [doi]
• Neural Network Based Digital Twin of Three-Phase InverterYaofeng Liang, Hanchen Ge, Zhicong Huang. 1-4 [doi]
• An in-memory computing circuit with carry-over thermometer coding for a hippocampus-inspired modelYuka Shishido, Tomoro Marcus Jones, Hakaru Tamukoh, Takashi Morie. 1-5 [doi]
• Self-Learning Neuromorphic Robot Based on Reward-Driven Spiking Neural NetworkNicola Russo, Thomas Madsen, Konstantin Nikolic. 1-5 [doi]
• Topology-Adaptive Design Automation for Ultra-Wideband CMOS D-Band AntennasShiqi Wang 0001, Qingfeng Zhang, Rui Pan, Yalun Li, Kai Kang, Yun Li. 1-5 [doi]
• An Area-Efficient and Bit-Width Configurable Carry-Save Adder Tree for Spiking TransformersChaoming Fang, Ziyang Shen, Fengshi Tian, Jie Yang 0033, Mohamad Sawan. 1-5 [doi]
• Your Demands Deserve More Bits: Referring Semantic Image Compression at Ultra-low BitrateChenhao Wu, Qingbo Wu 0001, Haoran Wei, Shuai Chen, Mingzhou He, King Ngi Ngan, Fanman Meng, Hongliang Li 0001. 1-5 [doi]
• The Algorithmic and Architectural Optimizations for Highly Efficient Tensor Decomposition EnginesI-Ting Tsai, Chung-An Shen. 1-5 [doi]
• A 5V-to-0.8V Inductor-First 2L2C Multi-Path Hybrid DC-DC ConverterYasi Hu, Junwei Huang, Chi-Seng Lam, Mo Huang, Rui Paulo Martins, Yan Lu 0002. 1-5 [doi]
• MonoSparse-CAM: Efficient Tree Model Processing via Monotonicity and Sparsity in CAMsTergel Molom-Ochir, Brady Taylor, Hai (Helen) Li, Yiran Chen 0001. 1-5 [doi]
• PQA-FGS: Piecewise Quadratic Approximation with Fine-grained Segmentation for High-Precision Non-linear ComputationLianghua Quan, Bei Wang, Fei Lyu, Hui Chen 0015. 1-5 [doi]
• A 48V Input Merged Cross-Connected Double Step-Down Converter with Package-Integrated GaN Switches and Silicon Controller ICHua Chen, Young-Seok Noh, Minxiang Gong, Arijit Raychowdhury. 1-5 [doi]
• A Compact Full Pipeline Architecture of SM3 Algorithm with High throughput and High EfficiencyTuo Li, Chao Cheng, Changhong Wang, Ruiting Wang, Xiaofeng Zou, Dunshan Yu. 1-5 [doi]
• A Stacked MOSFET-Based RF Switch with Inductive Biasing NetworkOguzhan Oezdamar, Valentyn Solomko. 1-5 [doi]
• A 41.7 MS/s 2.4 ps-rms-jitter Time Converter With 4-Core Interleaved Analog-Multiplexed ArchitectureFrancesco Malanga, Mehmet Caglar Koca, Mehmet Ali Uluisik, Giulia Acconcia, Ivan Rech. 1-5 [doi]
• Unified Implementation of Electrode and Coil for Inductive Coupling in biomedical applicationsPablo Perez-Nicoli, Simon Hemour. 1-5 [doi]
• A Multi-Bit PUF Architecture Using a 2T Sub-Threshold Voltage DividerMassimo Vatalaro, Raffaele De Rose, Vincenzo Maccaronio, Marco Lanuzza, Felice Crupi. 1-5 [doi]
• Granular Spintronics-based Reservoir Computing for Temporal ApplicationsOliver Fridorf, Lasse Møller Ryan Bjørnskov, Alex Jenkins, Luana Benetti, Sonal Shreya, Yasser Rezaeiyan, Tim Böhnert, Ricardo Ferreira 0003, Farshad Moradi, Hooman Farkhani. 1-5 [doi]
• iSPAZ: An Improved Switched-Capacitor Ping-Pong Voltage Generator with Auto-Zero for Ultra-Low-Power Internet of Everything SystemsMatteo D'Addato, Alessia Maria Elgani, Eleonora Franchi Scarselli, Antonio Gnudi. 1-5 [doi]
• Cross Technology Prediction for SRAM Stability AnalysisJihene Bouhlila, Rainer Buchty, Mladen Berekovic. 1-5 [doi]
• Functionalized ImmunoFET for Detection of Phosphatidyl-L-serineUtku Noyan, Sahil Shah, Pamela Abshire. 1-5 [doi]
• Enhancing HDR Video Compression based on Deep Effective Bit Depth AdaptationChen Feng 0008, Zihao Qi, Duolikun Danier, Fan Zhang 0017, Xiaozhong Xu, Shan Liu 0001, David Bull 0001. 1-5 [doi]
• Analog Softmax with Wide Input Current Range for In-Memory ComputingAradhana Dube, Paul Manea, Paolo Gibertini, Erika Covi, John Paul Strachan. 1-5 [doi]
• Mitigation of Range and Doppler Spoofing Attacks on Indoor FMCW Radars using Dual-Slope FSK-FMCW WaveformSoham Lakhote, Easha, Sumit Kumar, Gaurab Banerjee. 1-5 [doi]
• Realization of Negative Power ReactanceLi Ding, Xiaohui Qu, Chi Kong Tse. 1-5 [doi]
• EFVC: Error-Propagation-Free Neural Video Coding with Reversible TransformJunqi Liao, Li Li 0040, Dong Liu 0002, Houqiang Li. 1-5 [doi]
• 3D-Domino: Ultra-Dense High-Accuracy 3D eDRAM-ROM Compute-In-Memory Based on CAA-IGZO TFT for Edge Large-Scale Model InferenceZhuoya Wang, Wenjun Tang, Chen Jiang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li 0002. 1-5 [doi]
• A high-PSRR and low-noise CMOS-based reference with barrel shifting and notch filteringAmrith Sukumaran, Enrico Miotello, Chun-Min Zhang, Francesco Caruso, Paula Blanca Cruz, Stéphane Emery. 1-5 [doi]
• TSCIM: A 28nm Transposed Stochastic CIM Macro for On-Chip Training and InferenceYu Liu 0030, Yang Lou, Kangkang Mao, Xin Li 0099, Chenghu Dai, Xiulong Wu, Zhiting Lin. 1-5 [doi]
• Event-Triggered Control and Interactive LQR Tuning for Improved Control EfficiencyJosefredo Gadelha da Silva, José Fabiano Vellozo D'Alterio Moreira, Márcio J. Lacerda, Ariádne L. J. Bertolin, Erivelton Nepomuceno. 1-5 [doi]
• HyperGS: Efficient Real-Time 3D Gaussian Rendering Processor Through Hierarchical SortingCheng Nian, Xiaorui Mo, Jiaying Peng, Weiyi Zhang 0002, Fasih Ud Din Farrukh, Fei Chen, Chun Zhang. 1-5 [doi]
• Enhancing LLM Performance on Hardware Design Generation Task via Reinforcement LearningYifang Zhao, Weimin Fu, Shijie Li, Yi-Xiang Hu, Xiaolong Guo, Yier Jin. 1-5 [doi]
• A FPGA-based FSE Accelerator with Dynamic Table for ZSTD compressionYuna Lin, Kai Liu, Zibo Guo. 1-5 [doi]
• A Reference Double-Sampling PLL-Based Eight Phase Clock Generator Achieving 0.18mW/GHz/phase and -251.9dB FOMJitter-NSirou Li, Weijia Zeng, Kaiyun Cao, Liangjian Lyu, Chuanjin Richard Shi. 1-5 [doi]
• PDR-KAN: Pipeline-Driven Reconfigurable Accelerator for Kolmogorov-Arnold Networks with Cross-Mode Sparsity SupportWenhui Ou, Zhuoyu Wu, Yike Li, Alexandra Geciova, Zheng Wang 0027, C. Patrick Yue. 1-5 [doi]
• Harnessing Forecast Uncertainty in Deep Learning for Time Series Anomaly Detection with Posterior Distribution ScoringVan Kwan Zhi Koh, Ye Li, Ehsan Shafiee, Zhiping Lin 0001, Bihan Wen. 1-5 [doi]
• Individual optimization of FOV for vertices and side PDs of Angle Diversity Receiver for Underwater Visible Light CommunicationYusuke Kozawa, Keigo Matsunaga, Hiromasa Habuchi. 1-5 [doi]
• NAME: NoC-based Accelerators Mapping Exploration for High Performance DNN InferenceJinlun Ji, Hengyue Gao, Heng Zhang, Yuqi Lu, Kai He, YuLong Song, Wenjie Fan, Li Li, Yuxiang Fu. 1-5 [doi]
• An LPTV Programmable Bandpass True-time-delay Line Without External Clock-phase ShifterMohmad Aasif Bhat, Imon Mondal. 1-5 [doi]
• Development of Low-power and High-accuracy Wireless EEG Transmission System Using Compressed Sensing with an EEG BasisDaisuke Kanemoto, Eichi Takimoto, Tetsuya Hirose. 1-5 [doi]
• A Mixed-signal Computing-in-Memory Solver for Integer Constrained Least Square ProblemsN. V. Kidambi, W. C. Wang, D. Kim, S. Sharma, N. M. Rahman, S. Zhang, S. Mukhopadhyay. 1-5 [doi]
• Live Demonstration: Iontronic Integrated CircuitNoa Edri Fraiman, Barak Sabbagh, Gilad Yossifon, Alexander Fish. 1 [doi]
• An All-Digital Time-Domain Compute-in-Memory Engine for Convolutional Neural Networks in 22nmJie Lou, Florian Freye, Christian Lanius, Tobias Gemmeke. 1-5 [doi]
• Noise-Induced Simultaneous Firing in Uncoupled Leaky Integrate-And-Fire CircuitsAkio Takada, Tadashi Tsubone. 1-5 [doi]
• Live Demonstration: A High-Resolution Plantar Insole System for Lower Body EstimationJunjian Chi, Qingyu Zhang, Zibo Zhang, Andreas Demosthenous, Yu Wu 0007. 1 [doi]
• Multi-Attribute Continual Learning for Blind Image Quality AssessmentYunhao Luo, Jinming Liu, Wei Zhou, Xin Jin. 1-5 [doi]
• An OTA with Series-Cascode-Miller Compensation and Anti-Pole-Splitting for a 360-MHz BW Low-Distortion TIA in Sub-6G Broadband RF ReceiversJunyao Ji, Yan Xue, Xiaojie Fan, Ziyu Zhou, Bo Wang, Youxiang Chen, Peiyu Li, Ruibai You, Hong Zhang. 1-5 [doi]
• Simultaneous Series-Parallel High-Speed and Accurate Active Cell Balancing for Improved Battery LifeArghadeep Sarkar, Rashi Dutt, Amit Acharyya. 1-5 [doi]
• Time Domain Multiplexing for Equalized Vibration in Miniaturized Electromagnetic Tactile PixelsShamin Sadrafshari, Hussein Musa, Pejman Mohammadi 0002, Ali Mohammadi. 1-5 [doi]
• Upsampling Improvement for Overfitted Neural CodingPierrick Philippe, Théo Ladune, Gordon Clare, Félix Henry, Théophile Blard, Thomas Leguay. 1-5 [doi]
• A Novel Efficient Stochastic Gradient Descent based MIMO Detector with Noise-Free InitializationYa Gao, Yubin Zhu, Ruobing Yang, Kaining Han, JianHao Hu. 1-5 [doi]
• Optimizing Sparse/Dense VEGETA Accelerator Performance with Microscaling QuantizationKazi Barria Nine, Connor Talley, Ajay Sharma Mandadi, Tushar Krishna, Arijit Raychowdhury. 1-5 [doi]
• A Low Power Integrate-and-Fire Neuron Circuit Using an a-IGZO-based Thin-Film Transistor with an Inverter Transition Point Programming MethodYumin Yun, Chanjin Park, Junhyeong Park, Soo-Yeon Lee. 1-5 [doi]
• A Cryogenic High Voltage Analog Switch for Trapped Ion Quantum ComputersMohammad Abu Zahra, Jens Repp, Michael Sieberer, Matthias Brandl, Ralf Brederlow. 1-5 [doi]
• A High-Speed 8-bit Single-Channel SAR ADC with Tailored Bit IntervalsXinyu Li, Ruida Wang, Mengying Zhang, Congyi Zhu, Zhongfeng Wang 0001, Jun Lin 0001. 1-5 [doi]
• Background Calibration for Mixed Mismatches in TIADC Using Taylor-Volterra-Series-Based ModelSong Wang, Xu Cheng 0002, Ziyu Guo, Jun Han 0003. 1-5 [doi]
• Learning-Based Realtime Synthetic Aperture Radar Imaging for Embedded System on SatelliteTianyang Yu, Bi-Wu, Weiqiang Liu 0001. 1-5 [doi]
• A Threshold-Voltage Compensation Circuit for Organic Thin-Film Transistor Active-Matrix Neurostimulation SystemShikai Wang, Bowen Liu, Xueqing Li 0002, Huazhong Yang, Yongpan Liu, Chen Jiang. 1-5 [doi]
• Live Demonstration: AI-Assisted High-Level Design of Sigma-Delta ModulatorsP. Manrique-Merchán, G. Liñán-Cembrano, J. M. de la Rosa. 1 [doi]
• A 1Mb RRAM Macro with Bipolar Forming for Improved Programming Yield and Cell-by-cell Write Verification SchemeByungkwon An, Junjie Mu, Putu Andhita Dananjaya, Weng Hong Lai, Wen Siang Lew, Tony Tae-Hyoung Kim. 1-5 [doi]
• A Class-AB Slew Rate-Enhanced OTA for Triboelectric Sensing Interfaces in Smart TextilesAlessandro Fortunati, Elisabetta Moisello, Emmanuele Mozzorecchia, Emanuele Quartieri, Antonio Aprile, Edoardo Bonizzoni, Piero Malcovati. 1-5 [doi]
• Design Considerations for a Closed-loop Digital Class-D Audio AmplifierAnanya Senapati, Nagendra Krishnapura. 1-5 [doi]
• FPGA-Based Hardware Architecture for Sequence Alignment by Genetic AlgorithmLaura H. Garcia, Arkan Alkamil, Mokhles A. Mohsin, Johannes Menzel, Darshika G. Perera. 1-5 [doi]
• Incremental Delta-Sigma ADC with Reduced Conversion Cycles via Quantization-SkipAmgad Ghonem, Amine Bermak, Bo Wang 0012. 1-4 [doi]
• A Highly PVT Invariant Low Power Scalable Analog Dynamic Current-Mode Translinear Matrix-Vector MultiplierGeorgios Gennis, Bouchaib Cherif, Shashank Bansal, Jiahao Song, Johannes Leugering, Gert Cauwenberghs. 1-5 [doi]
• Instruction Level Parallelism Optimizations in a High-Performance Dual-Issue RISC-V Processor for Real-Time Control SystemsQingchen Zhai, Weiying Wang, Yueyue Wang, Yuanyang Xiang, Chen Xu, Kunyu Zong, Ruozhou Xiao, Zhiwei Zhang. 1-5 [doi]
• SSRNet: Few-shot IC Segmentation in Automated PCB Image ProcessingYuhang Wang, Xinrui Wang 0004, Deruo Cheng, Tong Lin 0001, Feng Ji, Yiqiong Shi, Bah-Hwee Gwee. 1-5 [doi]
• Differentiable VMAF: A trainable metric for optimizing video compression codecJiangchuan Li, Chuqin Zhou, Yunuo Chen 0002, Guo Lu. 1-5 [doi]
• Dynamic ADC and Equalizer Adaptation with Background SNR Monitoring for a DSP-Based PAM-4 ReceiverYou-Cheng Tu, Rui-Yong Kuo, Wei-Zen Chen. 1-5 [doi]
• A Dynamic Biasing Circuit for Low-Power Push-Pull Input BufferRui Zhang, Yidong Yuan, Peng Wang, Lingxiao Shen, Fule Li, Zhihua Wang, Yi Hu, Zhenguo Li. 1-4 [doi]
• Hardware Security Chip Based on PUF Technology for Real-time Respiratory Disease Diagnosis System ProtectionHsiao-Chi Lin, Meng-Ting Wan, Xiang-Yuan Deng, Sing-An Chiu, Chia-Yu Yeh, Wai-Chi Fang. 1-5 [doi]
• GASA: Rank-Sliced GAther-Scatter Activations and Application to Sparsity-Preserving Parameter-Efficient Fine-TuningH. T. Kung 0001, Andrew Sabot. 1-5 [doi]
• A Digital Neuromorphic Architecture for Unsupervised Shortest Path Computation on Real-World GraphsArghavan Mohammadhassani, Shadi Matinizadeh, M. Lakshmi Varshika, Anup Das 0001. 1-5 [doi]
• An Effective Digital Calibration Method Based on Volterra Neural Network for Pipeline ADCsYuguo Xiang, Danfeng Zhai, Junyan Ren, Fan Ye 0001. 1-5 [doi]
• Legalization Framework with Design Rule Constraints Enhanced by Monte-Carlo-Based Cell Priority OptimizationBenchao Zhu, Guohao Chen 0001, Jiawei Li, Peng Zou, Haokai Sun, Zhifeng Lin, Jianli Chen. 1-5 [doi]
• Kyber-KEM-Ascon: Benchmarking a Lightweight Post-quantum KEM on IoT DevicesSahar Shehzadi, Nathan Whaley, Ayesha Khalid, Abdul Ghafoor, Sadiqa Arshad, Faiz Ul Islam, Máire O'Neill. 1-5 [doi]
• Kalman Filtering based Target Tracking for Multistatic Sensing in ISAC SystemsQuan Yuan, Shun Zhuge, Zhiping Lin 0001, Yugang Ma, Yonghong Zeng. 1-5 [doi]
• NeuroEye: A 54.59mW, 12200FPS Event-Driven Near-Sensor Eye-Tracking Processor with Pipelined Spatial-Temporal Spike-StreamingJiakun Zheng, Fengshi Tian, Jinbo Chen, Chaoming Fang, Yuan Yao, Jie Yang 0033, Mohamad Sawan, Kwang-Ting (Tim) Cheng, Chi-Ying Tsui. 1-5 [doi]
• Mitigation of Vertical Fixed Pattern Noise in CMOS Image Sensors through Analog Offset Dithering and Dynamic Clock AdjustmentJaejin Jung, Sungyong Kim, Shinhwan Lim, Kyoungmin Koh, Hae-Seung Lee. 1-5 [doi]
• Low Matchline Voltage Swing Content-Addressable Memory CellCristhopher Mosquera, Ramiro Taco, Benjamin Zambrano, Luis-Miguel Procel, Esteban Garzón, Marco Lanuzza. 1-5 [doi]
• Reconfigurable Image Acquisition and Processing Subsystem for MPSoCsMohamed Soliman, Antti Nurmi, Syed Mohsin Abbas. 1-5 [doi]
• In-Memory Logic Synthesis Methods based on Read Decoupled 8T and Transpose 11T SRAMsFeng Wei, Xiaole Cui, Sunrui Zhang. 1-5 [doi]
• Low-power StrongARM Comparator Exploration for Sub-3nm Technology NodeXuan Wu, Kristof Dens, Gioele Mirabelli, Francky Catthoor, Patrick Reynaert. 1-5 [doi]
• Objective Quality Assessment of Full-Scene Resampling-based Coding for VVC StandardKra Tchimbié Koffi, Thomas Amestoy, Elie Mora, Anissa Mokraoui. 1-5 [doi]
• Scalable and Real-Time Power System Simulation Based on Heterogeneous CPU-FPGA Co-operationHangyu Yang, Jiyuan Liu 0006, Mingwang Xu, Wei Gu, Yongming Tang, He Li 0008. 1-5 [doi]
• Interlaced 6T-10T CMOS in-memory computing circuit for low silicon area pipelined DNNsGinés Doménech-Asensi, Francisco Javier Andreo-Oliver, Ramón Ruiz Merino, José Ángel Díaz-Madrid. 1-5 [doi]
• Mixed INT4-INT8 LLM Quantization via Progressive Layerwise Assignment with Dynamic Sensitivity EstimationJihoon Kim, Minseok Seo, Xuan Truong Nguyen. 1-5 [doi]
• 2 26.7nW 8-bit 100kS/s SAR ADC with Hybrid C-CI DACKyungmin Lee, Seungjun Song, Hyungil Chae. 1-4 [doi]
• Use or Produce - Carbon Impact of a Video Streaming DevicePierre Le Gargasson, Olivier Weppe, Thibaut Marty, Maxime Pelcat, Daniel Ménard, Christian Herglotz. 1-5 [doi]
• APCPU: Adaptive-Pooling Compression Processing Unit for Energy-Efficient DNNs ProcessingWang Wang, Wending Zhao, Manni Li, Zixu Li, Jiayu Yang, Zijian Huang 0017, Yinyin Lin, Chengchen Wang, Xiankui Xiong. 1-5 [doi]
• N-MUX: Neighborhood-Based Logic Locking Against Machine Learning AttacksHan Zhang, Xuenong Hong, Shirui Sheng, Juncheng Chen, Nay Aung Kyaw, Kwen-Siong Chong, Zhiping Lin 0001, Bah-Hwee Gwee. 1-5 [doi]
• Alternating Greedy Schedules: Enabling Low-Bitwidth Accumulation of Dot Products in Neural Network ComputationsVikas Natesh, H. T. Kung 0001. 1-5 [doi]
• Grouped Transform for Ultra-Low-Complexity Learned Image CompressionWen Tan, Youneng Bao, Fanyang Meng, Yongsheng Liang 0001. 1-5 [doi]
• A Low-Power BJT-Based Temperature Sensor with Wide Range and High ResolutionTongyu Luo, Lin Peng, Bincheng Lei, Yubin Xu, Hen Jiang, Hanjie Cai, Yongfu Li, Yanhan Zeng. 1-5 [doi]
• An EF-CIFF Noise-Shaping SAR ADC with A Joint Dynamic Amplifier, Comparator and Lossless Passive Summer StructureYuzhi Ai, Yuekang Guo, Zhengyuan Lou, Hui Zhang, Jing Jin 0005, Jianjun Zhou. 1-5 [doi]
• Trade-offs in Cryptosystems by Boolean and Quantum CircuitsLeonardo Lavagna, Francesca De Falco, Andrea Ceschini, Antonello Rosato, Massimo Panella. 1-5 [doi]
• A 0.22 pJ/bit Processing-in-Controller GEMV Macro with Weight Prefetch for Efficient Near-Memory ComputingJie Yang, Jiapei Zheng, Siqi He, Lizhou Wu, Chen Mu, Haozhe Zhu, Liyu Lin, Qi Liu 0010, Chixiao Chen. 1-5 [doi]
• Compact High-Voltage Switched-Capacitor Driver for MEMS ActuatorsQishen Fang, Feiyu Li, Man Kay Law. 1-5 [doi]
• MiNL: Micro-Images based Neural Representation for Light FieldsHanxin Zhu, Henan Wang, Zhibo Chen 0001. 1-5 [doi]
• Variation-Adaptive Negative Bitline and Skip Bitline Pre-charge Scheme for Low-Power SRAMLishuo Deng, Changwei Yan, Yiran Zhang, Xin Si, Weiwei Shan. 1-5 [doi]
• Live Demonstration: Crowdsourcing Cardiopulmonary Sound Labeling via Gamified Interactive Learning (HEALSound)Xuya Jiang, Changyan Chen, Yichen Long, Huajie Huang, Qing Zhang 0008, Yuhang Zhang 0008, Jian Zhao 0004, Rui Pan, Yongfu Li 0002. 1 [doi]
• CleanUMamba: A Compact Mamba Network for Speech Denoising using Channel PruningSjoerd Groot, Qinyu Chen, Jan C. van Gemert, Chang Gao 0002. 1-5 [doi]
• 2 Spin/Area Large Scale Ising CIM with Progressive Circular Dataflow and Bi-directional eDRAM Cell ArrayJingu Lee, Sangwoo Ha, Sunjoo Whang, Soyeon Kim, Sangjin Kim, Soyeon Um, Wooyoung Jo, Hoi-Jun Yoo. 1-5 [doi]
• Exploring Possibilities of BFV-based Homomorphic Encryption for Privacy-Preserving Image ProcessingArdianto Satriawan, Rella Mareta, Hanho Lee. 1-5 [doi]
• Compensation of Excess Loop Delay in Continuous-Time Incremental ∆Σ ADCsPaul Kaesser, Omar Ismail, Joachim Becker, Maurits Ortmanns. 1-5 [doi]
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• A mm-Wave Coupler-based Dual-band Power Amplifier for Advanced Driver Assistance SystemsZhongzhiguang Lu, Yanshu Guo, Yange Wang, Cao Wan, Guanghao Fan, Yuanjin Zheng. 1-5 [doi]
• Beyond Preferences: Enriching User Profiles for Effective E-commerce RecommendationsJingyu Xu, Zhengwei Yang, Zheng Wang. 1-5 [doi]
• Machine Learning-Based Design of Load-Independent WPT SystemsNaoki Fukuda, Yutaro Komiyama, Wenqi Zhu, Yinchen Xie, Ayano Komanaka, Akihiro Konishi, Kien Nguyen 0002, Hiroo Sekiya. 1-5 [doi]
• Performance of Ring Oscillators for Cryogenic Electronics Integration from 4 to 200 KConor Power, Mike Asker, Dennis Andrade-Miceli, Dirk Leipold, Imran Bashir, Robert Bogdan Staszewski, Elena Blokhina. 1-5 [doi]
• A Comprehensive Parasitic Component Model for Spiral Air-core Coils in MHz Load-Independent Single-input Multiple-output Wireless Power Transfer SystemTsukasa Yasuda, Xiuqin Wei, Weisen Luo, Hiroo Sekiya. 1-5 [doi]
• Advanced Learning-Based Coding Tools for ECM: Intra Prediction and In-Loop FilteringYanchen Zhao, Jiaye Fu, Zhaoyu Li, Qizhe Wang, Zhimeng Huang, Jiaqi Zhang, Chuanmin Jia, Siwei Ma. 1-5 [doi]
• Analysis of Calibration Requirements in Image Recognition Tasks with Time-Encoded ANNsCarlos Perez, Eric Gutierrez. 1-5 [doi]
• A 22nm All-digital Fully Synthesizable Adaptive Clock Generator for Fast Frequency Adjustment in AI ProcessorXueping Liu, Le Ye, Tianyu Jia. 1-5 [doi]
• Efficient Radar Signal Processing in ISAC: Optimizing FFT Operations with Circulant MatrixLong Yao, Yan Li, Jianxin Li, Xinyuan Yu, Ning Wei. 1-5 [doi]
• A 600-pW, 34.6 ppm/°C, -50 °C to 130 °C CMOS Voltage Reference with Leakage-Based Temperature Compensation and Supply Rejection Enhancement TechniquesI-Fan Lin, Yu-Hung Tung, Po-Hsun Chu, Yu-Te Liao. 1-4 [doi]
• Integrating Bird's Eye View Fusion and Reinforcement Learning for Efficient Autonomous Intersection NavigationAyoub Sassi, Emna Zedini, Hakim Ghazzai, Gianluca Setti, Marouane Kessentini. 1-5 [doi]
• Self-Powered and Self-Sensing Floor Tiles and Fall Detection SystemGongwei Wang, Junrui Liang. 1-5 [doi]
• ASP: A daptive Sparse LUT-based Bit-Slice Accelerator for Efficient CNN InferenceYueting Li, Yulong Qiu, Amara Amara. 1-4 [doi]
• A 40nm STT-MRAM Near-Memory Computing Macro for Memory-Augmented Neural Network AccelerationHongrui Meng, Yajun Wu, Shengchao Zhou, Zizhao Ma, Tai Min, Shaohao Wang, Yufeng Xie. 1-5 [doi]
• A -44dB PSRR Analog Nested Digital Low Dropout Regulator for SoC applications in CMOS 28nmStefano Bonomi, Werner Grollitsch, Sie Boo Chiang, Roberto Nonis. 1-4 [doi]
• Optimal SVG Configuration for Enhancing Transient Voltage Stability in Power Systems with High Penetrations of Renewable EnergyWenshuang Liu, Jie Yang, Xi Zhang, Kui Luo, Tiezhu Wang, Liangyi Zhang, Shouxiang Li, Maobin Lu. 1-5 [doi]
• Global-Local Similarity for Efficient Fine-Grained Image Recognition with Vision TransformersEdwin Arkel Rios, Min-Chun Hu 0001, Bo-Cheng Lai. 1-5 [doi]
• CANet: Cellular Aggregation Network for Point Cloud Quality AssessmentLingxia Jiang, Jian Xiong 0005, Chao Zhang, Jiucheng Xie, Hao Gao 0005. 1-5 [doi]
• A 0.93 nW/node Ultra-Low Power Oscillatory Neural Network using BTBT-based OscillatorsAbhinav Thaduri, Abhishek A. Kadam, Laxmeesha Somappa, Udayan Ganguly, Maryam Shojaei Baghini. 1-5 [doi]
• A Digital Jitter Correction Technique For High-Speed ADC-Based Communication LinksTim Borremans, Jun Feng, Jonah Van Assche, Georges G. E. Gielen, Filip Tavernier. 1-5 [doi]
• Multi-Agent Proximal Policy Optimization Applications in Low-Dropout Regulator DesignThang Nguyen Quoc, Lihong Zhang, Octavia A. Dobre, Trang Hoang 0001, Trung Q. Duong. 1-5 [doi]
• Efficient Multiple-Precision Floating-Point Multiply-Add Architecture for Deep Learning ApplicationsSongtai Liang, Bingjie Xia, Wen Wang 0015, Xiaoxia Han, Peng Liu. 1-5 [doi]
• A Conversational Agent based on Large Language Models for Fault Recovery Planning GenerationWensi Zhang, Tiechui Yao, Fei Zhou, Hongyang Jin, Jinbo Liu, Zihao Wan, Chunyu Liu, Yishen Wang, Bo Chai, Xi Chen. 1-5 [doi]
• A 112Gb/s Analog-MUX-based PAM-4 Transmitter with Inherent 2-tap FFE in 65nm CMOSZiyi Lin, Haikun Jia, Shitu He, Wei Deng 0001, Chang Liu, Ruiheng Qiu, Chen Wang, Baoyong Chi. 1-4 [doi]
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• DCHAS: Dual-Channel Heterogeneous Agent System for Optimizing Agricultural Irrigation DecisionsBuwen Liu, Liruizhi Jia, Shengquan Liu, Bo Kong, Xiaoli Zhang, Guangxin Yu. 1-5 [doi]
• A Programmable-Gain Floating Inverter Low-Noise Amplifier for Ultrasound Imaging Analog FrontendsDiogo Dias, Tiago L. Costa, João Goes. 1-5 [doi]
• A Digital FLL-based Adaptive Binary LDO for Implantable Medical DevicesShubham Jain, Chakri Pyla, Rajesh H. Zele. 1-5 [doi]
• Measurement and Analysis of Dynamic Energy Consumption in Microelectromechanical RelaysQi Tang, Elliott Worsey, Mukesh Kumar Kulsreshath, Yue Fan, Yingying Li, Simon J. Bleiker, Harold Chong, Frank Niklaus, Dinesh Pamunuwa. 1-5 [doi]
• Machine Learning-Driven Multiple Transform Selection for Low-Complexity VVC EncodingCaroline Camargo, Bianca Silveira, Bruno Zatt, Guilherme Ribeiro Corrêa. 1-5 [doi]
• A ±0.6 dB, 256-μW Digital-Intensive RSSI with 80-dB Dynamic-Range in 65-nm CMOSSivaiah Naali, Ravi Prakash Bisen, Raviteja Kammari, Vijay Shankar Pasupureddi. 1-5 [doi]
• Low-Complexity Combined Approximate DFT and Adaptive Beamformer for Extremely Large ArraysArjuna Madanayake, Umesha Kumarasiri, S. Sivasankar, Chamira U. S. Edussooriya, Renato J. Cintra, Chamith Wijenayake. 1-5 [doi]
• Machine Learning based Dynamic Overload Surge Protection System for Electrical AppliancesJenish Gajera, Adla Jahnavi, Nikhil Pinto, Rupinder Kaur, Arghavan Asad, Farah A. Mohammadi. 1-5 [doi]
• LineShield - A Generalized LiDAR Pipeline for Automated Vegetation Encroachment Detection on PowerlinesAziz Al-Najjar, Marzieh Amini, James R. Green, Felix Kwamena. 1-5 [doi]
• Asynchronous Architecture Design and Implementation of Physical Memory Protection for RISC-VAnping He, Yunpeng Xing, Jingye Zhong, Weimin Wang, Yinglong Li, Jun Ma. 1-5 [doi]
• An NoC-Based Latency Upper-Bound Model for Reducing Timestep Length in SNN CommunicationZiyang Kang, Shiming Li, Lei Wang 0011, De Ma, Gang Pan 0001. 1-5 [doi]
• Early Termination of the MSDF Computations towards Efficient Inference in Neural NetworksSahar Moradi Cherati, Mohsen Barzegar, Leonel Sousa. 1-5 [doi]
• ZergPPU: an evolutionary multi-mode post processor for vision neural networksWeilun Wang, Chen Chao, Zheng Wang 0027. 1-5 [doi]
• Communication Characterization of AI Workloads for Large-scale Multi-chiplet AcceleratorsMariam Musavi, Emmanuel Irabor, Abhijit Das 0002, Eduard Alarcón, Sergi Abadal. 1-5 [doi]
• A Privacy-aware Quantilisation Approach for Efficient Edge Deep Learning AcceleratorHuaizhi Zhang, Xuqi Zhu, Jiacheng Zhu, Klaus D. McDonald-Maier, Xiaojun Zhai. 1-5 [doi]
• Instantaneous Capacitance Matching based Current Response Algorithm for EM Reliability AnalysisZongfeng Ma, Zhong Guan. 1-5 [doi]
• Design of a Single-Event Upset Tolerant Low-Power Double-Tail ComparatorAhmet Cirakoglu, Alexander Serb, Khaled Humood, Mark Zwolinski, Themis Prodromakis. 1-5 [doi]
• Partitioning SFQ Circuits for Serial Biasing in Heterogeneous CircuitsTejumadejesu Oluwadamilare, Eby G. Friedman. 1-5 [doi]
• A framework for analog-digital mixed-precision neural network training and inferenceAthanasios Vasilopoulos, Emma Boulharts, Corey Lammie, Julian Büchel, Hadjer Benmeziane, Manuel Le Gallo, Abu Sebastian. 1-5 [doi]
• Fully-Integrated Differential RRAM Cell Designs with Multi-Level Capability and Enhanced Read MarginStefan Pechmann, Peter Reichel, Thorsten Spätling, Amelie Hagelauer. 1-5 [doi]
• A Reinforcement Learning-Based Retraining-Free Pruning for Encoder-Based Language ModelsBobin Xie, Renda Han, Guangzhen Yao, Haiming Li, Simeng Zhang, Yutong Chen, Sandong Zhu, Long Zhang. 1-5 [doi]
• Exploiting Approximate SRAM for Energy-Efficient Integer Motion Estimation on VVC EncodersMatheus Isquierdo, Felipe Sampaio, Bruno Zatt, Nikil D. Dutt, Daniel Palomino 0001. 1-5 [doi]
• AI-based System for Brain Tumor Segmentation and 3D VisualizationRim El Badaoui, Anandaeaswaran Brainthra, Ester Bonmati Coll, Alexandra Psarrou, Barbara Villarini. 1-5 [doi]
• Design Toolbox for sub-Nanoampere CMOS Programmable Voltage ReferencesAndrea Boni, Giorgio Bersani, Michele Caselli. 1-5 [doi]
• A Hybrid-Domain Floating-Point Compute-In-Memory Architecture for Efficient Acceleration of High-Precision Deep Neural NetworksZhiqiang Yi, Yiwen Liang, Weidong Cao. 1-5 [doi]
• Closed-Loop Neuromorphic Deep Brain Stimulation using Deep Spiking Q-NetworksBinh Nguyen, Edward Mighetto, Dylan Louie, Chunxiu Yu, Jason Eshraghian. 1-5 [doi]
• 350-fJ/spike, 30-Hz Bio-inspired Silicon Neuron Circuit in 0.2 V, 65 nm CMOSSivaiah Naali, Srikanth Vuppunuthala, Vijay Shankar Pasupureddi. 1-5 [doi]
• A One-Off-Chip-Capacitor Wireless High-Voltage Power Management Unit Generating Regulated Supplies with 80.6-dB-PSRR in Low-Voltage CMOSAnxi Hu, Yi Ding, Hongming Lyu. 1-5 [doi]
• Live Demonstration: An Area and Energy Efficient Reconfigurable Cryptographic Accelerator Based SoC Design for Securing IoT DevicesXvpeng Zhang, Bingqiang Liu, Lingyun Hu, Zixuan Shen, Zaisheng He, Dengke Xu, Bah-Hwee Gwee, Chao Wang. 1 [doi]
• Towards Battery-Less Internet of Bodies: Energy Harvester with Reconfigurable Stages Enabled by Galvanic Body-Coupled Powering for Bio-ImplantsAsif Iftekhar Omi, Adrija Mukherjee, Anyu Jiang, Baibhab Chatterjee. 1-5 [doi]
• Live Demonstration: A Photovoltaic Dynamic Vision SensorPablo Fernández-Peramo, Juan A. Leñero-Bardallo, Ángel Rodríguez-Vázquez. 1 [doi]
• Does the Maximum Stable Amplitude depend on Reconstruction Filters in Incremental ∆Σ ADCs?Paul Kaesser, Omar Ismail, Joachim Becker, Maurits Ortmanns. 1-5 [doi]
• Generalized Shifting-Based PAPR Reduction Architecture for Discrete Multitone SystemsByeong Yong Kong. 1-5 [doi]
• A Programmable Systolic-Array AI Accelerator System with High-Performance Model Quantization and Heart Disease Classification Algorithm DesignKuan-Cheng Wang, Ming-Yueh Ku, Shuenn-Yuh Lee, Ju-Yi Chen. 1-5 [doi]
• Intelligent Rapid Antenna Design with Integrated Impedance Matching Network for Wireless Communication SystemJiaoran Wang, Jungang Zhang, Yuqi Ding, M. Talha Kirimi, Nosrat Mirzai, John R. Mercer, Hadi Heidari. 1-5 [doi]
• Flexible PVDF-ZnO Composite Sensor with High Sensitivity and Piezoelectric Response for Enhanced Acoustic Emission DetectionAkshaya Muraleedharan, Swati Ghosh Acharyya, Amit Acharyya. 1-5 [doi]
• A 1.92mW 1.6-to-3.2GHz Third-Harmonic Blocker-Tolerant Receiver Front-End Using Dual Current-Reuse N-Path LNA and Band-Switchable BalunRundi Wu, Yetong Wang, Qing Li, Zongle Ma, Keping Wang. 1-5 [doi]
• Enabling Machine Learning for Power Modeling via Artificial Netlist GenerationPhilipp Fengler, Junpeng Chen, Sani R. Nassif, Ulf Schlichtmann. 1-5 [doi]
• QuickTrace: An Efficient Contour Tracing Algorithm for Defect Robustness Simulation of Silicon Dangling Bond LogicJan Drewniok, Marcel Walter, Robert Wille. 1-5 [doi]
• A High-Sensitivity and Wide-Dynamic-Range Image Sensor with Extended-Silicon Responsive Spectrum from 254 nm to 1310 nmTao Ma, Xiaoliu Liu, Xin Jin, Chao Gao, Zhou Zhou, Kai Wang, Yihong Qi. 1-4 [doi]
• A Dataset and Method for Assessing the Quality of Display DevicesYijie Huang, Haoyang Ni, Kaiwei Zhang, Fangfang Lu, Xiongkuo Min, Guangtao Zhai. 1-5 [doi]
• Design of a Low-Energy MTJ-Based Nonvolatile Register Based on a Differential Information Storing SchemeTomoo Yoshida, Masanori Natsui, Takahiro Hanyu. 1-5 [doi]
• ScatterSplatting: Enhanced View Synthesis in Scattering Scenarios via Joint NeRF and Gaussian SplattingRenrong Hu, Qianyue He, Dongyu Du, Xin Jin 0002. 1-5 [doi]
• A High-Gain Three-Stage Auto-Zeroing Residual Amplifier for High-Precision Pipelined SAR ADCXu Liu, Renjie Fu, Yiqin Chen, Hongjie Ye, Bi Wang, Zhaohao Wang, Hui Zhang. 1-5 [doi]
• Physical Design-Aware Power Side-Channel Leakage Assessment Framework using Deep LearningDipayan Saha, Jingbo Zhou, Farimah Farahmandi. 1-5 [doi]
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• Low Power Hybrid Residual Amplifier and Comparator Design based on Complementary Parametric AmplifierLei Qian, Guangzu He, Liang Qi, Yongfu Li, Yan Liu. 1-4 [doi]
• Controlled Single-Phase-Shift Modulation Method for a Fully Integrated Dual Active Bridge ConverterFrancesco Romano, Elisabetta Moisello, Alessandro Liotta, Pietro Giannelli, Giovanni Frattini, Edoardo Bonizzoni, Piero Malcovati. 1-5 [doi]
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• Improve GPGPU Front-end Efficiency Via Inter-Warp Instruction SharingYu-Yu Hsiao, Liang-Chou Chen, Chung-Ho Chen. 1-5 [doi]
• 28/39 GHz Dual-Band GaN Power Amplifier DesignSwarup Chakraborty, Tian Xia. 1-5 [doi]
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• Explaining Sigma-Delta Modulators with Pulse Frequency ModulationVictor Medina, Pieter Rombouts, Luis Hernández 0003. 1-5 [doi]
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• A Wireless Headstage Based on a 32-Channel Neuromodulator Integrated CircuitMarkus Sporer, Dominik Fritschi, Nicolas Graber, Stefan Reich, Maurits Ortmanns. 1-5 [doi]
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• A Multi-Modal Contrastive Learning Framework for Intelligent Fault Diagnosis with Enhanced Time-Frequency AlignmentXin Jiang, Depeng Kong, Haibing Yin, Xiaofeng Huang, Weiwei Zhang, Lida Yin, Hang Lu. 1-5 [doi]
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• A Fast Transitioning Power Supply Modulator of Stepped Envelope Tracking for 5G/6G Millimeter-wave Applications in 65nm CMOSVishnu S. Varma, Tharun K, T. R. Varun, Shashank Sagar, Immanuel Raja. 1-5 [doi]
• A 40 Gb/s Adaptive CTLE Using a Sub-Sampled PAM-4 Clock Recovery Circuit in 65nm CMOSAlok Kumar, Ishan Mishra, Tejavanth Kothani, Rajshekhar Mukherjee, Midhun V, Shalabh Gupta. 1-5 [doi]
• UbiMoE: A Ubiquitous Mixture-of-Experts Vision Transformer Accelerator With Hybrid Computation Pattern on FPGAJiale Dong, Wenqi Lou, Zhendong Zheng, Yunji Qin, Lei Gong, Chao Wang, Xuehai Zhou. 1-5 [doi]
• Characterisation and Data-driven Modelling of MemimpedanceGuoyang Huang, Yijia Zhang, Deepika Yadav, Yanzhen He, Alexander Serb, Shiwei Wang 0001, Themis Prodromakis. 1-5 [doi]
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• Minimizing Bit-Error-Rate by Optimizing Power Amplifier's Output Power in Wireless LinksSeungWoo Chae, Mohammad Oveisi, Payam Heydari. 1-5 [doi]
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• Advancing Autonomous Vehicle ITS with V2X and V2I Periodic CalibrationWanquan Zhang, Abubakar Yusuf, Xiaochuan Qiu, Olaoluwa Popoola, Muhammad Ali Imran 0001. 1-5 [doi]
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• A Framework for Automatic Synthesis of Neuromorphic Architectures with Heterogeneous Integration of CMOS and MemristorsSarah Johari, Arghavan Mohammadhassani, Anup Das 0001. 1-5 [doi]
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• An Efficient Multicast Addressing Encoding Scheme for Multi-Core Neuromorphic ProcessorsZhe Su, Aron Bencsik, Giacomo Indiveri, Davide Bertozzi. 1-5 [doi]
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