Pirouz Bazargan-Sabet - researchr alias

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Viewing Publication 1 - 16 from 16

2018

A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 CachesEric Guthmuller, César Fuguet Tortolero, Pascal Vivet, C. Bernard, Ivan Miro Panades, Jean Durupt, E. Beignc, Didier Lattard, Séverine Cheramy, Alain Greiner, Quentin L. Meunier, Pirouz Bazargan-Sabet. esscirc 2018: 318-321 [doi]

2017

Smart security management in secure devicesBruno Robisson, Michel Agoyan, Patrick Soquet, Sébastien Le Henaff, Franck Wajsbürt, Pirouz Bazargan-Sabet, Guillaume Phan. jce, 7(1):47-61, 2017. [doi]

2015

Smart Security Management in Secure DevicesBruno Robisson, Michel Agoyan, Patrick Soquet, Sébastien Le Henaff, Franck Wajsbürt, Pirouz Bazargan-Sabet, Guillaume Phan. iacr, 2015:670, 2015. [doi]

2014

2013

Identifying signal correlations using discrete event simulationPirouz Bazargan-Sabet, Dominique Ledu. newcas 2013: 1-4 [doi]

2011

Implementation of Complex Strategies of Security Insecure Embedded SystemsBruno Robisson, Michel Agoyan, Sébastien Le Henaff, Patrick Soquet, Guillaume Phan, Franck Wajsbürt, Pirouz Bazargan-Sabet. ntms 2011: 1-5 [doi]

2010

Formal Verification of Timed VHDL ProgramsAbdelrezzak Bara, Pirouz Bazargan-Sabet, Remy Chevallier, Dominique Ledu, Emmanuelle Encrenaz, Patricia Renault. fdl 2010: 80-85

2003

An Event-Driven Approach to Crosstalk Noise AnalysisPirouz Bazargan-Sabet, Patricia Renault. anss 2003: 319-326 [doi]

2002

A MOS transistor model for peak voltage calculation of crosstalk noisePatricia Renault, Pirouz Bazargan-Sabet, Dominique Le Dû. icecsys 2002: 773-776 [doi]

2001

An Approach to Mapping the Timing Behavior of VLSI Circuits on EmulatorsPirouz Bazargan-Sabet, Laurent Vuillemin. rsp 2001: 168-173 [doi]

A Model for Crosstalk Noise Evaluation in Deep Submicron ProcessesPirouz Bazargan-Sabet, Fabrice Ilponse. isqed 2001: 139-144 [doi]

Modeling crosstalk noise for deep submicron verification toolsPirouz Bazargan-Sabet, Fabrice Ilponse. date 2001: 530-534 [doi]

1998

Usinf Node Replication to improve Circuit s Partition in Distributed Logic SimulationAmar Guettaf, Pirouz Bazargan-Sabet. scesm 1998: 235-237

Efficient Partitioning Method For Distributed Logic Simulation of VLSI CircuitsAmar Guettaf, Pirouz Bazargan-Sabet. anss 1998: 196-201 [doi]

1996

A symbolic simulation approach in resolving signals correlationJulien Dunoyer, Nizar Abdallah, Pirouz Bazargan-Sabet. anss 1996: 203-211 [doi]

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