Abstract is missing.
- A SiGe 4-Gsps 2-bits digitizer with 2-4 GHz input bandwidthDavid Deschans, Jean-Baptiste Begueret, Yann Deval, Christophe Scarabello, Pascal Fouillat, Guy Montignac, Alain Baudry. 1-4 [doi]
- Statistical analysis of the resolution in a current-mode ADCGianluca Giustolisi, Gaetano Palumbo, Salvatore Pennisi. 5-8 [doi]
- A high-speed, current-steering digital-to-analog converter in 0.6-μm CMOSMohammad Reza Hassanzadeh, Jafar Talebzadeh, Omid Shoaei. 9-12 [doi]
- An asynchronous serial flash converterAbhijit M. Dighe, A. V. Bapat. 13-15 [doi]
- Pipeline of successive approximation converters with optimum power merit factorJinghua Li, Franco Maloberti. 17-20 [doi]
- Sampling and signal reconstruction structures performing internal antialiasing filteringYefim S. Poberezhskiy, Gennady Y. Poberezhskiy. 21-24 [doi]
- PD-SOI and FD-SOI: a comparison of circuit performanceAndrew Marshall, Sreedhar Natarajan. 25-28 [doi]
- Design of a switched opamp-based bandpass filter in a 0.35 μm CMOS technologyLuis Quintanilla, Jesús Arias, Lourdes Enríquez, José Vicente, Juan Barbolla, Diego Vázquez, Adoración Rueda. 29-32 [doi]
- A low-voltage programmable-gain current-mode amplifierJader A. De Lima. 33-36 [doi]
- Low power BIN integrator dedicated to neural signal processingAdnan Harb, Mohamad Sawan. 37-40 [doi]
- Timing analysis of transistor stack for leakage power savingYong Liu, Zhiqiang Gao. 41-44 [doi]
- A precise sample-and-hold circuit topology in CMOS for low voltage applications with offset voltage self correctionLuis Henrique de Carvalho Ferreira, Robson L. Moreno, Tales C. Pimenta, Carlos A. R. Filho. 45-48 [doi]
- Low-voltage CMOS wideband operational transconductance amplifier with regulated cascode circuitLyes Bouzerara, M. T. Belaroussi. 49-52 [doi]
- SC and SI techniques performances faced with technological advances [in CMOS]Patricia Desgreys, Antoine Tauvel, Patrick Loumeau. 53-56 [doi]
- Low-power CMOS active resistor independent on the threshold voltageCosmin Popa, Anca Manuela Manolescu, Octavian Mitrea, Manfred Glesner. 57-60 [doi]
- Voltage regulator based on an high-efficiency adaptive charge pumpGaetano Palumbo, Domenico Pappalardo, Maurizio Gaibotti. 61-64 [doi]
- A ROM-less direct digital frequency synthesizer by using trigonometric quadruple angle formulaChua-Chin Wang, Hsien-Chih She, Ron Hu. 65-68 [doi]
- A 1.2 GHz programmable DLL-based frequency multiplier for wireless applicationsChua-Chin Wang, Hsien-Chih She, Ron Hu. 69-72 [doi]
- Analysis of an 1.8 - 2.5 GHz multi-standard high image-reject front-endVojkan Vidojkovic, Johan van der Tang, Arjan J. Leeuwenburgh, Arthur H. M. van Roermund. 73-76 [doi]
- A single-chip 1.8 GHz image reject RF receiver front-end with boot-strapped inductorsStefano C. Di Pascoli, Luca Fanucci, F. Giusti, Bruno Neri, Domenico Zito. 77-80 [doi]
- A new highly linear CMOS mixer suitable for deep submicron technologiesRami F. Salem, Sherif H. Galal, M. Sameh Tawfik, Hani F. Ragaie. 81-84 [doi]
- RF antenna matching methods for radar cross section measurementsEric Kerhervé, Ph. Naud, G. Germain, Pierre Jarry. 85-88 [doi]
- An extra low noise 1.8 GHz voltage controlled oscillator in 0.35 SiGe BiCMOS technologyLampros Dermentzoglou, George Kamoulakos, Aggeliki Arapoyanni. 89-92 [doi]
- Concept of quasi-capacitive tapping of bipolar voltage-controlled oscillatorsAleksandar Tasic, Wouter A. Serdijn. 93-96 [doi]
- K-rail diagrams - comprehensive tool for full performance characterization of voltage-controlled oscillatorsAleksandar Tasic, Wouter A. Serdijn. 97-100 [doi]
- A low-voltage quadrature log-domain oscillatorNikos Fragoulis, Ioannis Haritantis. 101-104 [doi]
- A new differential LNA topology for wireless applicationsStefano C. Di Pascoli, Luca Fanucci, Bruno Neri, Domenico Zito. 105-108 [doi]
- Millimetric wave amplifier for single side band optical modulatorEric Kerhervé, Laurent Courcelle, Pierre Jarry. 109-112 [doi]
- Silicon bipolar LNAs in the X and Ku bandsGiovanni Girlando, Giuseppe Ferla, Egidio Ragonese, Giuseppe Palmisano. 113-116 [doi]
- Baseband predistorter for radio frequency power amplifiers based on a non-iterative, fast adaptation methodNikos Naskas, Yannis Papananos. 117-120 [doi]
- A tree-like amplifier architecture for large gain-bandwidth productMarco Balsi, Francesco Centurelli, Salvatore Pennisi, Alessandro Trifiletti. 121-124 [doi]
- Log-domain allpass group-delay equaliser design with XFILTERAndrew E. J. Ng, John I. Sewell. 125-128 [doi]
- New way to design active filters with corrected group delay frequency response through EDE methodJan Vondras. 129-132 [doi]
- Synthesis of the group delay equalizersJ. Vrbata, Milos Laipert, Miroslav Vlcek. 133-136 [doi]
- + based biquadB. M. Monge Sanz, Pedro A. Martínez-Martínez, S. Celma-Pueyo. 137-140 [doi]
- An analog median filter with fuzzy adaptationJavier Lemus-López, Alejandro Díaz-Sánchez, Jaime Ramírez-Angulo. 141-144 [doi]
- A complex lowpass-multipassband converter for synthesis of complex switched-current filtersGeorgi A. Nenov. 145-148 [doi]
- Realization of the all-pole third-order transfer functionMirko Dozet, Nino Stojkovic. 149-152 [doi]
- The general synthesis of complex analogue filtersC. Cuypers, N. Y. Voo, Mykhaylo A. Teplechuk, John I. Sewell. 153-156 [doi]
- m-C filtersSlawomir Koziel, Stanislaw Szczepanski. 157-160 [doi]
- m-C filters in canonical structuresSlawomir Koziel, Stanislaw Szczepanski. 161-164 [doi]
- General multiple LC prototype filter solutions and optimizationKarel Hajek, Jirí Sedlácek. 165-168 [doi]
- Design of continuous-time filter for hearing aid application using current conveyorsDebashis Dutta, Qadeer Ahmad Khan, Swapna Banerjee. 169-172 [doi]
- Current-mode multifunction filter using opamp compensation polesShahram Minaei, Oguzhan Cicekoglu. 173-176 [doi]
- Hybrid nested Miller compensation with nulling resistorsRosario Mita, Gaetano Palumbo, Salvatore Pennisi. 177-180 [doi]
- Comparison between Miller integrator cells using VOAs and CFOAsRosario Mita, Gaetano Palumbo, Salvatore Pennisi. 181-184 [doi]
- A 1.5 V opamp design with high gain wide bandwidth and its application in a high Q bandpass filter operating at 10.7 MHzSherif Hammouda, Mohamed Tawfik, Hani F. Ragaie. 185-188 [doi]
- Frequency behavior of classical current mirrors [CMOS]Luis Nero Alves, Rui L. Aguiar. 189-192 [doi]
- A CMOS logarithmic pipeline A/D converter with a dynamic range of 80 dBJorge Guilherme, João C. Vital, José E. Franca. 193-196 [doi]
- Another simple transistor-only lumped-distributed tunable low-pass filterAndrzej KieLbasinski. 197-200 [doi]
- Transitional filters using linear interpolation with the filter selection based on the total mean weighting performanceAurencio Sanczczak Farias, Sidnei Noceti Filho, Rui Seara. 201-204 [doi]
- Specification of the DRM and the time for preventive maintenance for an aging resourceSalma A. Ghoneim, Hossam M. A. Fahmy. 205-208 [doi]
- Low-power high-order band-pass active-RC allpole filters using a "lossy" LP-BP transformationDrazen Jurisic, Neven Mijat, George S. Moschytz. 209-213 [doi]
- A new job for the pseudo-MOS transistor: working in the pressure sensors fieldCristian Ravariu, Florina Ravariu, Adrian Rusu, D. Dobrescu, L. Dobrescu, C. Popa, I. Chiran. 215-218 [doi]
- Transducer interface for multichannel wired telemetry in high temperature environmentDavorin Ambrus, Vedran Bilas, Igor Lackovic. 219-222 [doi]
- Linear generalized synchronization of two chaotic Colpitts oscillatorsVesna Rubezic, Budimir Lutovac, Radoje Ostojic. 223-225 [doi]
- Model of tilt sensor systemMiroslav Husak. 227-230 [doi]
- A low-voltage low-power CMOS 5-GHz oscillator based on active inductorsHaiqiao Xiao, Rolf Schaumann. 231-234 [doi]
- A four-quadrant analog multiplier based on switched-capacitor and pulse-width amplitude modulation techniquesMontree Siripruchyanun, Paramote Wardkein. 235-238 [doi]
- A high speed truly IC random number source for smart card microcontrollersMarco Bucci, Lucia Germani, Raimondo Luzzi, Pasquale Tommasino, Alessandro Trifiletti, Mario Varanonuovo. 239-242 [doi]
- A fast 0.25um CMOS current-mode front-end stage for solid state detector interfacesEmmanuel Zervakis, Nikos Haralabidis. 243-246 [doi]
- Experimental results obtained from analog chips used for extracting sound localization cuesIvan Grech, Joseph Micallef, Tanya Vladimirova. 247-251 [doi]
- Analog triangular-to-sine converter using lateral-pnp transistors in CMOS processCarlos A. dos Reis Filho, Murilo Pilon Pessatti, João Paulo Cerquinho Cajueiro. 253-256 [doi]
- A modified active current mirror suitable for current-mode algorithmic analog-to-digital convertersTolga Kaya, Ali Zeki. 257-260 [doi]
- Harmonic distortion in switched current cells due to settling errorMiguel Angel Garcia-Andrade, Guillermo Espinosa Flores-Verdad, David Báez-López. 261-264 [doi]
- Transient evolution for different strategies in the amplifier gain controlOctavian Fratu, Simona Halunga, Marius Vladan, Mehdi Bathaee. 265-268 [doi]
- Simple nonlinear large signal MOSFET model parameter extraction for class E amplifiersPilar Molina Gaudó, Francisco del Águìla López, Pere Palà-Schönwälder, Jesús Navarro Artigas. 269-272 [doi]
- Implementation of 2D SPICE models for finding periodic steady state of strongly nonlinear RF-ICFlorin Constantinescu, Miruna Nitescu, Constantin Viorel Marin, Mihai Iordache, Lucia Dumitriu. 273-276 [doi]
- Noise performance of classical current mirrorsLuis Nero Alves, Rui L. Aguiar. 277-280 [doi]
- Multilevel beam SOI-MEMS fabrication and applicationsVeljko Milanovic. 281-285 [doi]
- MEMS packaging on a budget (fiscal and thermal)Michael B. Cohn, Ryan Roehnelt, Ji-Hai Xu, Alexander Shteinberg, Steven Cheung. 287-290 [doi]
- MEMS for distributed wireless sensor networksBrett Warneke, Kristofer S. J. Pister. 291-294 [doi]
- Micromachined RF voltage-controlled oscillator with phase noise characterizationDarrin J. Young. 295-298 [doi]
- A time-interleaved chopper-stabilized delta-sigma analog to digital converterVan Tam Nguyen, Patrick Loumeau, Jean-François Naviner. 299-302 [doi]
- A multiplierless decimation filter for ΣΔ A/D conversionValentino Liberali, Roberto Rossi, Guido Torelli. 303-306 [doi]
- A high pass switched capacitor ΣΔ modulatorIvan John O'Connell, Colin Lyden. 307-310 [doi]
- Analysis of bandpass sigma-delta modulator architecturesJuan Jesús Ocampo Hidalgo, Alberto García Ortiz, Lukusa D. Kabulepa, Manfred Glesner. 311-314 [doi]
- N-path multirate sigma-delta modulator for high-frequency applicationsFan Lou, Seng-Pan U, Rui Paulo Martins. 315-318 [doi]
- A 160-MS/s six-order wideband bandpass sigma-delta modulatorHossein Shamsi, Omid Shoaei. 319-322 [doi]
- T-integrator in digital CMOS process for continuous-time ΣΔ modulatorPhanumas Khumsat, Apisak Worapishet, Alison Burdett. 323-326 [doi]
- A second-order non-feedback ΔΣ modulator for D/A conversionDag T. Wisland, Mats Erling Høvin, Tor Sverre Lande. 327-330 [doi]
- A new scalable non-feedback ΔΣ digital-to-analog converterDag T. Wisland, Mats Erling Høvin, Lars A. Fleischer, Tor Sverre Lande. 331-334 [doi]
- A multi-bit sigma-delta modulator for wideband applicationsAna Rusu, Hannu Tenhunen. 335-338 [doi]
- Analysis of clock jitter effects in wideband sigma-delta modulators for rf-applicationsAdam Strak, Andreas Gothenberg, Hannu Tenhunen. 339-342 [doi]
- Digital sigma delta modulation for on chip signal generationChiheb Rebai, Dominique Dallet, Philippe Marchegay. 343-346 [doi]
- A time-delay-integration CMOS readout circuit for IR scanningFu-Kai Tsai, Hong-Yi Huang, Li-Kuo Dai, Cheng Der Chiang, Ping-Kuo Weng, Yung-Chung Chin. 347-350 [doi]
- On-chip transimpedance preamplifier for CMOS BDJ optical detector using active enhanced impedance loadsPatrick Pittet, Guo-Neng Lu, Aimad El Mourabit. 351-354 [doi]
- On-chip synchronous detection for CMOS photodetectorGuo-Neng Lu, Patrick Pittet, Genaro Carrillo, Aimad El Mourabit. 355-358 [doi]
- High power efficiency inductive link with full-duplex data communicationYamu Hu, Jean-François Gervais, Mohamad Sawan. 359-362 [doi]
- Mechanical stress measurement electronics based on piezo-resistive and piezo-Hall effectsR. Magnani, Francesco Tinfena, V. Kempe, Luca Fanucci. 363-366 [doi]
- Simple reduced-order macromodels with PRIMASakari Aaltonen, Janne Roos. 367-370 [doi]
- On some properties of the convolution algorithms for the thermal analysis of semiconductor devicesJanusz Zarebski, Krzysztof Górecki. 371-374 [doi]
- Influences of minimum cut plane properties on the mincut circuit partitioning problemsKuo-Hsing Cheng, Shun-Wen Cheng. 375-379 [doi]
- A 1V micropower FGMOS log-domain filterRubén Fernández, Antonio J. López-Martín, Carlos Aristoteles De la Cruz-Blas, Alfonso Carlosena. 381-384 [doi]
- Improved method of numerical inversion of two-dimensional Laplace transforms for dynamical systems simulationLubomír Brancík. 385-388 [doi]
- High accuracy CMOS capacitance multiplierSalvatore Pennisi. 389-392 [doi]
- A compact low-voltage four quadrant FGMOS multiplierIñigo Navarro, Antonio J. López-Martín, Carlos Aristoteles De la Cruz-Blas, Alfonso Carlosena. 393-396 [doi]
- DDQ testSrdjan Dragic, Martin Margala. 397-400 [doi]
- A wide-range supply-independent CMOS voltage reference for telemetry-powering applicationsAmir M. Sodagar, Khalil Najafi. 401-404 [doi]
- Using a low-voltage COA for high-performance voltage amplificationSalvatore Pennisi. 405-408 [doi]
- Optimal resistor ratio in the DAC with low precision resistors - statistical approachRada Dragovic-Ivanovic, Zoran Mijanovic, LJubisa Stankovic, Nedjeljko Lekic. 409-412 [doi]
- A new model for metastabilityMary Sue Haydt, Samiha Mourad, William Terry, Janice Terry. 413-416 [doi]
- Designing low electro magnetic emissions circuits through clock skew optimizationIvan Blunno, Francesco Gregoretti, Claudio Passerone, D. Peretto, Leonardo M. Reyneri. 417-420 [doi]
- A method to design MMICs for high production yieldsMassimo Comparini, Andrea Di Pasquale, Marziale Feudale, Agostino Giorgio, Anna Gina Perri. 421-424 [doi]
- An extended frequency range CMOS voltage-controlled oscillatorChao Xu, Winslow Sargeant, Kenneth R. Laker, Jan Van der Spiegel. 425-428 [doi]
- High performance automatic gain control circuit using a S/H peak-detector for ASK receiverHwang-Cherng Chow, I-Hsin Wang. 429-432 [doi]
- A B-s complement continuous valued digit adderRicardo Andres Aroca, Majid Ahmadi, R. Hashemian, Graham A. Jullien, William C. Miller. 433-436 [doi]
- A full CMOS adaptive 3.3V/5V supply VCM/spindle controller with 9mA total current consumption in lock mode for high TPI and RPM of 8200 for 1" micro-drive, 1.8" drive, and 2.5" driveMehdi Bathaee, Calin Andrian-Albescu, Dragos Nicolae, Zed Moustoufi, Hamid Ghezel. 437-440 [doi]
- Supply current monitor and set-up for fault detection in analogue circuitsMahmoud A. Al-Qutayri. 441-444 [doi]
- Fast static compaction of tests composed of independent sequences: basic properties and comparison of methodsJaan Raik, Artur Jutman, Raimund Ubar. 445-448 [doi]
- Extended frequency-directed run-length code with improved application to system-on-a-chip test data compressionAiman H. El-Maleh, Raslan H. Al-Abaji. 449-452 [doi]
- Non-robust delay test pattern enhancementVolker Meyer, Walter Anheier, Arne Sticht. 453-456 [doi]
- Hardware support for fault tolerance in triple redundant CAN controllersCarlos Guerrero, Guillermo Rodríguez-Navas, Julian Proenza. 457-460 [doi]
- An efficient test relaxation technique for combinational circuits based on critical path tracingAiman El-Maleh, Ali Al-Suwaiyan. 461-465 [doi]
- Embedded testing for data communications circuitsSan Lin, Samiha Mourad. 467-470 [doi]
- An evolutionary algorithm for the testable allocation problem in high-level synthesisHaidar Harmanani, Rony Saliba. 471-474 [doi]
- Introducing redundant transformations for high level built-in self-testable synthesisLaurence Tianruo Yang, Jon C. Muzio. 475-479 [doi]
- ROM-less direct digital frequency synthesizers exploiting polynomial approximationDavide De Caro, Ettore Napoli, Antonio G. M. Strollo. 481-484 [doi]
- Ling adders in CMOS standard cell technologiesCostas Efstathiou, Haridimos T. Vergos, Dimitris Nikolos. 485-488 [doi]
- A novel pseudo random bit generator for cryptography applicationsRosario Mita, Gaetano Palumbo, Salvatore Pennisi, Massimo Poli. 489-492 [doi]
- Bit-level pipelinable general and fixed coefficient digit-serial/parallel multipliers based on shift-accumulationOscar Gustafsson, Lars Wanhammar. 493-496 [doi]
- SoC design using behavioral level virtual componentsEmmanuel Casseau. 497-500 [doi]
- A mixed-signal SOC signal processor that incorporates all the drive electronics in a single-chipMehdi Bathaee, Dragos Nicolae, Zed Moustoufi, Daniel Leonescu, Radu M. Udrea, Hamid Ghezel, Calin Andrian-Albescu, Ion Minca, Octavian Fratu. 501-504 [doi]
- A single-rail handshake CDMA correlatorWeiwen Zhu, Zeljko Zilic, Radu Negulescu. 505-508 [doi]
- VLSI design of a high speed turbo decoder for 3rd generation satellite communicationLuca Fanucci, Claudio Sicilia, Daniele Sicilia. 509-512 [doi]
- Highly efficient wideband digital frequency demultiplexerM. Hollreiser, Christian Rosadini, D. Lo Iacono, Luca Fanucci. 513-516 [doi]
- High speed asynchronous structures for inter-clock domain communicationAtanu Chattopadhyay, Zeljko Zilic. 517-520 [doi]
- Design guidelines for bipolar frequency dividersMassimo Alioto, Giuseppe Di Cataldo, Gaetano Palumbo. 521-524 [doi]
- Dynamic power management in an AMBA-based battery-powered systemMarco Caldari, Massimo Conti, Paolo Crippa, Simone Orcioni, M. Solazzi, Claudio Turchetti. 525-528 [doi]
- Processing time saving in low power voice coding applications using synchronous reconfigurable co-processing architectureSalvatore M. Carta, Luigi Raffo. 529-532 [doi]
- Single-inductor four-phase power-clock generator for positive-feedback adiabatic logic gatesAntonio Blotti, Sergio Borghese, Roberto Saletti. 533-536 [doi]
- A low power fault secure timer implementation based on the Gray encoding schemeKyriakos S. Papadomanolakis, Athanasios P. Kakarountas, Nicolas Sklavos, Costas E. Goutis. 537-540 [doi]
- Data driven VLSI computation for low power DCT-based video codingLuca Fanucci, Sergio Saponara. 541-544 [doi]
- Development of simplex-based piecewise-linear approximations of nonlinear mappingsJanne Roos. 545-548 [doi]
- Cycle-accurate energy estimation in system level descriptions of embedded systemsAna Belén Abril García, Jean Gobert, Thomas Dombek, Habib Mehrez, Frédéric Pétrot. 549-552 [doi]
- A novel division algorithm for parallel and sequential processingKonstantinos Tatas, D. J. Soudris, D. Siomos, Minas Dasygenis, Adonios Thanailakis. 553-556 [doi]
- Euclidean algorithm VLSI implementationsNicolas Sklavos 0001, Kyriakos Papadomanolakis, Paris Kitsos, Odysseas G. Koufopavlou. 557-560 [doi]
- n - 1 multipliers and addersIoannis Kouretas, Vassilis Paliouras. 561-564 [doi]
- Relaxed decimation filter specifications for wireless transceiversKhaled Grati, Adel Ghazel, Lirida A. B. Naviner. 565-569 [doi]
- An 800 MHz 0.35 μm CMOS clock tree and PLL based on a new charge-pump circuitSimone Orcioni, Massimo Conti, Claudio Turchetti, Angelo Centorame. 571-574 [doi]
- A novel floating-gate multiple-valued signal to binary signal converterYngvar Berg, Øivind Næss, Snorre Aunet, Mats Høvin. 575-578 [doi]
- A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logicYngvar Berg, Øivind Næss, Snorre Aunet, Johannes Goplen Lomsdalen, Mats Høvin. 579-582 [doi]
- Analogue radial basis function networks for phoneme recognitionEdward Gatt, Joseph Micallef, Edward Chilton. 583-586 [doi]
- Static series-voltage noise margins of CBL, CSL and CMOSAleksandar Szabo, Zeljko Butkovic. 587-590 [doi]
- Residue signed-digit arithmetic circuit with a complement of modulus and the application to RSA encryption processorShugang Wei, Kensuke Shimizu. 591-594 [doi]
- Recursive filters using systolic architectures and switched capacitor techniquesDjamel Chikouche, Raïs El'hadi Bekka, A. Boucenna. 595-598 [doi]
- Speed-efficient wide adders for VIRTEX FPGAsStefania Perri, Maria Antonia Iachino, Pasquale Corsonello. 599-602 [doi]
- A floating-point unit using stochastic arithmetic compliant with the IEEE-754 standardRoselyne Chotin, Habib Mehrez. 603-606 [doi]
- Shuffled serial adder: an area-latency effective serial adderGiacinto Paolo Saggese, Antonio G. M. Strollo, Nicola Mazzocca, Davide De Caro. 607-610 [doi]
- A high-performance buffer for non-volatile memoriesL. De Ambrogi, S. Nicosia, G. Pagano, G. Palumbo. 611-614 [doi]
- High frequency operation of a MOSFET under an integrated inductor's magnetic fieldNikolaos Nastos, Yannis Papananos. 615-618 [doi]
- Propagation delay model of current driven RC chainGaetano Palumbo, Massimo Poli. 619-622 [doi]
- Current-mode digital gates and circuits: concept, design and verificationOleg Maslennikow, Piotr Pawlowski, Przemyslaw Soltan, Robert Berezowski. 623-626 [doi]
- Experimental results of an optimised voltage triplerMing Zhang 0007, Nicolas Llaser. 627-630 [doi]
- New Σ-Δ voltage to frequency converterMilan Stork. 631-634 [doi]
- High-speed GaAs SCFL digital test structuresHrvoje Markovic, Nikica Maric, Vladimir Ceperic, Adrijan Baric. 635-639 [doi]
- An efficient Hamming distance comparator for low-power applicationsMitsumasa Fujino, Vasily G. Moshnyaga. 641-644 [doi]
- Design and prototyping of a CMOS standard contactless current measurement macrocell for integrated microsystems in power control applicationsVincent Frick, Philippe Poure, Luc Hébrard, Freddy Anstotz, Francis Braun. 645-648 [doi]
- Adaptive algorithm for analog fault based on a sensitivity matrix and the fuzzy set theoryDamian Grzechca, Jerzy Rutkowski. 649-652 [doi]
- Predictive control of water supply plantBoris Azenic, Nedjeljko Peric, Drazen Sliskovic. 653-656 [doi]
- A low-power threshold logic familyMarius Padure, Sorin Cotofana, Stamatis Vassiliadis, Claudius Dan, Mircea Bodea. 657-660 [doi]
- Threshold-logic-based design of compressorsJosé M. Quintana, Maria J. Avedillo, Esther Rodríguez-Villegas, Adoración Rueda. 661-664 [doi]
- A full adder implementation using SET based linear threshold gatesCasper Lageweg, Sorin Cotofana, Stamatis Vassiliadis. 665-668 [doi]
- Experimental threshold logic implementations based on resonant tunnelling diodesWerner Prost, Samuel O. Kim, Peter Glösekötter, Christian Pacha, Holger van Husen, Thorsten Reimann, Karl F. Goser, Franz-Josef Tegude. 669-672 [doi]
- Investigation of a programmable threshold logic gate arrayPeter M. Kelly, C. J. Thompson, T. M. McGinnity, Liam P. Maguire. 673-676 [doi]
- Application of adaptive circuit partitioning algorithm to reduction of interconnections length between elements of VLSI circuitWladyslaw Szczesniak. 677-680 [doi]
- ELF-SP - evolutionary algorithm for non-slicing floorplans with soft modulesBenyi Wang, Malgorzata Chrzanowska-Jeske, G. Greenwood. 681-684 [doi]
- Application of adaptive evolutionary algorithm for low power design of CMOS digital circuitsSlawomir Koziel, Wladyslaw Szczesniak. 685-688 [doi]
- Efficient post-layout timing verification via RLC trees and explicit PWL timing integrationJerzy J. Dabrowski. 689-692 [doi]
- Integrated timing-driven approach to the FPGA layoutMartin Danek, Zdenek Muzikár. 693-696 [doi]
- Impact of technology evolution on dual supply voltage scaling and gate resizing in power-driven logic synthesisTorsten Mahnke, Walter Stechele, Martin Embacher, Wolfgang Hoeld. 697-700 [doi]
- Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictnessTorsten Mahnke, Sebastian Panenka, Martin Embacher, Walter Stechele, Wolfgang Hoeld. 701-704 [doi]
- Efficient power modeling techniques for combinational and sequential RTL macroblocksMichael Eiermann, Walter Stechele. 705-708 [doi]
- Designing universal logic modulesMarkus Hütter. 709-712 [doi]
- Quick power supply noise estimation using hierarchically derived transfer functionsSatoshi Sugiyama, Makoto Ikeda, Kunihiro Asada. 713-716 [doi]
- Automated SystemC to VHDL translation in hardware/software codesignChristian Côté, Zeljko Zilic. 717-720 [doi]
- Instruction based power consumption estimation methodologyMarco Caldari, Massimo Conti, Paolo Crippa, Giuseppe Nuzzo, Simone Orcioni, Claudio Turchetti. 721-724 [doi]
- On low power high level synthesis using genetic algorithmsMohamed A. Elgamel, Magdy A. Bayoumi. 725-728 [doi]
- HIPED: a tool for high-level power estimation of digital signal processing algorithmsImed Ben Dhaou, Hannu Tenhunen. 729-732 [doi]
- Virtual component IP re-use in telecommunication systems design: a case study of MPEG-2/JPEG2000 encoderPhilippe Coussy, Adel Baganne, Eric Martin 0001. 733-736 [doi]
- Analysis and comparison of low-voltage CML D-latchMassimo Alioto, Rosario Mita, Gaetano Palumbo. 737-740 [doi]
- Multiplier architecture power consumption characterization for low-power DSP applicationsSangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang. 741-744 [doi]
- Stochastic Petri nets architectural modules for power system availabilityMariana Dumitrescu. 745-748 [doi]
- Computational kernel extraction for synthesis of power-managed sequential componentsAlexander Sudnitson. 749-752 [doi]
- Asynchronous data communication with low power for GALS systemsShengxian Zhuang, Weidong Li, Jonas Carlsson, Kent Palmkvist, Lars Wanhammar. 753-756 [doi]
- Development and comparison of reduced-order interconnect macromodels for time-domain simulationTimo Palenius, Janne Roos, Sakari Aaltonen. 757-760 [doi]
- Accurate reduced RL model for frequency dependent transmission linesQingjian Yu, Ernest S. Kuh. 761-764 [doi]
- A wire load model considering metal layer propertiesArmin Windschiegl, Torsten Mahnke, Michael Eiermann, Walter Stechele, Paul Zuber. 765-768 [doi]
- High-speed receivers for on-chip interconnections in deep-submicron processHong-Yi Huang, Shih-Lun Chen. 769-772 [doi]
- A MOS transistor model for peak voltage calculation of crosstalk noisePatricia Renault, Pirouz Bazargan-Sabet, Dominique Le Dû. 773-776 [doi]
- Multiobjective optimization method for analog circuits design based on fuzzy logicGabriel Oltean, Costin Miron, Emilia Mocean. 777-780 [doi]
- A polynomial time approximation scheme for rectilinear Steiner minimum tree construction in the presence of obstaclesJian Liu, Ying Zhao 0008, Eugene Shragowitz, George Karypis. 781-784 [doi]
- Properties of the pair of conjugate trees (t'-t")Luis Hernández-Martínez, Arturo Sarmiento-Reyes. 785-788 [doi]
- A new assignment algorithm for star network topology designJozef Petrek. 789-792 [doi]
- Design centering of analog circuits using GA and the regionalization methodYaser M. A. Khalifa. 793-796 [doi]
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- Trends in reconfigurable logic and reconfigurable computingReiner W. Hartenstein. 801-808 [doi]
- Configurable systems-on-chip: commercial and academic approachesJürgen Becker 0001. 809-812 [doi]
- Memory addressing organization for stream-based reconfigurable computingMichael Herz, Reiner W. Hartenstein, Miguel Miranda, Erik Brockmeyer, Francky Catthoor. 813-817 [doi]
- Computational efficiency: adaptive computing vs. ASICsBob Plunkett, David Chou. 819-822 [doi]
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- SOI SRAM design advances & considerationsSreedhar Natarajan, Andrew Marshall. 835-838 [doi]
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- A new scale adaptive wavelet thresholding method for denoising using chi-square test statisticA. Das, Uday B. Desai, Priya P. Vaidya. 859-862 [doi]
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- 3-D adaptive LUM smoother based on reduced set of smoothing levelsRastislav Lukac, Viktor Fischer, Milos Drutarovský. 871-874 [doi]
- The pre-whitened NLMS: a promising algorithm for acoustic echo cancellationHichem Besbes, Sofia Ben Jebara. 875-878 [doi]
- Tearing techniques for symbolic simulation of large-scale analog circuitsMihai Iordache, Lucia Dumitriu, Florin Constantinescu, Miruna Nitescu. 879-882 [doi]
- On complex non-linear systems with symmetries: controllability preserving decompositionGeorgi M. Dimirovski, Yuanwei Jing, Jun Zhao 0002, Tatjana D. Kolemisevska-Gugulovska. 883-886 [doi]
- Decomposition of complex linear systems via hierarchical similarity structureYuanwei Jing, Georgi M. Dimirovski, Jun Zhao 0002, Mile J. Stankovski. 887-890 [doi]
- A full adder based methodology for scaling operation in residue number systemDimitrios Soudris, Minas Dasygenis, K. Mitroglou, Konstantinos Tatas, Adonios Thanailakis. 891-894 [doi]
- Implementation issues for V-vector algebraAlberto Carini, Giovanni L. Sicuranza. 895-898 [doi]
- One structure for wide-bandwidth and high-resolution fractional delay filterGordana Jovanovic-Dolecek, Javier Díaz-Carmona. 899-902 [doi]
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- LDI filter bank for ADC frequency domain analysisChiheb Rebai, Dominique Dallet, Philippe Marchegay. 907-910 [doi]
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- A class of cosine-modulated causal IIR filter banksLinnéa Svensson, Per Löwenborg, Håkan Johansson. 915-918 [doi]
- N-dimensional continuous systems with the Darboux-Goursat and Dirichlet boundary dataDariusz Idczak, Marek Majewski, Stanislaw Walczak. 919-922 [doi]
- LMI based stability analysis for 2D continuous systemsKrzysztof Galkowski. 923-926 [doi]
- Digital sound synthesis based on multidimensional system theoryRudolf Rabenstein, Lutz Trautmann. 927-930 [doi]
- Holdability and stabilizability of 2D Roesser modelTadeusz Kaczorek. 931-934 [doi]
- Controllability of linear 2-D systemsJerzy Klamka. 935-938 [doi]
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- On designing digit multipliersOmar Nibouche, Mokhtar Nibouche. 951-954 [doi]
- Rotation invariant seal imprint verification methodTakenobu Matsuura, Kazuya Mori. 955-958 [doi]
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- CAN generator and error injectorJ. Novák, A. Fried, M. Vacek. 967-970 [doi]
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- Bifurcation diagrams of the buck converterI. Flegar, D. Pelin, D. Zacek. 975-978 [doi]
- Self-modulation in SISO nonlinear systems with inertial damping described by Duffing equationMircea V. Nemescu, Dorin Dumitru Lucache. 979-982 [doi]
- Piecewise linear operations on sigma-delta modulated signalsYuji Hidaka, Hisato Fujisaka, Masahiro Sakamoto, Mititada Morisue. 983-986 [doi]
- Determining multi-valued input-output characteristics in the circuits containing bipolar transistorsMichal Tadeusiewicz, Stanislaw Halgas. 987-990 [doi]
- The special trans function theory to the AM detector transfer factor analytical analysisSlavica M. Perovich, Sanja I. Bauk, R. Kulic. 991-994 [doi]
- A wavelet-based voice activity detection algorithm in noisy environmentsShi-Huang Chen, Jhing-Fa Wang. 995-998 [doi]
- Voice activity detection using haircell model in noisy environmentChieh-Yi Huang, Hsien-Chang Wang, Jhing-Fa Wang. 999-1002 [doi]
- Optimization algorithm for the MP-MLQ excitation in G723.1 encoderCristian Negrescu. 1003-1006 [doi]
- Robust PWVD for the analysis of polynomial FM signals in non-Gaussian noiseBraham Barkat, LJubisa Stankovic. 1007-1010 [doi]
- Robust two-dimensional DFTIgor Djurovic, LJubisa Stankovic, Johann F. Böhme. 1011-1014 [doi]
- Implementation of modified wave digital filters using digital signal processorsKrzysztof Sozanski. 1015-1018 [doi]
- Detection of occlusion and visible background and foreground areas in stereo image pairsGeorge A. Triantafyllidis, Dimitrios Tzovaras, Michael G. Strintzis. 1019-1022 [doi]
- High-resolution data-adaptive time-frequency analysisVladimir Katkovnik, LJubisa Stankovic. 1023-1026 [doi]
- Fast MPEG watermarking for copyright protectionDimitrios Simitopoulos, Sotirios A. Tsaftaris, Nikolaos V. Boulgouris, Michael G. Strintzis. 1027-1030 [doi]
- A new variable length LMS algorithm: theoretical analysis and implementationsRadu Ciprian Bilcu, Pauli Kuosmanen, Karen O. Egiazarian. 1031-1034 [doi]
- Optimization of the three-step search algorithm by exclusion of stationary macroblocks from the search processChunjiang J. Duanmu, M. Omair Ahmad, M. N. S. Swamy, Ali M. Shatnawi. 1035-1038 [doi]
- The simple multiprocessor communication systemNedjeljko Lekic, Zoran Mijanovic, Desa Gobovic, Rada Dragovic-Ivanovic. 1039-1042 [doi]
- Optimized bi-directional frequency plan for microwave video and data distribution system "MVDDS"Mohamad M. Ayoub, Mohamed R. M. Rizk. 1043-1046 [doi]
- 3G wireless systems and beyond: a reviewPetros Nicopolitidis, Georgios I. Papadimitriou, Mohammad S. Obaidat, Andreas S. Pomportsis. 1047-1050 [doi]
- Analysis and representation of statistical performance of JPEG2000 encoded image over wireless channelsJianhua He, Zongkai Yang, Daiqin Yang, Zuoyin Tang, Jing Hu, Chun Tung Chou. 1051-1054 [doi]
- Bipolar differential cell with improved bandwidth performanceMarco Balsi, Francesco Centurelli, Salvatore Pennisi, Alessandro Trifiletti. 1055-1058 [doi]
- Detection and recognition of football highlights using HMMJürgen Assfalg, Marco Bertini, Alberto Del Bimbo, Walter Nunziati, Pietro Pala. 1059-1062 [doi]
- A flexible, fully configurable architecture for MPEG-2 video encodingJörn Jachalsky, M. Wahle, Peter Pirsch, Winfried Gehrke. 1063-1066 [doi]
- Estimation of line parameters using SLIDE algorithm and TF representationsIgor Djurovic, Srdjan Stankovic, Akira Ohsumi, Hiroshi Ijima. 1067-1070 [doi]
- Quality of service provision in high-speed networks: an active approachSihem Guemara El Fatmi, Noureddine Boudriga, Mohammad S. Obaidat. 1071-1074 [doi]
- Formal specification of QoS parameters by hierarchical tree structureDrago Zagar. 1075-1078 [doi]
- Performance evaluation of a TDMA-based randomly addressed polling protocol for wireless LANsPetros Nicopolitidis, Georgios I. Papadimitriou, Mohammad S. Obaidat, Andreas S. Pomportsis. 1079-1082 [doi]
- Interference cancellation in multi-path CDMA systemsChun Chian Lu. 1083-1086 [doi]
- Signal processor implementation of decimation filters in flexible receiversAbdelmonaem Lakhzouri, Djordje Babic, Markku Renfors. 1087-1090 [doi]
- Block subspace updating algorithms for tracking directions of coherent signals in SDMA mobile systemsKostas Berberidis. 1091-1094 [doi]
- Direct digital frequency synthesizers of high spectral purity based on quadratic approximationFlorean Curticapean, Jarkko Niittylahti. 1095-1098 [doi]
- Optimized concurrent interleaving architecture for high-throughput turbo-decodingMichael J. Thul, Frank Gilbert, Norbert Wehn. 1099-1102 [doi]
- VLSI design of a routing switch for the SpaceWire serial link standardLuca Fanucci, Alessandro Renieri, Pierangelo Terreni. 1103-1106 [doi]
- Adaptive baseband predistorter for radio frequency power amplifiers based on a multilayer perceptronNikos Naskas, Yannis Papananos. 1107-1110 [doi]
- Resource constrained clock recovery on programmable logic devicesRui L. Aguiar, Monica Figueiredo. 1111-1114 [doi]
- Design of a generic and high performance CMOS burst mode laser driverJohan Bauwelinck, Yves Martens, X. Z. Qui, Peter Ossieur, K. Noldus, Jan Vandewege, Edith Gilon-de Lumley, P. De Meulenaere, A. Ingrassia. 1115-1118 [doi]
- Nonstandard sensitivity analyses in frequency and time domainsJosef Dobes. 1119-1122 [doi]
- Design and modelling of a voltage controlled N-well resistor using the MOS tunneling diode structureJean-Baptiste Kammerer, Luc Hébrard, Vincent Frick, Philippe Poure, Francis Braun. 1123-1126 [doi]
- Modeling the output waveform of CMOS gate with feedback effectLi Yang, J. S. Yuan, M. Hagedorn. 1127-1130 [doi]
- Full-wave analysis of arbitrarily multilayered planar structures by the method of linesMohamed Lamine Tounsi, Abdelhamid Khodja, Brahim Haraoubia. 1131-1134 [doi]
- Mismatch optimization for analog circuits using the DesignAssistantUlrich Kleine, Lihong Zhang, Markus Wolf 0001. 1135-1138 [doi]
- Implementation of piecewise-linear DC analysis in APLACJanne Roos, Martti Valtonen, Jarmo Virtanen. 1139-1142 [doi]
- A hardware implementation of MD4-family hash algorithmsSandra Dominikus. 1143-1146 [doi]
- VLSI implementation of password (PIN) authentication unitNicolas Sklavos 0001, Paris Kitsos, Odysseas G. Koufopavlou. 1147-1150 [doi]
- An efficient implementation of the digital signature algorithmParis Kitsos, Nicolas Sklavos 0001, Odysseas G. Koufopavlou. 1151-1154 [doi]
- Architectures for unified field inversion with applications in elliptic curve cryptographyErkay Savas, Çetin Kaya Koç. 1155-1158 [doi]
- Hardware architectures proposed for cryptosystems based on hyperelliptic curvesThomas J. Wollinger, Christof Paar. 1159-1162 [doi]
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- dDaniel Foty, Matthias Bucher, David M. Binkley. 1179-1182 [doi]
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- A very accurate design of monolithic inductors in a 2D EM simulatorEgidio Ragonese, Giovanni Girlando, Giuseppe Palmisano. 1199-1202 [doi]
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