Table of Contents

• A Compact D-Band Phase Shifter with 0.1-degree Phase Resolution and 0.8-degree RMS Phase Error in 65 nm CMOSTakaya Uchino, Yudai Yamazaki, SungHwan Park, Chenxin Liu, Anyi Tian, Abanob Shehata, Hiroyuki Sakai 0009, Kazuaki Kunihiro, Atsushi Shirane, Kenichi Okada 0001. 1-3 [doi]
• A 65nm 687.5-TOPS/W Drive Strength-based SRAM Compute-In-Memory Macro with Adaptive Dynamic Range for Edge AI applicationsDong Gu Choi, JaeHyun Lee, Jahyun Koo 0002, Woo Kyoung Han, Dahoon Park, Jaeha Kung, Junghyup Lee, Jong-Hyeok Yoon. 1-3 [doi]
• A Fully-Connected Time-Modulated Phased-Array Transmitter Featuring Physical Security Directional Link and Multi-Beam PAPR ReductionXiangrong Huang, Haikun Jia, Wei Deng 0001, Chuanming Zhu, Ruiyang Jiang, Xintao Li, Zhihua Wang, Baoyong Chi. 1-3 [doi]
• A 14-to-32-Gb/s Deadzone-Free Referenceless CDR with Autocovariance-based Frequency Detector in 40-nm CMOS TechnologyHong-Seok Choi, Jae-Geon Lee, Kwang Ho Lee, Daehyun Koh, Jung-Woo Sull, Hyungrok Do, Chan-Ho Kye, Deog Kyoon Jeong, Min-Seong Choo. 1-3 [doi]
• 2 Analog-Digital Hybrid CIM Processor with Transpose Ternary-eDRAM BitcellHoichang Jeong, Seungbin Kim, Jeongmin Shin, Keonhee Park, Kyuho Jason Lee. 1-3 [doi]
• A 29.5W Switched-Capacitor based Dual-Output Hybrid Secondary Charger Providing Simultaneous Two-Cell Battery Charging and System Supply Voltage with Input Current Limiting FeatureChanjung Park, Seongil Yeo, Jeu Lee, Geuntae Park, Seungjin Baek, Seunghoon Lee, Kunhee Cho. 1-3 [doi]
• A 64-channel SPAD-based LiDAR sensor with Compact Coincidence Detection Circuit and Inter-frame Correlation-based Nonlinear Partial Histogram BuilderJin Hu 0006, Dong Li, Xiayu Wang, Rui Ma 0007, Yang Liu 0106, Zhangming Zhu. 1-3 [doi]
• A 0.6V Fully-Integrated BLE Transmitter in 65nm CMOS Using a Common-Mode-Ripple-Cancelled Hybrid PLL and a Duty-Cycle-Controlled Class-E/F2 PA Achieving 25% System Efficiency at 0dBmLiqun Feng, Qianxian Liao, Longhao Kuang, Jiahao Zhao, Woogeun Rhee, Zhihua Wang. 1-3 [doi]
• A reduced complexity MLSD-based adaptive Duo-PAM4 detector in 28-nm CMOS for 56-Gb/s wireline receiverChaolong Xu, Fangxu Lv, Mingche Lai, Zhang Luo, Xingyun Qi, Jiaqing Xu, Qiang Wang 0006, Liquan Xiao, Cewen Liu, Hua Xu. 1-3 [doi]
• A 1.12nJ/Pixel High-Accuracy and Memory-Efficient Real-Time Object Detection Processor for Neuromorphic Vision SensorsZehao Li, Wenhao Lu, Yuncheng Lu, Junying Li, Yucen Shi, Yuanjin Zheng, Tony Tae-Hyoung Kim. 1-3 [doi]
• A 12b 3 GS/s Passive T/H Assisted Time-Interleaved Pipelined SAR ADC with Metastability Reduction Technique and Dynamic-Bias RAQiang Yu, Zheng Zhu, Chao Li Ang, Qin Huang, Shanshan Han, Feng Tai, Rongbin Yang, Shuangyi Wu, Qiang Li. 1-3 [doi]
• A 1kHz-to-62MHz 2.06zFrms Resolution Lock-in Amplifier with SAR-assisted Parasitic and Baseline Capacitance CompensationMinge Jiang, Shen Ye, Tianxiang Qu, Tian Dong, Qinjing Pan, Zhiliang Hong, Jiawei Xu 0001. 1-3 [doi]
• A 0.91-pJ/b 20.8-32-Gb/s Reference-Less Sub-Baud-Rate CDR CircuitYao-Hung Tsai, Wen-Chi Huang, Shen-Iuan Liu. 1-3 [doi]
• A 56Gbps ADC/DAC-Based Jitter-Robust Multicarrier Transceiver with RX MIMO-DSP for > 40dB Loss ChannelSrujan Kumar Kaile, Julian Camilo Gomez Diaz, Yuanming Zhu, II-Min Yi, Sebastian Hoyos, Samuel Palermo. 1-3 [doi]
• A Hybrid Four-Switch Inductor-First Quadratic Step-Down Converter With Internal Ripple Compensated COT ControlYufei Sun, Zhitong Chen, Qiwei Zhang, Xiaoya Fan, Yanzhao Ma. 1-3 [doi]
• A 105.8dB A-weighted DR CT Delta-Sigma Audio ADC Using Current-Steering DAC Current Recycling AmplifierMoo-Yeol Choi, Myungjin Lee, MinSung Kim, Dongsu Kim, Jongwoo Lee. 1-3 [doi]
• EnTADRL: Deep Reinforcement Learning System-on-Chip for End-to-End Training AccelerationJingu Lee, Sanghyuk An, Jongjun Park, Jiwon Choi, Haoyang Sang, Sangwoo Ha, Sangjin Kim, Hoi-Jun Yoo. 1-3 [doi]
• A 22T Static Contention-free Conjoined Master-Slave Flip-flop for Low-Voltage, Low-Power, and Low-Area ApplicationsGicheol Shin, Shin Han, Minhyeok Jeong, Donguk Seo, Yoonmyung Lee. 1-3 [doi]
• 2 and 103-uJ/frame Navigation in 28nmShuyuan Zhang, Yujin Wang, Yifan He 0003, Yuchen Su, Huazhong Yang, Yongpan Liu, Hongyang Jia. 1-3 [doi]
• A 28nm 118.26TOPS/W Multi-Dimensional Fault-Tolerant Al Processor Enabling Voltage-Frequency Scaling Below Point-of-First-FailureYang Wang 0089, Xiaolong Yang, Yubin Qin, Zhiren Zhao, Ruiqi Guo, Zhiheng Yue, Shaojun Wei, Yang Hu 0001, Shouyi Yin. 1-3 [doi]
• A Real-Time Optical-Flow-based SLAM FPGA Accelerator with Inter-Frame Similarity Exploitation and Correlation-Guided Mixed-Precision Flow UpdateMengjie Li, Haozhe Zhu, Yiming Zhang, Siqi He, Qi Liu 0010, Xiaoyang Zeng, Chixiao Chen. 1-3 [doi]
• A Hybrid-Resonance Single-Stage Dual-Output Rectifier With High Voltage Difference for Wireless Power Transfer SystemFantao Wang, Kai Cui 0006, Zhi Li, Xiaoya Fan, Yanzhao Ma. 1-3 [doi]
• WhiteDwarf: 12.24 TFLOPS/W 40 nm Versatile Neural Inference Engine for Ultra-Compact Execution of CNNs and MLPs Through Triple Unstructured Sparsity Exploitation and Triple Model CompressionYasuyuki Okoshi, Ángel López García-Arias, Jaehoon Yu, Junnosuke Suzuki, Hikari Otsuka, Thiem Van Chu, Kazushi Kawamura, Daichi Fujiki, Masato Motomura. 1-3 [doi]
• A Non-contact TMR-Based Active Electrode for BCG RecordingTao Tang, Zhong Zheng, Chen Wang, Tianzi Jiang. 1-3 [doi]
• DPe-CIM: A 4T1C Dual-Port eDRAM Compute-in-Memory for Simultaneous Computing and Refresh with Adaptive Refresh and Data Conversion Reduction SchemeDohan Kim, Minyoung Jo, Gi-Seok Kim, Dong-Gyun Ha, Ung-Bin Oh, Seong-Ook Jung. 1-3 [doi]
• A 200Gb/s, 3.5pJ/bit Monolithically Integrated WDM SiPhotonic Transceiver for Chiplet Optical I/OQianli Ma, Ang Li, Yongliang Xiong, Yingjie Ma, Haoran Yin, Han Liu, Minye Zhu, Menghan Yang, Ye Jin, Daofa Wang, Peng Wang, Yang Qu, Yujun Xie, Guike Li, Liyuan Liu, Nan Qi, Ming Li. 1-3 [doi]
• Where do Innovations stem from?: Further Innovations Beyond Silicon TechnologyYun-Tae Lee. 1-3 [doi]
• 2 0.13-pJ/bit 9-21-Gb/s Sampling CDR with Inverter-Based Frequency Multiplier and Embedded 1: 3 DEMUX in 65-nm CMOSZhicheng Dong, Xiaoteng Zhao, Zekai Yang, Xianting Su, Haolin Han, Feng Bu, Rong Zhou, Depeng Sun, Yong Chen 0005, Shubin Liu, Ruixue Ding, Zhangming Zhu. 1-3 [doi]
• A 3-to-40 GHz 64QAM/256QAM/4096QAM Zero-IF CMOS Transceiver Chipset for Millimeter-wave Software-defined RadiosWenjing Ye, Wei Deng 0001, Haikun Jia, Jingling Zhang, Linjun Gu, Fuyuan Zhao, Ruichen Wan, Baoyong Chi. 1-3 [doi]
• ROC-Spin: A 28nm 2, 000 Ring-Oscillator-Collapse Spins for Solving Combinatorial Optimization ProblemsYuqi Su, Anh-Tuan Do, Tony Tae-Hyoung Kim, Bongjin Kim. 1-3 [doi]
• A 26.5-to-29.5GHz Transformer-Based Doherty Phased-Array Transceiver Front-End With 7-Bit Phase Shifter and 16% Back-Off Drain EfficiencyShaogang Wang, Huiyan Gao, Hang Lu, Nayu Li, Chunyi Song, Qun Gu, Zhiwei Xu 0003. 1-3 [doi]
• A 4-Phase Integrated Voltage Regulator with In-Package Inductors Achieving 89.0% Peak Efficiency and 65% Droop Improvement for 6A/2ns TransientKai Yuan, Chenzhou Ding, Junmin Jiang, Tiantian Tang, Junyi Ruan, Yelei Xie, Faen Liu, Shuguo Jiang, Tao Liu, Ka Nang Leung, Xun Liu. 1-3 [doi]
• A 428.4mW 6.78Mbps/3.61Mbps Up/Down Data Rate Wireless Chipset with TinyAI RegulationYunfang Zhang, Zhijie Lin, Peiyi Zhou, Jie Zhang, Zhezhi He, Hong Zhang, Yongfu Li, Yong Lian, Yang Zhao. 1-3 [doi]
• ANVMP: A 28nm 52.6 μW 1.25pJ/SOP Asynchronous Non- Volatile-Memory-based Computing-In-Memory Neuromorphic Processor for Edge-Al ApplicationsJilin Zhang, Qiumeng Wei, Dexuan Huo, Tao Li, Bin Gao 0006, He Qian, Huaqiang Wu, Kea-Tiong Tang, Hong Chen 0002. 1-3 [doi]
• A 1.27-mW Battery-Powered Multimodal Biosensor Interface IC for Wireless Motion Intention Recognition in Wearable RobotsJimin Koo, Haidam Choi, Yoontae Jung, Ji-Hoon Suh, Sein Oh, Changhun Seok, Yegeun Kim, Injun Choi, Heewon Choee, Sunglim Han, Jiho Chun, Hoyong Seong, Sohmyung Ha, Minkyu Je. 1-3 [doi]
• A Single-Ended Offset-Compensating Bit-Line Sense-Amplifier with Ground Precharge and Charge Transfer Pre sensing for Sub-1V DRAMChangyoung Lee, Youngseok Park, Hyunchul Yoon, Seryeong Yoon, Donggeon Kim, Bokyeon Won, Junhwa Song, In-Jae Bae, Jaejoon Song, Kyuchang Kang, Jaehyuk Kim, Kyungrak Cho, Incheol Nam, Jungdon Ihm, Young Hun Seo, Changsik Yoo, Sang-Jun Hwang. 1-3 [doi]
• A 185-μW, ±2.5-ppm -40°C-80°C Analog TCXO With A Differential-Pair-Based Polynomial Temperature Compensation TechniqueChia-Hsi Fang, Chun-Yu Lin, Shuan Yang, Shan-Chih Tsou, Shon-Hang Wen, Kuan-Dar Chen, Tsung-Hsien Lin. 1-3 [doi]
• A Single-Channel 3.1GS/s 45dB SNDR Pipelined ADC using Amplify-and-Select Structure in 28nm CMOSJaejin Kim, Jintae Kim. 1-3 [doi]
• A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS ReceiverSatoshi Tanaka, Shinsuke Hara, Kyoya Takano, Akifumi Kasamatsu, Yoshiki Sugimoto, Kunio Sakakibara, Shunichi Kubo, Takeshi Yoshida, Shuhei Amakawa, Minoru Fujishima. 1-3 [doi]
• PRIM-CAEFA: A 64K-spin Packet-based Reconfigurable Ising Machine with Cross-problem Adjustment-free Energy Feedback AnnealingYingna Huang, Chne Wuen Tsai, Jiaer Chen, Zhongqi Li, Longyang Lin, Jiamin Li, Jerald Yoo. 1-3 [doi]
• A Tiny 3.15-43.4-GHz 3.6-mW Divide-by-8 Ring-Based Injection-Locked Frequency Divider Using Multiphase Waveform Gating TechniqueFeifan Hong, Xi Chen 0070, AnDing Zhu, Robert Bogdan Staszewski, Teerachot Siriburanon. 1-3 [doi]
• A 3-D Ising Machine with 12-Way Supply-and-Bulk Injection Locking Oscillators for Combinatorial Problem SolvingJiaer Chen, Yingna Huang, Jiamin Li, Longyang Lin, Han Wu 0003, Jerald Yoo. 1-3 [doi]
• A 24% Efficient, 15.36 dBm Output Power, Multi-Standard Digital Polar Transmitter with 7-bit Phase Interpolator-based BFSK Modulator and 23 dB Sidelobe Suppressed PA for Low-Power Wide Area NetworksHafiz Usman Mahmood, Keun-Mok Kim, Thinh Tran-Dinh, Jinglong Xu, Abdul Qahir, Jinho Ko, Jusung Kim, Sang-Gug Lee 0001, Kyung-Sik Choi. 1-3 [doi]
• A 10kHz-BW 24.9μW 90.1dB SNDR Noise-Shaping SAR ADC With Complementary Parametric AmplifiersYifan Chen, Lei Qian, Yifan Zhao, Wei Chen, Liang Qi, Yongfu Li, Yan Liu. 1-3 [doi]
• A nMOS-Only Pulse-Width Modulation CMOS Imager with Body Effect Mitigation Using Differential Comparison TechniqueYu-Tang Shen, John Carl Joel Salao Marquez, Chih-Cheng Hsieh. 1-3 [doi]
• A cryogenic pulse shaper for spin qubit control utilizing 1ns-time-resolution ADCs on an active silicon interposer operating at sub-100 mK temperaturesRyozo Takahashi, Yusuke Kanno, Takuji Miki, Nobuhiro Kusuno, Hiroyuki Mizuno, Makoto Nagata. 1-3 [doi]
• A W-band Omnidirectional FMCW Radar with 18.18dBm Pout 6.76dB NF 52dB Isolation for 4.7cm Resolution and 10m Detection DistanceLiang Zhang, Yunbo Rao, Kun Huang, Xu Cheng, Jiangan Han, Xianhu Luo, Fengjun Chen, Renai Chen, Jun Jiang, Jianfei An, Binbin Cheng, Xianjin Deng, Hao Gao 0001. 1-3 [doi]
• A 13-34 TOPS/W Edge-AI Processor Featuring Booth-Value-Confined Accelerator, Near-Memory Computing, and Contiguity-Aware MappingQuan Cheng, Longyang Lin, Mingqiang Huang, Qiufeng Li, Zhengke Yang, Liuyao Dai, Hao Yu 0001, Yu-Jen Chen, Yiyu Shi 0001, Masanori Hashimoto. 1-3 [doi]
• 35-60GHz Switchless IF Bi-Directional Amplifier Using 65nm CMOS for 300GHz-Band TransceiversAbanob Shehata, Hans Herdian, Chun Wang, Chenxin Liu, Kazuaki Kunihiro, Hiroyuki Sakai 0009, Atsushi Shirane, Kenichi Okada 0001. 1-3 [doi]
• A 0.04 μJ/ Classification High-Accuracy Energy-Efficient ECG Processor with SNN On-Chip Backpropagation and Adaptive Threshold EncodingHaodong Fan, Junlu Zhou, Zilong Guo, Zhiyuan Chang, Xi Yang, Zhicheng Hu, Jiahao Zeng, Shuisheng Lin, Liang Zhou, Jun Zhou 0017, Li Zhang, Jinxi Huang, Jianlei Su, Wei Gao, Qiang Wu, Liang Chang 0002. 1-3 [doi]
• 3 corner and 192.6dBc/Hz FoMFeng Gao, Yuxiao Zhao, Yulin Xie, Zhongyuan Ying, Hao Min. 1-3 [doi]
• A TFT-Based Flexible PPG Acquisition Circuit in a 3-μm LTPS Process for Packaging-Free Smart Ring ApplicationsHanbo Zhang, Yuqing Lou, Yang Bo, Zhouchen Ma, Hao Wu 0007, Liang Qi 0002, Yongfu Li 0002, Xiaojun Guo, Guoxing Wang, Jian Zhao 0004. 1-3 [doi]
• An 8.1-to-353 TOPS/W Energy-Aware Deep-Learning Accelerator Supporting Dynamic Neural NetworksTing-Yang Chen, Yi-Lin Lo, Tun-Yu Chang, Chia-Hsiang Yang. 1-3 [doi]
• A 97.1% Buck-Boost Battery Charger with a Constant Current Extension Technique for 2x Faster Battery Charging with Accurate Termination of Charging ProcessChun-Yuan Chen, Yu-Tse Shih, Ming-Che Tu, Yung-Hsuan Yen, Ke-Horng Chen, Tsung-Heng Tsai, Kuo-Lin Zheng, Ying-Hsi Lin, Min-Chu Chien. 1-3 [doi]
• A 130-to-170 GHz Reconfigurable Heterodyne/Homodyne Transceiver Achieving 20.5-dBm Psat for Emerging Integrated Wireless Access and Backhaul NetworksQixiu Wu, Wei Deng 0001, Ziyuan Guo, Haikun Jia, Taikun Ma, Qiuyu Peng, Chang Liu, Baoyong Chi. 1-3 [doi]
• Similarity-Aware Transposable SRAM Computation-In-Memory with Pulse-Based SAR ADCYong-Jun Jo, Chufeng Yang, Yuanjin Zheng, Tony Tae-Hyoung Kim. 1-3 [doi]
• A Passive IoT Bidirectional Tag Demonstrating 95m Downlink through Antenna-Array-Based Power-Data-Fusion TechniqueGuanjie Gu, Xin Hu, Qijing Xiao, Yuxuan Luo, Bo Zhao. 1-3 [doi]
• A 43.3 bit/cycle Inflate Accelerator Featuring Static-Dynamic Huffman Decoder with Multiple Checkpoints and Optimized End-Of-Block Control for Hyperscale dataWei Zhang, Yiwei Luo, Yangyi Zhang, Jiaqi Ouyang, Guodong Wang, Xianglong Wang, Gang Shi, Lei Chen, Fengwei An. 1-3 [doi]
• A 39-Gb/s PAM-3 Transmitter and ADC-Based Receiver Chipset in CMOS TechnologiesYen-Po Lin, Chun-Chang Lu, Mei-Hsuan Lu, Yueh-Cheng Tsai, Ping-Hsuan Hsieh, Pen-Jui Peng. 1-3 [doi]
• 3 98.0% Peak Efficiency 48V-to-12V Switch Tank Converter Controller with Integrated Multilevel Driver and Adaptive ZCS On-time ControlZhiyi Lin, Xin-Ce Gong, Xin-ming, Jia-Hui Huang, Bo Zhang 0027. 1-3 [doi]
• A 16-30Gb/s 1.03pJ/b Referenceless Baud-Rate CDR with Integrated Pattern Decoding Technique for Fast Frequency AcquisitionYoojin Jung, Young-Wook Kim, Sinho Lee, Suil Kang, Kwanseo Park. 1-3 [doi]
• A 6.4Gb/s/pin HBM3 Digital PHY with Low-Power, Area-Efficient Techniques for Chiplet-Based AI processors in 12-nm CMOSJaewoong Choi, Yi-Gyeong Kim, Juyeob Kim, Jaehoon Chung, Young-Deuk Jeon, Min Hyung Cho, Sujin Park, Jinho Han. 1-3 [doi]
• RMMIC: A 40 μW Reconfigurable Multi-modal Multi-channel Interface Circuit System for Bio-signals MonitoringTing Zhou, Jiajie Huang, Chao Wang 0101, Yuzhi Hao, Yuxin Ji, Zhiwen Gu, Zhuo Gao, Feng Yang, Yuhang Zhang 0008, Yang Zhao 0007, Jian Zhao 0004, Yan Liu 0016, Mingyi Chen, Guoxing Wang, Yong Lian 0001, Yongfu Li 0002. 1-3 [doi]
• An Area-Efficient PVT-Dependent Adaptive Assist Termination Technique with SNM Detector for High Density SRAMShunya Nagata, Daiki Kitagata, Kouji Satou, Daisuke Nakamura, Koji Tanaka, Miki Tanaka, Haruyuki Okuda, Kenichiro Takiguchi. 1-3 [doi]
• nd-Order TIA Achieving 110MHz RF-BW and 13dBm OB-IIP3Gengzhen Qi, Pui-In Mak. 1-3 [doi]
• A 32×32 SPAD LiDAR Sensor with In-pixel Spatial-temporal Coincidence and Per-SPAD Pulse Delay for Resolution-lossless ImagingBu Chen, Zhangcheng Huang 0001, Jingyi Wang, Hongyang Shang, Hankun Lv, Qi Liu 0010, Ming Liu 0022. 1-3 [doi]
• A Fully Integrated 4: 1 DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators Achieving 74.5% Peak Efficiency and 0.78W/mm² Peak Power DensityDonghyeok Cho, Taekwang Jang, SeongHwan Cho. 1-3 [doi]
• A Wireless Battery-Free Cerebral-Oxygen-Monitoring Micro-System Featuring 0.028% Sensing ResolutionWeixiao Wang, Boyu Zhu, Yangfan Xuan, Yili Shen, Qijing Xiao, Zhiyu Wang, Yuxuan Luo, Gang Pan 0001, Bin Su, Bo Zhao 0003. 1-3 [doi]
• A 1.92nJ/Conv Pulse-Width Locked-Loop Time Domain Readout IC with VCO-Integrator and Pipeline TDC for Wheatstone Bridge Wearable Strain Sensing SystemSiyuan Xu, Longhuang Li, Yiyang Du, Huiru Yang, Huaiyu Ye, Huan Hu. 1-3 [doi]
• A Multi-Node Body-Channel-Communication System Using Adaptive Gain Control with ExG Readout ICs for Moving VR UsersDongyoon Lee, Song-I Cheon, Hyungjoo Cho, Seonghyun Park 0005, Jiho Chun, Haidam Choi, Gichan Yun, Yoonsang Cho, Sohmyung Ha, Minkyu Je. 1-3 [doi]
• A 1.06V 5Gb/s/pin 16Gb LPDDR4x DRAM Adopting Sense Amplifier with AC-Coupled Equalizer, Stacked Output Driver, and Clock MUX with Inverter-Based Transmission Gate for Mobile and Automotive ApplicationYoung-Gil Go, Hyun-A. Ahn, Yoo-Chang Sung, Myung-Hun Jung, Ji-Geon Yeom, Hun-Dae Choi, Janghoo Kim, Hyunjin Ko, Miyoung Woo, Seong-O. Huh, Seung-Jun Bae, Tae-young Oh. 1-3 [doi]
• A 4-nm 9.6-Gb/s/pin LPDDR5X PHY With Adaptive Driver Strength Control and Fast Periodic Training for Full DVFS DRAMYoonjae Choi, Jaegeun Song, Daero Kim, Myunggon Kim, Jiyeon Park, Jinho Choi, Changki Kwon, Minho Seo, Jihun Oh, Shinyoung Yi 0002, Billy Koo, Kwanyeob Chae, Jongshin Shin. 1-3 [doi]
• A Compact Low-power 16b SAR ADC using Reservoir-Charge-Redistributed DAC and Configurable Floating-Inverter-Based ComparatorChenxi Yuan, Xianghui Pan, Zihao Zheng, Yan Song, R. P. Martins, Yan Zhu 0001, Chi-Hang Chan. 1-3 [doi]
• 2 80Mb/s-to-15.96Gb/s C-PHY and D-PHY Combo Receiver with Background Calibrations in 4nm FinFETWoongki Min, Soo-Min Lee, Taejin Jang, Yunsik Jo, HyoungJoong Kim, Younggyun Oh, Myeong-Cheol Kim, Hyeonji Han, Cheolhwan Lim, Seungjun Lee, Jihoon Lee, Yon Jun Shin, Sangho Kim, Jongwoo Lee. 1-3 [doi]
• A 400 × 112 CMOS LiDAR Sensor with Reconfigurable-Resolution Histogramming Time-to-Digital Converters and Sub-cm Depth Refining FilterWonjong Roh, Hyeongseok Seo, Canxing Piao, Heesung Lee, Minkyung Kim 0014, Myung-Jae Lee, Seong-Jin Kim, Jung-Hoon Chun, Jaehyuk Choi 0001. 1-3 [doi]
• A W-Band Scalable 1 × 4 Phased-Array Transmitter Front-End with >15/17 dBm OP1dB/Psat in SiGe BiCMOSZongxiang Wang, Jixin Chen, Peigen Zhou, Ziyi Han, Yuyang Xia, Huanbo Li, Zhe Chen, Wei Hong. 1-3 [doi]
• A 1.3mW 10MHz-BW 71dB-SNDR Two-Step TDCAssisted Continuous-Time Noise-Shaping SAR ADCSein Oh, Gichan Yun, Heewon Choee, Yoontae Jung, Jimin Koo, Sohmyung Ha, Minkyu Je. 1-3 [doi]
• A Compact Optical Image Stabilization Chip with Actuator Trackability Improvement Controller and Double Offset Cancel Hall Amplifier to Improve Camera Shake CorrectionWataru Saito, Yoichi Iizuka, Tetsuya Takahashi, Toshiya Suzuki, Hiroto Suzuki, Masatomo Shoji, Fukashi Morishita. 1-3 [doi]
• A 0.40pJ/Spike 10μs-Latency Asynchronous Spiking Neural Network with Compact Nonideality-Tolerating CIM-Synapses for Always-On Near-Sensor AILichen Feng, Hongwei Shan, Libo Qian, Zhangming Zhu. 1-3 [doi]
• A 24V-to-1.8V Low Input Current Ripple SC Hybrid Converter with Conducted EMI Noise Suppression Mechanism for Automobile ApplicationYu-Tse Shih, Jen-Wei Chang, Tz-Han Hsu, Wei-Chieh Hung, Yu-Jia Wei, Ke-Horng Chen, Tsung-Heng Tsai, Kuo-Lin Zheng, Ying-Hsi Lin, Min-Chu Chien. 1-3 [doi]
• A 33.6nW Capacitively Coupled Chopper Amplifier with Stacked Input-Boosted Gate-and-Bulk-Driven Inverter Achieving 0.59 NEF and 0.42 PEF in 180nm CMOSKe Hu, Jiangchao Wu, Bo Wang 0012, Man Kay Law. 1-3 [doi]
• A 13.75-14.75-GHz 32.1-fsRMS Jitter -100.6-dBc Reference Spur -261.4-dB FoM Sub-Sampling PLL Using a KPD-Doubled Isolated Sub-Sampling Phase Detector for Reliable Spur-Jitter-Joint OptimizationYiqing Xu, Yixi Li, Zhao Zhang 0004, Nan Qi, Jian Liu 0021, Nanjian Wu, Liyuan Liu. 1-3 [doi]
• A 5.76GS/s 180MHz-BW 74.1dB-DR 2x TI Extrapolated CT DSM with Broadband Hybrid-Inputs Current-Mode Adder in 28nm CMOSYuekai Liu, Meng Guo, Yichen Jin, Yan Liu 0016, Mingqiang Guo, Sai-Weng Sin, Zhichao Tan, Liang Qi 0002. 1-3 [doi]
• KDA: Kyber and Dilithium Accelerator for CRYSTALS Suite of Post-Quantum Cryptography in Hybrid Multipath Delay Commutator Pipelined ArchitectureAobo Li, Zehao Li, Jingyang Tang, Yuncheng Lu. 1-3 [doi]
• An All-digital, 3.68 mV/LSB Voltage Sensor based Droop Prediction and Fast Mitigation System in 28nm CMOSYuxuan Du, Kaize Zhou, Zhuo Chen, Lishuo Deng, Tuo Li, Yan Lu, Weiwei Shan. 1-3 [doi]
• An Energy-Efficient Composite Phase Shift 16-QAM Frequency Multiplying TX Achieving a 3.4% EVM in 65nm CMOSKaiyuan Luo, Wending Ding, Chung-Ching Lin, Huan Hu. 1-3 [doi]
• LPNA: A 2.75 ms Low-Latency and 0.40 uJ/point Energy-Efficient LiDAR Point-Cloud Neural Network Accelerator with Cylindrical Bin PartitioningBokyoung Seo, Jueun Jung, Donghyeon Han, Kyuho Jason Lee. 1-3 [doi]
• A 28nm CMOS 12-bit-600-MS/s 15.6mW Pipelined ADC with Two-Stage Gainboosting FIA-based RABo Gao, Lizhen Zhang, Raymond Mabilangan, Chang-Un Park, Kent Edrian Lozada, Ho-Jin Kim, Youngjae Cho, Michael Choi, Seung-Tak Ryu. 1-3 [doi]
• A 28nm 76.25TOPS/W RRAM/SRAM-Collaborative CIM Fine-Tuning Accelerator with RRAM-Endurance/Latency-Aware Weight Allocation for CNN and TransformerChen Mu, Zhirui Huang, Hao Jiang 0024, Jie Liao, Bo Jiao, Yuliang Zhou, Haozhe Zhu, Jianguo Yang, Qi Liu 0010, Chixiao Chen. 1-3 [doi]
• 2 DRAM-Free QLC Compute-in-ROM Macro Supporting High Task-Level Inference Energy Efficiency for Tiny AI Edge DevicesLing-An Cheong, Chen Wang, Mufeng Zhou, Tianyu Liao, Mingyen Lee, Yue Ke, Wenjun Tang, Yiming Chen, Xirui Du, Yongpan Liu, Huazhong Yang, Xueqing Li 0002. 1-3 [doi]
• A 16nm 231mW Channel MLP Optimized Neural Processing Unit for 80.3% Top-1 ImageNet Classification Accuracy at 102fpsYong-Tai Chen, Hong-Chuan Liao, Hui-Yun Tsai, Kai-Feng Chang, Chao-Tsung Huang. 1-3 [doi]
• A -51dBc-Reference-Spur and 66fsrms-Jitter D-Band PLL with Complementary Power-Gating Injection-Locked Frequency-Multiplier-Based Phase DetectorJaeho Kim, Jooeun Bang, Seohee Jung, Myeongho Han, Jaehyouk Choi. 1-3 [doi]
• SRAM Physically Unclonable Function Extracting Static Entropy from Every Bitcell Transistor for 6 bit/bitcell and Data Fingerprinting Capability for Provenance AssuranceTianqi Wang, Joydeep Basu, Viveka Konandur Rajanna, Massimo Alioto. 1-3 [doi]
• 2 Level Crossing ADC for Compressive Neural Sensing with Event-Driven Ramp Generation and Sparse DAC Switching SchemeStan van der Ven, Yuming He, Martijn Timmermans, Hua-Peng Liaw, Pieter Harpe, Roland Van Wegberg, Eugenio Cantatore, Yao-Hong Liu. 1-3 [doi]
• Compact Hybrid Strong SOIPUF Exploiting Secret Key Generation and Dual-Edge Response Extraction for Enhanced Modeling Attack ResistanceLitao Zhang, Chongyao Xu, Man Kay Law. 1-3 [doi]
• A 66.6 FPS High Quality Gaussian Splats Rendering FPGA Processor with Reconfigurable Computation ArchitectureHongseok Lee, Gwangtae Park, Wonhoon Park, Wooyoung Jo, Jongjun Park, Hoi-Jun Yoo. 1-3 [doi]
• A 0.9V CMOS Voltage Reference with 0.41% Untrimmed Accuracy and 44.7 ppm/°C TC from -35°C to 130°CXuanlin Chen, Jiangchao Wu, Bo Wang 0012, Man Kay Law. 1-3 [doi]
• A 75.6Gb/S 22-Bit Floating-Point Reconfigurable DSP Accelerator Embedding 2048×256-Point Complex FFT and 26K-Point 1-D Signal ProcessingXuanzhe Xu, Xianjun Liu, Siyuan Wei, Shuangming Yu, Runjiang Dou, Xu Yang 0017, Zhe Wang, Jian Liu 0021, Nanjian Wu, Liyuan Liu. 1-3 [doi]
• Development and Applications of a Memory-Traffic-Efficient Convolutional Neural NetworkYoun-Long Lin. 1-3 [doi]
• 2/b and 2007 TOPS/W/b Ternary Latch Based Sparsity-Aware CIM Macro With Double-Sampling Ternary ADCMyoung Kim, Hoichang Jeong, Woo Seok Kim, Yesong Jeong, Young Eun Choi, Junyoung Park 0002, Min-Woo Ryu, Yong Kyu Lee, Kyuho Jason Lee, Kyung Rok Kim. 1-3 [doi]
• A Real-Time Event Vision Sensor based Object Detection and Tracking System for Edge ApplicationsYuncheng Lu, Yucen Shi, Zehao Li, Junying Li, Tony Tae-Hyoung Kim. 1-3 [doi]
• A Fully Integrated 400MHz Band Transceiver with a 96Mbps 16QAM Transmitter and a Phase Tracking Receiver in 40-nm CMOSHeng Huang, Xiliang Liu, Zijian Tang, Wei Song, Yuan Ma, Ruixuan Pei, Yuwei Zhang 0012, Xiaoyan Ma, Milin Zhang 0001, Jintao Wang 0001, Kai Lu, Zhihua Wang, Guolin Li. 1-3 [doi]
• 22-nm Data Backup SRAM Using 3.3V IO MOSs with Ultralow-Voltage-Drop Erasure Technique for Secure IoT ApplicationsDaiki Kitagata, Shunya Nagata, Kouji Satou, Daisuke Nakamura, Koji Tanaka, Miki Tanaka. 1-3 [doi]
• An 8-bit 20.2fJ/conv-step FoM CI-C Asynchronous SAR ADC with Common-mode Level ShiftingSeungjun Song, Kyungmin Lee, Hyungil Chae. 1-3 [doi]
• TID-Tolerant StrongARM Comparator and Sampling Network for Satellite Application High-Voltage ADCsCharlie Tahar, Changyeop Lee, Kun-Woo Park, Kent Edrian Lozada, Hyojun Kim, Ki-Ho Kwon, Seung-Tak Ryu. 1-3 [doi]
• A 639.38GOPS Hybrid-Domain Logic-Compatible Multi-Level Embedded Flash Computing-in-Memory Macro with Spike-Edge ComputationJiho Chun, Edward Jongyoon Choi, Byeongseon Choi, Donghyeon Yi, Sohmyung Ha, Ik Joon Chang, Minkyu Je. 1-3 [doi]
• A 31.92% Efficiency Colpitts DCO-PA for BLE TX with Implicit RX Clock Generation Using DM-to-CM Mode-switchingBowen Yu, Kai Xu, Wei Li, Hongtao Xu. 1-3 [doi]
• A 174nW Event-Driven Keyword Spotting ASIC with DC-Drift-Resilient Dual-Mode Delta/SAR Quantizer and Multiplier-Less ProcessorNing Pu, Nan Wu, Kaiji Liu, Yihuai Yang, Siqi Zhang, Sining Pan, Yanshu Guo, Zhihua Wang, Hanjun Jiang. 1-3 [doi]
• A 1.96Vpp Input-Range 3rd-order Noise-Shaping Pipelined-SAR ADC with Self-Boosted Impedance and Active Charge Sharing for Biosignal AcquisitionRucheng Jiang, Chne Wuen Tsai, Ho Yin Benjamin Lee, Fong Jia Yi, Jerald Yoo. 1-3 [doi]
• rd-Order Q-boost Inductors Achieving -191.8-dBc/Hz FoM and -205.4-dBc/Hz FoMAXiangJian Kong, Shuai Deng, Zhao Zhang 0004. 1-3 [doi]
• A 1.2GS/s 11b Time-Interleaved SAR ADC with Low-Cost Derivative-Based Background Timing-Skew Calibration and Variable-Load ComparatorsMingyang Gu, Yunsong Tao, Xiyu He, Yi Zhong, Lu Jie 0001, Nan Sun 0001. 1-3 [doi]
• 2/Grid, 30.7pJ TMRA-PIM (Time-Multiplexed Random-Access Processing-in-Memory) Programmable Accelerator for Partial Differential Equations Solving and Edge ProcessingZhengzhe Wei, Yuqi Su, Tony Tae-Hyoung Kim, Yuanjin Zheng. 1-3 [doi]
• A 16-bit SAR ADC with Capacitor Dielectric Relaxation Effect Canceler in a 22-nm Microcontroller for Multi-Input Channel ApplicationsTomohiko Ebata, Atsushi Ochi, Iori Sakai, Cheng Yuan, Takanobu Nimiya, Daiki Matsumoto, Qiaoyu Wang, Shinsuke Yoshimura, Tetsuo Matsui. 1-3 [doi]
• A PUF-Integrated Power Amplifier with Harmonic Tunable Matching Network-Controlled Spectral Regrowth Technique for RF Fingerprinting in IoTZexin Su, Chang Liu, Zhe Chen, Zhiqiang Li, Guangyin Shi, Qian Luo, Jixin Chen, Wang Ling Goh, Zhengsheng Han, Bo Li. 1-3 [doi]
• A 28-nm 141.4TOPS/W Scalable Reconfigurable Deep Learning SoC for Large-Scale Neural NetworksI-Hsuan Liu, I-Ting Lin, Yueh-Feng Tsai, Jeng-Sheng Hsieh, Vincent Chen, Chuei-Tang Wang, Chia-Hsiang Yang, Douglas C. H. Yu. 1-3 [doi]
• A 10.5 Gbps 0.55 pJ/bit PAM-3 Transceiver Using a Self-driven Dual TIA Receiver and Floating Impedance Matching for Parallel On-chip Transmission LinesDong Hyun Yoon, Junsen He, Kwang-Hyun Baek, Youngdon Choi, Jung Hwan Choi, Tony Tae-Hyoung Kim. 1-3 [doi]
• A 28nm 128-kb Exponent- and Mantissa-Computation-InMemory Dual-macro for Floating-point and INT CNNsAn Guo 0001, Xueshan Dong, Fangyuan Dong, Dongqi Li, Yiran Zhang, Jingmin Zhang, Yuchen Tang, Yuhui Shi, Xiao Tan, Bo Liu 0019, Weiwei Shan, Hao Cai 0001, Jun Yang 0006, Xin Si. 1-3 [doi]
• A Wide Current Range and Fast Transient Flipped Voltage Follower Based Low Dropout RegulatorChunlei Qin, Wing-Hung Ki, Man Kay Law. 1-3 [doi]
• A -60 to 145 °C, 216 fJ·K2 Energy-Efficient MOS-Based Temperature Sensor Achieving 71.8 mK ResolutionJooeun Kim, Jeongmyeong Kim, Minkyu Yang, Kyounghun Kang, Wanyeong Jung. 1-3 [doi]
• A 24.25-29.5-GHz Transmitter with Built-in Automatic Calibration of LO Feedthrough and I/Q Imbalance in 65-nm CMOSHengzhi Wan, Pengfei Diao, Chenyu Xu, Enqi Zheng, Dixian Zhao. 1-3 [doi]
• A 320MHz BW NS TD-ADC Assisted C/DT Hybrid Pipelined ADC with SAB-based Residue Amplifying FilterKai Xing, Yan Zhu 0001, Rui Paulo Martins, Chi-Hang Chan. 1-3 [doi]
• A 5.76 Gb/s 79.7 pJ/b 128×32 Massive Deep-Learning Uplink MIMO Detector in 28nm CMOS TechnologySangbu Yun, Youngjoo Lee. 1-2 [doi]
• rd-Order IntegratorLizhen Zhang, Bo Gao, Kun-Woo Park, Hyeongjin Kim, Kent Edrian Lozada, Ye-Dam Kim, Jianhui Wu 0001, Seung-Tak Ryu. 1-3 [doi]
• A Single/Dual-Output Switched-Capacitor DC-DC Converter with Geometrically Arranged Soft VCR TransitionsDonghee Ko, Doojin Jang, Da Won Kim, Jeongmyeong Kim, Byeongmin Moon, Wanyeong Jung. 1-3 [doi]
• A 45-fsrms Accumulated Jitter PLL Using Advanced Design Techniques for PCIe Gen6 Reference Clock Generation in 2 nm MBCFET TechnologySubhadeep Datta, Arnab Banerjee, Ayush Tripathi, Dongmin Kang, Leesunghyuck, Hasung Lim, Wonsik Yu, Kgj Vishnu, Chanyoung Jeong, Sumanth Chakkirala, Avneesh Singh Verma, Sachin Kashyap, Eg Jeevarathinam, Sunil Kumar Pandey, Jongjae Ryu, Sanjeeb Kumar Ghosh. 1-3 [doi]
• A 2.8-to-7.2GT/s DDR5 Registering Clock Driver IC with Parallel-Data Timing and Pin-to-Pin Skew Calibration for a Dual In-Line Memory ModuleJoomyoung Kim, Jaehong Jung, Kwangmin Lim, Barosaim Sung, Jaekwon Kim, Baekmin Lim, Tae-Gun Noh, Jaehoon Lee 0005, Hyun-Gi Seok, Youngsea Cho, Gyusik Kim, Takahiro Nomiyama, Sunhye Kang, Yeongcheol Jeong, Sanguk Cho, Gyumin Kim, Do-Hyun Oh, JaeNam Kim, Yong Lim, Seungjin Kim, Seunghyun Oh, Jongwoo Lee. 1-3 [doi]
• A 48MHz Temperature Compensated Crystal Oscillator Utilizing Time-Domain Accuracy Boosting Techniques Achieving ±1.4ppm Frequency Stability from -55°C to 115°CJunyang Yin, Wei Deng 0001, Haikun Jia, Minshuo Wang, Baoyong Chi. 1-3 [doi]