A low-power dual-rail inputs write method for bit-interleaved memory cells

Junchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang. A low-power dual-rail inputs write method for bit-interleaved memory cells. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 325-328, IEEE, 2011. [doi]

Abstract

Abstract is missing.