A low-power dual-rail inputs write method for bit-interleaved memory cells

Junchao Chen, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang. A low-power dual-rail inputs write method for bit-interleaved memory cells. In International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil. pages 325-328, IEEE, 2011. [doi]

@inproceedings{ChenCGC11,
  title = {A low-power dual-rail inputs write method for bit-interleaved memory cells},
  author = {Junchao Chen and Kwen-Siong Chong and Bah-Hwee Gwee and Joseph Sylvester Chang},
  year = {2011},
  doi = {10.1109/ISCAS.2011.5937568},
  url = {http://dx.doi.org/10.1109/ISCAS.2011.5937568},
  researchr = {https://researchr.org/publication/ChenCGC11},
  cites = {0},
  citedby = {0},
  pages = {325-328},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2011), May 15-19 2011, Rio de Janeiro, Brazil},
  publisher = {IEEE},
}