Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors

Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson. Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors. In Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010. pages 1572-1577, IEEE, 2010. [doi]

Abstract

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