Xuan Wang, Changyi Yang, Xiaoxiao Zhao, Chao Wu, Fule Li, Zhihua Wang, Bin Wu. A 12-bit, 270MS/s pipelined ADC with SHA-eliminating front end. In 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012, Seoul, Korea (South), May 20-23, 2012. pages 798-801, IEEE, 2012. [doi]
Abstract is missing.