Jingye Xu, Masud H. Chowdhury. Bit Error Rate Analysis for Flip-flop and Latch Based Interconnect Pipelining. In 13th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2006, Nice, France, December 10-13, 2006. pages 1061-1064, IEEE, 2006. [doi]
Abstract is missing.