Post-layout redundant wire insertion for fixing min-delay violations

Jin-Tai Yan, Zhi-Wei Chen. Post-layout redundant wire insertion for fixing min-delay violations. In 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), Beijing, China, May 19-23, 2013. pages 1720-1723, IEEE, 2013. [doi]

Abstract

Abstract is missing.