RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis

Kaiping Zeng, Sorin A. Huss. RAMS: A VHDL-AMS Code Refactoring Tool Supporting High Level Analog Synthesis. In 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), New Frontiers in VLSI Design, 11-12 May 2005, Tampa, FL, USA. pages 266-267, IEEE Computer Society, 2005. [doi]

Abstract

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