Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong Hong. New timing and routability driven placement algorithms for FPGA synthesis. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 570-575, ACM, 2007. [doi]
Abstract is missing.