Abstract is missing.
- Marching-pixels: a new organic computing paradigm for smart sensor processor arraysDietmar Fey, Daniel Schmidt. 1-9 [doi]
- First steps towards organic computing systems: monitoring an adaptive protocol stack with a fuzzy classifier systemThorsten Schöler, Christian Müller-Schloer. 10-20 [doi]
- Balancing clustering-induced stalls to improve performance in clustered processorsAmirali Baniasadi. 21-27 [doi]
- ELDORADOJohn Feo, David Harper, Simon Kahan, Petr Konecny. 28-34 [doi]
- Reversible computing: from mathematical group theory to electronical circuit experimentAlexis De Vos, Yvan Van Rentergem. 35-44 [doi]
- Two-state, reversible, universal cellular automata in three dimensionsDaniel B. Miller, Edward Fredkin. 45-51 [doi]
- Specific ergodicity: an informative indicator for invertible computational mediaTommaso Toffoli, Lev B. Levitin. 52-58 [doi]
- Jalapeno: secentralized grid computing using peer-to-peer technologyNiklas Therning, Lars Bengtsson. 59-65 [doi]
- A two level market model for resource allocation optimization in computational gridLi Chunlin, Li Layuan. 66-71 [doi]
- Reconfigurable universal SAD-multiplier arrayHumberto Calderon, Stamatis Vassiliadis. 72-76 [doi]
- Evaluation of extended dictionary-based static code compression schemesMartin Thuresson, Per Stenström. 77-86 [doi]
- Grid result checkingCécile Germain-Renaud, Dephine Monnier-Ragaigne. 87-96 [doi]
- GRID Based Federated Digital LibraryKurt Maly, Mohammad Zubair, Vamshi Chilukamarri, Pratik Kothari. 97-105 [doi]
- Dynamic loop pipelining in data-driven architecturesJoão M. P. Cardoso. 106-115 [doi]
- Owl: next generation system monitoringMartin Schulz, Brian S. White, Sally A. McKee, Hsien-Hsin S. Lee, Jürgen Jeitner. 116-124 [doi]
- Power and performance optimization at the system levelValentina Salapura, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, Dong Chen, Paul Coteus, Alan Gara, Mark Giampapa, Michael Gschwind, Manish Gupta, Shawn Hall, Ruud A. Haring, Philip Heidelberger, Dirk Hoenicke, Gerard V. Kopcsay, Martin Ohmacht, Rick A. Rand, Todd Takken, Pavlos Vranas. 125-132 [doi]
- Improving quantum circuit dependability with reconfigurable quantum gate arraysMihai Udrescu, Lucian Prodan, Mircea Vladutiu. 133-144 [doi]
- Using a hybrid CA based model for a flexible qualitative qubit simulation: fully frustrated josephson junction ladder (JJL) applicationClaudia Roberta Calidonna, Adele Naddeo. 145-151 [doi]
- Skewed caches from a low-power perspectiveMathias Spjuth, Martin Karlsson, Erik Hagersten. 152-160 [doi]
- Controlling leakage power with the replacement policy in slumberous cachesNasir Mohyuddin, Rashed Bhatti, Michel Dubois. 161-170 [doi]
- Matrix register file and extended subwords: two techniques for embedded media processorsAsadollah Shahbahrami, Ben H. H. Juurlink, Stamatis Vassiliadis. 171-179 [doi]
- Optimizing general purpose compiler optimizationMasayo Haneda, Peter M. W. Knijnenburg, Harry A. G. Wijshoff. 180-188 [doi]
- Transition aware scheduling: increasing continuous idle-periods in resource unitsK. Ananda Vardhan, Y. N. Srikant. 189-198 [doi]
- Scheduling for heterogeneous processors in server systemsSoraya Ghiasi, Tom W. Keller, Freeman L. Rawson III. 199-210 [doi]
- Dynamic run-time architecture techniques for enabling continuous optimizationTipp Moseley, Alex Shye, Vijay Janapa Reddi, Matthew Iyer, Dan Fay, David Hodgdon, Joshua L. Kihm, Alex Settle, Dirk Grunwald, Daniel A. Connors. 211-220 [doi]
- A QoS-enabled packet scheduling algorithm for IPSec multi-accelerator based systemsAlberto Ferrante, Vincenzo Piuri, Fabien Castanier. 221-229 [doi]
- Sparse matrix storage revisitedMalik Silva. 230-235 [doi]
- Contextual information management using contract: based workflowVenu K. Murthy, E. V. Krishnamurthy. 236-245 [doi]
- Communication and security extensions for a ubiquitous mobile agent system (UbiMAS)Faruk Bagci, Holger Schick, Jan Petzold, Wolfgang Trumler, Theo Ungerer. 246-251 [doi]
- A case for a working-set-based memory hierarchySteve Carr, Soner Önder. 252-261 [doi]
- Exploiting processor groups to extend scalability of the GA shared memory programming modelJarek Nieplocha, Manojkumar Krishnan, Bruce Palmer, Vinod Tipparaju, Yeliang Zhang. 262-272 [doi]
- A computing architecture for physicsEdward Fredkin. 273-279 [doi]
- A combined hardware and software architecture for secure computingJörg Platte, Edwin Naroska. 280-288 [doi]
- Reducing misspeculation overhead for module-level speculative executionFredrik Warg, Per Stenström. 289-298 [doi]
- Partially ordered epochs for thread-level speculationBraxton Thomason, Craig Chase. 299-306 [doi]
- A time-predictable execution mode for superscalar pipelines with instruction preschedulingChristine Rochange, Pascal Sainrat. 307-314 [doi]
- SPANIDS: a scalable network intrusion detection loadbalancerLambert Schaelicke, Kyle Wheeler, Curt Freeland. 315-322 [doi]
- Reliability assessment in embryonics inspired by fault-tolerant quantum computationLucian Prodan, Mihai Udrescu, Mircea Vladutiu. 323-333 [doi]
- Improving branch prediction accuracy with parallel conservative correctorsChunrong Lai, Shih-Lien Lu, Yurong Chen, Trista Chen. 334-341 [doi]
- When prefetching improves/degrades performanceThomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan. 342-352 [doi]
- An efficient wakeup design for energy reduction in high-performance superscalar processorsKuo-Su Hsiao, Chung-Ho Chen. 353-360 [doi]
- On the energy-efficiency of speculative hardwareNana B. Sam, Martin Burtscher. 361-370 [doi]
- Exploiting temporal locality in drowsy cache policiesSalvador Petit, Julio Sahuquillo, Jose M. Such, David R. Kaeli. 371-377 [doi]
- Drowsy region-based caches: minimizing both dynamic and static power dissipationMichael J. Geiger, Sally A. McKee, Gary S. Tyson. 378-384 [doi]
- Introduction to reversible computing: motivation, progress, and challengesMichael P. Frank. 385-390 [doi]
- Reversible logic for supercomputingErik DeBenedictis. 391-402 [doi]
- Reversible computation with quantum-dot cellular automata (QCA)Craig S. Lent, Sarah E. Frost, Peter M. Kogge. 403 [doi]
- The electron waveguide y-branch switch: a review and arguments for its use as a base for reversible logicErik Forsberg. 404-406 [doi]
- Fast, efficient, recovering, and irreversibleVisvesh S. Sathe, Juang-Ying Chueh, Joohee Kim, Conrad H. Ziesler, Suhwan Kim, Marios C. Papaefthymiou. 407-413 [doi]
- Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuitsStephan Henzler, Thomas Nirschl, Matthias Eireiner, Ettore Amirante, Doris Schmitt-Landsiedel. 414-420 [doi]
- Implementation of a simple 8-bit microprocessor with reversible energy recovery logicSeokkee Kim, Soo-Ik Chae. 421-426 [doi]
- Scaling trends in adiabatic logicJürgen Fischer, Philip Teichmann, Doris Schmitt-Landsiedel. 427-434 [doi]
- Time, space, and energy in reversible computingPaul M. B. Vitányi. 435-444 [doi]
- Thermodynamical cost of reversible computingLev B. Levitin, Tommaso Toffoli. 445-446 [doi]