Abstract is missing.
- An Exploration of Mechanisms for Dynamic Cryptographic Instruction Set ExtensionPhilipp Grabher, Johann Großschädl, Simon Hoerder, Kimmo Järvinen, Dan Page, Stefan Tillich, Marcin Wójcik. 1-16 [doi]
- FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback ControlMehrdad Majzoobi, Farinaz Koushanfar, Srinivas Devadas. 17-32 [doi]
- Generic Side-Channel Countermeasures for Reconfigurable DevicesTim Güneysu, Amir Moradi. 33-48 [doi]
- Improved Collision-Correlation Power Analysis on First Order Protected AESChristophe Clavier, Benoit Feix, Georges Gagnerot, Mylène Roussellet, Vincent Verneuil. 49-62 [doi]
- Higher-Order Glitches Free Implementation of the AES Using Secure Multi-party Computation ProtocolsEmmanuel Prouff, Thomas Roche. 63-78 [doi]
- Protecting AES with Shamir's Secret Sharing SchemeLouis Goubin, Ange Martinelli. 79-94 [doi]
- A Fast and Provably Secure Higher-Order Masking of AES S-BoxHeeseok Kim, Seokhie Hong, Jongin Lim. 95-107 [doi]
- Software Implementation of Binary Elliptic Curves: Impact of the Carry-Less Multiplier on Scalar MultiplicationJonathan Taverne, Armando Faz-Hernández, Diego F. Aranha, Francisco Rodríguez-Henríquez, Darrel Hankerson, Julio López. 108-123 [doi]
- High-Speed High-Security SignaturesDaniel J. Bernstein, Niels Duif, Tanja Lange, Peter Schwabe, Bo-Yin Yang. 124-142 [doi]
- To Infinity and Beyond: Combined Attack on ECC Using Points of Low OrderJunfeng Fan, Benedikt Gierlichs, Frederik Vercauteren. 143-159 [doi]
- Random Sampling for Short Lattice Vectors on Graphics CardsMichael Schneider 0002, Norman Göttert. 160-175 [doi]
- Extreme Enumeration on GPU and in Clouds - - How Many Dollars You Need to Break SVP Challenges -Po-Chun Kuo, Michael Schneider 0002, Özgür Dagdelen, Jan Reichelt, Johannes Buchmann, Chen-Mou Cheng, Bo-Yin Yang. 176-191 [doi]
- Modulus Fault Attacks against RSA-CRT SignaturesEric Brier, David Naccache, Phong Q. Nguyen, Mehdi Tibouchi. 192-206 [doi]
- Breaking Mifare DESFire MF3ICD40: Power Analysis and Templates in the Real WorldDavid Oswald, Christof Paar. 207-222 [doi]
- Information Theoretic and Security Analysis of a 65-Nanometer DDSLL AES S-BoxMathieu Renauld, Dina Kamel, François-Xavier Standaert, Denis Flandre. 223-239 [doi]
- Thwarting Higher-Order Side Channel Analysis with Additive and Multiplicative MaskingsLaurie Genelle, Emmanuel Prouff, Michaël Quisquater. 240-255 [doi]
- Extractors against Side-Channel Attacks: Weak or Strong?Marcel Medwed, François-Xavier Standaert. 256-272 [doi]
- Standardization Works for Security Regarding the Electromagnetic EnvironmentTetsuya Tominaga. 273 [doi]
- Meet-in-the-Middle and Impossible Differential Fault Analysis on AESPatrick Derbez, Pierre-Alain Fouque, Delphine Leresteux. 274-291 [doi]
- On the Power of Fault Sensitivity Analysis and Collision Side-Channel Attacks in a Combined SettingAmir Moradi, Oliver Mischke, Christof Paar, Yang Li, Kazuo Ohta, Kazuo Sakiyama. 292-311 [doi]
- spongent: A Lightweight Hash FunctionAndrey Bogdanov, Miroslav Knezevic, Gregor Leander, Deniz Toz, Kerem Varici, Ingrid Verbauwhede. 312-325 [doi]
- The LED Block CipherJian Guo 0001, Thomas Peyrin, Axel Poschmann, Matthew J. B. Robshaw. 326-341 [doi]
- Piccolo: An Ultra-Lightweight BlockcipherKyoji Shibutani, Takanori Isobe, Harunaga Hiwatari, Atsushi Mitsuda, Toru Akishita, Taizo Shirai. 342-357 [doi]
- Lightweight and Secure PUF Key Storage Using Limits of Machine LearningMeng-Day (Mandel) Yu, David M'Raïhi, Richard Sowell, Srinivas Devadas. 358-373 [doi]
- Recyclable PUFs: Logically Reconfigurable PUFsStefan Katzenbeisser, Ünal Koçabas, Vincent van der Leest, Ahmad-Reza Sadeghi, Geert Jan Schrijen, Heike Schröder, Christian Wachsmann. 374-389 [doi]
- Uniqueness Enhancement of PUF Responses Based on the Locations of Random Outputting RS LatchesDai Yamamoto, Kazuo Sakiyama, Mitsugu Iwamoto, Kazuo Ohta, Takao Ochiai, Masahiko Takenaka, Kouichi Itoh. 390-406 [doi]
- MECCA: A Robust Low-Overhead PUF Using Embedded Memory ArrayAswin Raghav Krishna, Seetharam Narasimhan, Xinmu Wang, Swarup Bhunia. 407-420 [doi]
- FPGA Implementation of Pairings Using Residue Number System and Lazy ReductionRay C. C. Cheung, Sylvain Duquesne, Junfeng Fan, Nicolas Guillermin, Ingrid Verbauwhede, Gavin Xiaoxu Yao. 421-441 [doi]
- High Speed Cryptoprocessor for η T Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two FieldsSantosh Ghosh, Dipanwita Roy Chowdhury, Abhijit Das. 442-458 [doi]
- Fast Multi-precision Multiplication for Public-Key Cryptography on Embedded MicroprocessorsMichael Hutter, Erich Wenger. 459-474 [doi]
- Small Public Keys and Fast Verification for $\mathcal{M}$ ultivariate $\mathcal{Q}$ uadratic Public Key SystemsAlbrecht Petzoldt, Enrico Thomae, Stanislav Bulygin, Christopher Wolf. 475-490 [doi]
- Throughput vs. Area Trade-offs in High-Speed Architectures of Five Round 3 SHA-3 Candidates Implemented Using Xilinx and Altera FPGAsEkawat Homsirikamol, Marcin Rogawski, Kris Gaj. 491-506 [doi]
- Efficient Hashing Using the AES Instruction SetJoppe W. Bos, Onur Özen, Martijn Stam. 507-522 [doi]