Abstract is missing.
- Computer Architecture and Technology: Some Thoughts on the Road AheadMichael J. Flynn, Patrick Hung. 3-16
- From Here to Main-stream: The Present and Future of Reconfigurable ComputingWalid A. Najjar. 17
- Customisable Hardware CompilationTim Todman, José Gabriel F. Coutinho, Wayne Luk. 18-28
- Computing Without ProcessorsSeth Copen Goldstein. 29-32
- A Power-Performance Trade-off Methodology for Portable Reconfigurable PlatformsJawad Khan, Balasubramanian Sethuraman, Ranga Vemuri. 33-37
- Energy-Efficiency of the MONTIUM Reconfigurable Tile ProcessorPaul M. Heysters, Gerard J. M. Smit, Egbert Molenkamp. 38-44
- Overview of the Tool-flow for the Montium Processor TileGerard J. M. Smit, Michèl A. J. Rosien, Yuanqing Guo, Paul M. Heysters. 45-51
- Distinguished Paper: A New General Model for Adaptive ProcessorsStephan Gatzka, Christian Hochberger. 52-62
- Virtualization of Hardware - Introduction and SurveyChristian Plessl, Marco Platzner. 63-69
- A Comparative Study on System Approaches for Partially Reconfigurable ArchitecturesHeiko Kalte, Markus Koester, Boris Kettelhoit, Mario Porrmann, Ulrich Rückert. 70-76
- Area Fragmentation in Reconfigurable Operating SystemsManish Handa, Ranga Vemuri. 77-83
- QOS Aware HW/SW Partitioning on Run-time Reconfigurable Multimedia PlatformsNam Pham Ngoc, Gauthier Lafruit, Jean-Yves Mignolet, Geert Deconinck, Rudy Lauwereins. 84-92
- Low-Cost Space-Borne Processing on a Reconfigurable Parallel ArchitectureT. Bretschneider, B. Ramesh, V. Gupta, Ian Vince McLoughlin. 93-99
- Experiences with a Reconfigurable ComputerDuncan A. Buell, James P. Davis, Gang Quan, Sreesa Akella, Siddhaveerasharan Devarkal, P. Kancharla, Allen Michalski, Heather A. Wake. 100-108
- Physical Resource Binding for a Coarse Grain Reconfigurable ArrayFred Ma, John P. Knight, Calvin Plett. 109-115
- Implementing Multi Threaded System Support for Hybrid FPGA/CPU Computational ComponentsRazali Jidin, David L. Andrews, Douglas Niehaus. 116-122
- Genetic Algorithms in Hardware-Software PartitioningMadhura Purnaprajna, Marek Reformat, Witold Pedrycz. 123-129
- The Task-Resource Matrix: Control for a Distributed Reconfigurable Multi-Processor Hardware RTOSSpencer Isaacson, Doran Wilde. 130-136
- Distinguished Paper: Automatic Local Memory Architecture Generation for Data Reuse in Custom Data PathsPer Andersson, Krzysztof Kuchcinski. 137-144
- Dynamo: A Runtime Partitioning SystemLaurie A. Smith King, Miriam Leeser, Heather Quinn. 145-154
- System-Level Runtime Reconfigurablity - Optical Interconnection Networks for Switching ApplicationsSacki Agelis, Magnus Jonsson. 155-162
- Embedded Linux as a Platform for Dynamically Self-Reconfiguring Systems-on-ChipJohn W. Williams, Neil Bergmann. 163-169
- H-Tree Interconnection Structure for Reconfigurable DSP HardwareMitchell J. Myjak, Fredrick L. Anderson, José G. Delgado-Frias. 170-176
- Two-level Reconfigurable Architecture for High-Performance Signal ProcessingDennis Johnsson, Jerker Bengtsson, Bertil Svensson. 177-183
- Distinguished Paper: Automated Combination of Simulation and Hardware PrototypingTero Rissa, Wayne Luk, Peter Y. K. Cheung. 184-193
- Customizing Processor Cores to Support ReactivityZoran A. Salcic, Partha S. Roop. 194-202
- Partial-DNA Supported Artificial-Life in an Embryonic ArrayX. Zhang, Gabriel Dragffy, Anthony G. Pipe, Quan M. Zhu. 203-208
- An FPGA-Based Accelerator for Multiphysics ModelingXin-Ming Huang, Jing Ma. 209-212
- A Portable Face Recognition System Using Reconfigurable HardwareJawad Khan, Jayanthi Rajagopalan, Renqiu Huang, Ranga Vemuri. 213-217
- A High Performance Application Representation for Reconfigurable SystemsWenrui Gong, Gang Wang, Ryan Kastner. 218-224
- Task Scheduling of Control-Data Flow Graphs for Reconfigurable ArchitecturesArvind Sudarsanam, Aravind Dasu, Sethuraman Panchanathan. 225-231
- A Reconfigurable Approach to Structural Engineering Design ComputationsZafer Gürdal, Tom Hartka, Mark Jones, Sun Wook Kim. 232-239
- Incremental Timing Budget Management in Programmable SystemsElaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahashi, Majid Sarrafzadeh. 240-246
- Distinguished Paper: High-Visibility Debug-by-Design for FPGA PlatformsPeter Bellows. 247-258
- On the Use of FPGAs for OFDM Signal ProcessingChris Dick, Fred Harris. 259-263
- Invited Paper: Energy-Efficient Computations on FPGAsViktor K. Prasanna. 264-275
- Efficient Floating-point Based Block LU Decomposition on FPGAsGokul Govindu, Viktor K. Prasanna, Vikash Daga, Sridhar Gangadharpalli, V. Sridhar. 276-279
- A Methodology for Energy Efficient Application Synthesis Using Platform FPGAsJingzhao Ou, Viktor K. Prasanna. 280-283
- Computing Lennard-Jones Potentials and Forces with Reconfigurable HardwareRonald Scrofano, Viktor K. Prasanna. 284-292
- A Reconfigurable Computing Model for Biological ResearchJ. Yardley, K. Gilson. 293-295
- Cluster Extraction for Hybrid FPGA Architecture in Computation Intensive ApplicationsAli Akoglu, Aravind Dasu, Sethuraman Panchanathan. 296
- VTSim: A Virtex-II Device SimulatorJesse Hunter, Peter Athanas, Cameron Patterson. 297-298
- Testing Method for Optical Connections Using Gate Array Structure in ORGAsMinoru Watanabe, Fuminori Kobayashi. 299-302
- A Multi-Objective System Level Synthesis Approach to Reconfigurable Analog TechnologyOtsebele E. Nare, Lisa P. Mickens, Charles T. Johnson-Bey. 303-304
- Design Enumeration of Mapping 2D FFT onto FPGA Based Reconfigurable ComputersXinzhong Guo, Jack S. N. Jean. 305-306
- XF-Board: A Prototyping Platform for Reconfigurable Hardware Operating SystemsHerbert Walder, Samuel Nobs, Marco Platzner. 306
- Distributed Configuration Management for Reconfigurable Cluster ComputingAju M. Jacob, Ian A. Troxel, Alan D. George. 307
- Hardware Software Codesign of the Xilinx MicrokernelVasanth Asokan, S. Mohan, Raj K. Nagarajan. 308
- An Adaptive Load Distribution Model and Design on Self-Reconfigurable Logic DeviceShinichi Koyama, Tomonori Izumi, Yukihiro Nakamura. 309
- FFT Mapping on MathStar s FPOATM FilterBuilderTM PlatformPius Ng, David Zhao. 310
- Timing Analysis of an Optically Differential Reconfigurable Gate Array for Dynamically Reconfigurable ProcessorsMinoru Watanabe, Fuminori Kobayashi. 311
- Enabling Cache Coherency for N-Way SMP Systems on Programmable ChipsAustin Hung, William D. Bishop, Andrew A. Kennings. 312
- Run-Time Adaptation of a Reconfigurable Mobile UMTS ReceiverLodewijk T. Smit, Gerard J. M. Smit, Johann Hurink. 313
- A Flexible Processor for Research PrototypingDavid Grant, William D. Bishop, Wayne M. Loucks. 314
- Target Arhcitecture Automation for Reconfigurable Logic BlocksMayur Srinivasan, Sethuraman Panchanathan. 315
- Energy Performance of Floating-Point Matrix Multiplication on FPGAsLing Zhuo, Viktor K. Prasanna. 316
- HARC: A Homogeneous Architecture reconfigurable ComputerM. David Yeager, Wei Wang. 317