Abstract is missing.
- Parallel copy motionFlorent Bouchez, Quentin Colombet, Alain Darte, Fabrice Rastello, Christophe Guillon. 1 [doi]
- B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systemsReiley Jeyapaul, Aviral Shrivastava. 2 [doi]
- Interval analysis of microcontroller code using abstract interpretation of hardware and softwareJörg Brauer, Thomas Noll, Bastian Schlich. 3 [doi]
- A compiler-based infrastructure for fault-tolerant co-designFelipe Restrepo-Calle, Antonio Martínez-Álvarez, Hipólito Guzmán-Miranda, Francisco R. Palomo, Miguel A. Aguirre, Sergio Cuenca-Asensi. 4 [doi]
- Workload characterization supporting the development of domain-specific compiler optimizations using decision trees for data miningDamon Fenacci, Björn Franke, John Thomson. 5 [doi]
- Modeling shared cache and bus in multi-cores for timing analysisSudipta Chattopadhyay, Abhik Roychoudhury, Tulika Mitra. 6 [doi]
- A higher-order extension for imperative synchronous languagesEric Vecchié, Jean-Pierre Talpin, Sébastien Boisgérault. 7 [doi]
- Supporting islands of coherency for highly-parallel embedded architectures using compile-time virtualisationIan Gray, Neil C. Audsley. 8 [doi]
- System level MPSoC design: a bright future for compiler technology?Rainer Leupers. 9 [doi]