Tushar Dhabal Das - researchr alias

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Viewing Publication 1 - 2 from 2

2018

A Novel Gating Approach to Alleviate Power and Ground Noise in Silicon ChipsAlak Majumder, Pritam Bhattacharjee, Tushar Dhabal Das. jcsc, 27(9):1-9, 2018. [doi]

2016

A 90 nm leakage control transistor based clock gating for low power flip flop applicationsPritam Bhattacharjee, Alak Majumder, Tushar Dhabal Das. mwscas 2016: 1-4 [doi]

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