V. N. Yarmolik - researchr alias

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Viewing Publication 1 - 12 from 12

2022

Synthesis of Test Sequences with a Given Switching ActivityV. N. Yarmolik, N. A. Shevchenko. aarc, 83(2):291-302, 2022. [doi]

2013

Generating modified Sobol sequences for multiple run march memory testsV. N. Yarmolik, S. V. Yarmolik. accs, 47(5):242-247, 2013. [doi]

2011

The synthesis of probability tests with a small number of kitsS. V. Yarmolik, V. N. Yarmolik. accs, 45(3):133-141, 2011. [doi]

2009

Nondestructive RAM testing based on multiple signature comparisonS. V. Yarmolik, V. N. Yarmolik. accs, 43(4):173-178, 2009. [doi]

2008

A new approach to the design of built-in internal memory self-testing devicesA. A. Ivanyuk, V. N. Yarmolik. accs, 42(4):169-174, 2008. [doi]

Determination of the optimal initial states for multiple-run RAM testingS. V. Yarmolik, A. N. Kurbatskii, V. N. Yarmolik. accs, 42(3):120-125, 2008. [doi]

2007

Injection of functional faults in VHDL-description of digital devicesA. A. Ivanyuk, V. N. Yarmolik. accs, 41(3):119-125, 2007. [doi]

2006

Designing cryptographic key generators with low power consumptionM. Puczko, V. N. Yarmolik. delta 2006: 418-421 [doi]

2005

Two-pattern test generation with low power consumption based on LFSRM. Puczko, V. N. Yarmolik. In Khalid Saeed 0001, Jerzy Pejas, editors, Information Processing and Security Systems. pages 159-166, Springer, 2005. [doi]

Cryptography and Steganography: teaching experienceBartosz Sokol, V. N. Yarmolik. In Jerzy Pejas, Andrzej Piegat, editors, Enhanced Methods in Computer Security, Biometric and Artificial Intelligence Systems. pages 83-92, Springer, 2005. [doi]

1996

RAM Testing Algorithm for Detection Linked Coupling FaultsV. G. Mikitjuk, V. N. Yarmolik, A. J. van de Goor. date 1996: 435-441 [doi]

1995

Pseudo-exhaustive word-oriented DRAM testingMark G. Karpovsky, A. J. van de Goor, V. N. Yarmolik. date 1995: 126-132 [doi]

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