Yih-Hsia Lin - researchr alias

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Viewing Publication 1 - 6 from 6

2023

FPGA Design of RISC-V MCU Collaborative Industrial Printer Control SystemMao-Hsu Yen, Tzu-Feng Lin, Cheng-Hao Tsou, Yan-Wei Yu, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao. ickii 2023: 142-146 [doi]

VLSI Implementation of RISC-V MCU with a variable stage pipelineMao-Hsu Yen, Cheng-Hao Tsou, Tzu-Feng Lin, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao. ickii 2023: 161-165 [doi]

2022

FPGA Implementation of ARM MCU with Five-stage PipelineChi-Lin Chiang, Mao-Hsu Yen, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku. ickii 2022: 55-59 [doi]

VLSI Implementation of RISC MCU with In-Circuit DebuggerMao-Hsu Yen, Cheng-Hao Tsou, Ssu-Chi Lin, Che-Wei Chang, Yih-Hsia Lin, Yuan-Fu Ku, Chi-Lin Chiang. ickii 2022: 63-68 [doi]

2014

VLSI Implementation of 8051 MCU with In-System ProgrammingMao-Hsu Yen, Yeong-Chang Maa, Yih-Hsia Lin, Chih-Chen Lai, Shu-Ping Zheng. intcompsymp 2015: 308-314 [doi]

2013

Hyper-Universal Switch Network for FPIC DesignMao-Hsu Yen, Chu Yu, Yih-Hsia Lin, Chang-Hsien Chung. cisis 2013: 456-460 [doi]

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