Journal: Computer Architecture Letters

Volume 21, Issue 2

33 -- 36Yongwon Shin, Juseong Park, Jeongmin Hong, Hyojin Sung. Runtime Support for Accelerating CNN Models on Digital DRAM Processing-in-Memory Hardware
37 -- 40Hoyong Jin, Donghun Jeong, Taewon Park, Jong Hwan Ko, Jungrae Kim. Multi-Prediction Compression: An Efficient and Scalable Memory Compression Framework for GP-GPU
41 -- 44Argyris Kokkinis, Dionysios Diamantopoulos, Kostas Siozios. Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms
45 -- 48Sungmin Yun, Byeongho Kim, Jaehyun Park, Hwayong Nam, Jung Ho Ahn, Eojin Lee. GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks
49 -- 52Rui Ma, Evangelos Georganas, Alexander Heinecke, Sergey Gribok, Andrew Boutros, Eriko Nurvitadhi. FPGA-Based AI Smart NICs for Scalable Distributed AI Training Systems
53 -- 56Fazal Hameed, Asif Ali Khan, Sébastien Ollivier, Alex K. Jones, Jerónimo Castrillón. DNA Pre-Alignment Filter Using Processing Near Racetrack Memory
57 -- 60Ling Yang, Libo Huang, Run Yan, Nong Xiao, Sheng Ma, Li Shen 0007, Weixia Xu. Stride Equality Prediction for Value Speculation
61 -- 64Jeongmin Hong, Sungjun Cho, Gwangsun Kim. Overcoming Memory Capacity Wall of GPUs With Heterogeneous Memory Stack
65 -- 68Luca Piccolboni, Davide Giri, Luca P. Carloni. Accelerators & Security: The Socket Approach
69 -- 72Mingyu Yan, Mo Zou, Xiaocheng Yang, Wenming Li, Xiaochun Ye, Dongrui Fan, Yuan Xie 0001. Characterizing and Understanding HGNNs on GPUs
73 -- 76Cecil Accetti, Rendong Ying, Peilin Liu. Structured Combinators for Efficient Graph Reduction
77 -- 80Yu Omori, Keiji Kimura. Open-Source Hardware Memory Protection Engine Integrated With NVMM Simulator
81 -- 84Minjae Kim, Bryan S. Kim, Eunji Lee, Sungjin Lee. A Case Study of a DRAM-NVM Hybrid Memory Allocator for Key-Value Stores
85 -- 88Zhengrong Wang, Christopher Liu, Tony Nowatzki. Infinity Stream: Enabling Transparent and Automated In-Memory Computing
89 -- 92Lingxi Wu, Rasool Sharifi, Ashish Venkat, Kevin Skadron. DRAM-CAM: General-Purpose Bit-Serial Exact Pattern Matching
93 -- 96Salonik Resch, Ulya R. Karpuzcu. On Variable Strength Quantum ECC
97 -- 100Peter Salvesen, Magnus Jahre. LMT: Accurate and Resource-Scalable Slowdown Prediction
101 -- 104Gyeongcheol Shin, Junsoo Kim, Joo-Young Kim 0001. OpenMDS: An Open-Source Shell Generation Framework for High-Performance Design on Xilinx Multi-Die FPGAs
105 -- 108Majid Jalili 0001, Mattan Erez. Managing Prefetchers With Deep Reinforcement Learning
109 -- 112Marzieh Lenjani, Alif Ahmed, Kevin Skadron. Pulley: An Algorithm/Hardware Co-Optimization for In-Memory Sorting
113 -- 116Yongye Zhu, Shijia Wei, Mohit Tiwari. Revisiting Browser Performance Benchmarking From an Architectural Perspective
117 -- 120Donghyun Gouk, Seungkwan Kang, Miryeong Kwon, Junhyeok Jang, Hyunkyu Choi, Sangwon Lee, Myoungsoo Jung. PreGNN: Hardware Acceleration to Take Preprocessing Off the Critical Path in Graph Neural Networks
121 -- 124Yinshen Wang, Wenming Li, Tianyu Liu, Liangjiang Zhou, Bingnan Wang, Zhihua Fan, Xiaochun Ye, Dongrui Fan, Chibiao Ding. Characterization and Implementation of Radar System Applications on a Reconfigurable Dataflow Architecture
125 -- 128Xiaofeng Hou, Cheng Xu, Jiacheng Liu 0001, Xuehan Tang, Lingyu Sun, Chao Li, Kwang-Ting Cheng. Characterizing and Understanding End-to-End Multi-Modal Neural Networks on GPUs
129 -- 132Jared Nye, Omer Khan. SSE: Security Service Engines to Accelerate Enclave Performance in Secure Multicore Processors
133 -- 136Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz. Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems
137 -- 140Lieven Eeckhout. A First-Order Model to Assess Computer Architecture Sustainability
141 -- 144Ranyang Zhou, Sepehr Tabrizchi, Arman Roohi, Shaahin Angizi. LT-PIM: An LUT-Based Processing-in-DRAM Architecture With RowHammer Self-Tracking
145 -- 148Jongwon Park, Jinkyu Jeong. Speculative Multi-Level Access in LSM Tree-Based KV Store
149 -- 152Marjan Fariborz, Mahyar Samani, Terry O'Neill, Jason Lowe-Power, S. J. Ben Yoo, Venkatesh Akella. A Model for Scalable and Balanced Accelerators for Graph Processing
153 -- 156Jianming Huang, Yu Hua. Ensuring Data Confidentiality in eADR-Based NVM Systems
157 -- 160Sejin Kim, Jungwoo Kim, Yongjoo Jang, Jaeha Kung, Sungjin Lee. SEMS: Scalable Embedding Memory System for Accelerating Embedding-Based DNNs

Volume 21, Issue 1

1 -- 4Xinfeng Xie, Peng Gu, Jiayi Huang 0001, Yufei Ding, Yuan Xie 0001. MPU-Sim: A Simulator for In-DRAM Near-Bank Processing Architectures
5 -- 8Mo Zou, Mingzhe Zhang, Rujia Wang, Xian-He Sun, Xiaochun Ye, Dongrui Fan, Zhimin Tang. Accelerating Graph Processing With Lightweight Learning-Based Data Reordering
9 -- 12Kristin Barber, Moein Ghaniyoun, Yinqian Zhang, Radu Teodorescu. A Pre-Silicon Approach to Discovering Microarchitectural Vulnerabilities in Security Critical Applications
13 -- 16Dusol Lee, Duwon Hong, Wonil Choi, Jihong Kim 0001. MQSim-E: An Enterprise SSD Simulator
17 -- 20Benjamin J. Lucas, Ali Alwan, Marion Murzello, Yazheng Tu, Pengzhou He, Andrew J. Schwartz, David Guevara, Ujjwal Guin, Kyle Juretus, Jiafeng Xie. Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator
21 -- 24Haiyang Lin, Mingyu Yan, Xiaocheng Yang, Mo Zou, Wenming Li, Xiaochun Ye, Dongrui Fan. Characterizing and Understanding Distributed GNN Training on GPUs
25 -- 28Hamin Jang, Taehun Kang, Joonsung Kim, Jaeyong Cho, Jae-Eon Jo, Seungwook Lee, Wooseok Chang, Jangwoo Kim, Hanhwi Jang. LSim: Fine-Grained Simulation Framework for Large-Scale Performance Evaluation
29 -- 32Hang Xiao, Haobo Xu, Ying Wang 0001, Yujie Wang, Yinhe Han. LINAC: A Spatially Linear Accelerator for Convolutional Neural Networks