33 | -- | 36 | Yongwon Shin, Juseong Park, Jeongmin Hong, Hyojin Sung. Runtime Support for Accelerating CNN Models on Digital DRAM Processing-in-Memory Hardware |
37 | -- | 40 | Hoyong Jin, Donghun Jeong, Taewon Park, Jong Hwan Ko, Jungrae Kim. Multi-Prediction Compression: An Efficient and Scalable Memory Compression Framework for GP-GPU |
41 | -- | 44 | Argyris Kokkinis, Dionysios Diamantopoulos, Kostas Siozios. Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms |
45 | -- | 48 | Sungmin Yun, Byeongho Kim, Jaehyun Park, Hwayong Nam, Jung Ho Ahn, Eojin Lee. GraNDe: Near-Data Processing Architecture With Adaptive Matrix Mapping for Graph Convolutional Networks |
49 | -- | 52 | Rui Ma, Evangelos Georganas, Alexander Heinecke, Sergey Gribok, Andrew Boutros, Eriko Nurvitadhi. FPGA-Based AI Smart NICs for Scalable Distributed AI Training Systems |
53 | -- | 56 | Fazal Hameed, Asif Ali Khan, Sébastien Ollivier, Alex K. Jones, Jerónimo Castrillón. DNA Pre-Alignment Filter Using Processing Near Racetrack Memory |
57 | -- | 60 | Ling Yang, Libo Huang, Run Yan, Nong Xiao, Sheng Ma, Li Shen 0007, Weixia Xu. Stride Equality Prediction for Value Speculation |
61 | -- | 64 | Jeongmin Hong, Sungjun Cho, Gwangsun Kim. Overcoming Memory Capacity Wall of GPUs With Heterogeneous Memory Stack |
65 | -- | 68 | Luca Piccolboni, Davide Giri, Luca P. Carloni. Accelerators & Security: The Socket Approach |
69 | -- | 72 | Mingyu Yan, Mo Zou, Xiaocheng Yang, Wenming Li, Xiaochun Ye, Dongrui Fan, Yuan Xie 0001. Characterizing and Understanding HGNNs on GPUs |
73 | -- | 76 | Cecil Accetti, Rendong Ying, Peilin Liu. Structured Combinators for Efficient Graph Reduction |
77 | -- | 80 | Yu Omori, Keiji Kimura. Open-Source Hardware Memory Protection Engine Integrated With NVMM Simulator |
81 | -- | 84 | Minjae Kim, Bryan S. Kim, Eunji Lee, Sungjin Lee. A Case Study of a DRAM-NVM Hybrid Memory Allocator for Key-Value Stores |
85 | -- | 88 | Zhengrong Wang, Christopher Liu, Tony Nowatzki. Infinity Stream: Enabling Transparent and Automated In-Memory Computing |
89 | -- | 92 | Lingxi Wu, Rasool Sharifi, Ashish Venkat, Kevin Skadron. DRAM-CAM: General-Purpose Bit-Serial Exact Pattern Matching |
93 | -- | 96 | Salonik Resch, Ulya R. Karpuzcu. On Variable Strength Quantum ECC |
97 | -- | 100 | Peter Salvesen, Magnus Jahre. LMT: Accurate and Resource-Scalable Slowdown Prediction |
101 | -- | 104 | Gyeongcheol Shin, Junsoo Kim, Joo-Young Kim 0001. OpenMDS: An Open-Source Shell Generation Framework for High-Performance Design on Xilinx Multi-Die FPGAs |
105 | -- | 108 | Majid Jalili 0001, Mattan Erez. Managing Prefetchers With Deep Reinforcement Learning |
109 | -- | 112 | Marzieh Lenjani, Alif Ahmed, Kevin Skadron. Pulley: An Algorithm/Hardware Co-Optimization for In-Memory Sorting |
113 | -- | 116 | Yongye Zhu, Shijia Wei, Mohit Tiwari. Revisiting Browser Performance Benchmarking From an Architectural Perspective |
117 | -- | 120 | Donghyun Gouk, Seungkwan Kang, Miryeong Kwon, Junhyeok Jang, Hyunkyu Choi, Sangwon Lee, Myoungsoo Jung. PreGNN: Hardware Acceleration to Take Preprocessing Off the Critical Path in Graph Neural Networks |
121 | -- | 124 | Yinshen Wang, Wenming Li, Tianyu Liu, Liangjiang Zhou, Bingnan Wang, Zhihua Fan, Xiaochun Ye, Dongrui Fan, Chibiao Ding. Characterization and Implementation of Radar System Applications on a Reconfigurable Dataflow Architecture |
125 | -- | 128 | Xiaofeng Hou, Cheng Xu, Jiacheng Liu 0001, Xuehan Tang, Lingyu Sun, Chao Li, Kwang-Ting Cheng. Characterizing and Understanding End-to-End Multi-Modal Neural Networks on GPUs |
129 | -- | 132 | Jared Nye, Omer Khan. SSE: Security Service Engines to Accelerate Enclave Performance in Secure Multicore Processors |
133 | -- | 136 | Gino A. Chacon, Charles Williams, Johann Knechtel, Ozgur Sinanoglu, Paul V. Gratz. Hardware Trojan Threats to Cache Coherence in Modern 2.5D Chiplet Systems |
137 | -- | 140 | Lieven Eeckhout. A First-Order Model to Assess Computer Architecture Sustainability |
141 | -- | 144 | Ranyang Zhou, Sepehr Tabrizchi, Arman Roohi, Shaahin Angizi. LT-PIM: An LUT-Based Processing-in-DRAM Architecture With RowHammer Self-Tracking |
145 | -- | 148 | Jongwon Park, Jinkyu Jeong. Speculative Multi-Level Access in LSM Tree-Based KV Store |
149 | -- | 152 | Marjan Fariborz, Mahyar Samani, Terry O'Neill, Jason Lowe-Power, S. J. Ben Yoo, Venkatesh Akella. A Model for Scalable and Balanced Accelerators for Graph Processing |
153 | -- | 156 | Jianming Huang, Yu Hua. Ensuring Data Confidentiality in eADR-Based NVM Systems |
157 | -- | 160 | Sejin Kim, Jungwoo Kim, Yongjoo Jang, Jaeha Kung, Sungjin Lee. SEMS: Scalable Embedding Memory System for Accelerating Embedding-Based DNNs |