Journal: Computer Architecture Letters

Volume 9, Issue 2

37 -- 44Kevin Skadron. Editorial: Letter from the Editor-in-Chief
45 -- 48Syed Muhammad Zeeshan Iqbal, Yuchen Liang, Håkan Grahn. ParMiBench - An Open-Source Benchmark for Embedded Multiprocessor Systems
49 -- 52Zhen Fang, Erik G. Hallnor, Bin Li, Mike Leddige, Seung Eun Lee, Donglai Dai, Srihari Makineni. Boomerang: Reducing Power Consumption of Response Packets in NoCs with Minimal Performance Impact
53 -- 56Michael J. Lyons, Mark Hempstead, Gu-Yeon Wei, David Brooks. The Accelerator Store framework for high-performance, low-power accelerator-based systems
57 -- 60Ran Manevich, Israel Cidon, Avinoam Kolodny, Isask har Walter. Centralized Adaptive Routing for NoCs
61 -- 64Meng Zhang, Alvin R. Lebeck, Daniel J. Sorin. Fractal Consistency: Architecting the Memory System to Facilitate Verification

Volume 9, Issue 1

1 -- 4Shruti R. Patil, David J. Lilja. Using Resampling Techniques to Compute Confidence Intervals for the Harmonic Mean of Rate-Based Performance Metrics
5 -- 8André Seznec. A Phase Change Memory as a Secure Main Memory
9 -- 12Seon-Yeong Park, Euiseong Seo, Ji-Yong Shin, Seungryoul Maeng, Joonwon Lee. Exploiting Internal Parallelism of Flash-based SSDs
13 -- 16Hari Subramoni, Fabrizio Petrini, Virat Agarwal, Davide Pasetto. Intra-Socket and Inter-Socket Communication in Multi-core Systems
17 -- 20Giang Hoang, Chang Bae, Jack Lange, Lide Zhang, Peter A. Dinda, Russ Joseph. A Case for Alternative Nested Paging Models for Virtualized Systems
21 -- 24Evgeni Krimer, R. Pawlowski, Mattan Erez, Patrick Chiang. Synctium: a Near-Threshold Stream Processor for Energy-Constrained Parallel Applications
25 -- 28Andrew D. Hilton, Amir Roth. SMT-Directory: Efficient Load-Load Ordering for SMT
29 -- 32Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem. A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors
33 -- 36HyungJun Kim, Paul V. Gratz. Leveraging Unused Cache Block Words to Reduce Power in CMP Interconnect