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    Journal: Embedded Systems Letters

    Volume 6, Issue 4

    65 -- 68Hamed Tabkhi, Robert Bushey, Gunar Schirner. Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs
    69 -- 72Meikang Qiu, Zhi Chen, Meiqin Liu. Low-Power Low-Latency Data Allocation for Hybrid Scratch-Pad Memory
    73 -- 76Fengbo Ren, Chenxin Zhang, Liang Liu, Wenyao Xu, Viktor Öwall, Dejan Markovic. A Square-Root-Free Matrix Decomposition Method for Energy-Efficient Least Square Computation on Embedded Systems
    77 -- 80Maurizio Martina, Carlo Condo, Guido Masera, Maurizio Zamboni. A Joint Source/Channel Approach to Strengthen Embedded Programmable Devices against Flash Memory Errors
    81 -- 84Jong Chul Lee, Jovan Vance, Roman Lysecky. Hardware-Based Event Stream Ordering for System-Level Observation Framework
    85 -- 88Prashant Agrawal, Dragomir Milojevic, Praveen Raghavan, Francky Catthoor, Liesbet Van der Perre, Eric Beyne, Ravi Varadarajan. System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform
    89 -- 92Mehran Mozaffari Kermani, Kai Tian, Reza Azarderakhsh, Siavash Bayat Sarmadi. Fault-Resilient Lightweight Cryptographic Block Ciphers for Secure Embedded Systems
    93 -- 96Akramul Azim, Sanjid Mahiba, Tarikul Alam Khan Sabbir, Shafayet Ahmad. Efficient Jammed Area Mapping in Wireless Sensor Networks

    Volume 6, Issue 3

    41 -- 44Kizheppatt Vipin, Suhaib A. Fahmy. ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq
    45 -- 48Nicolas Marques, Hassan Rabah, Eric Dabellani, Serge Weber. A Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores
    49 -- 52André C. Santos, João M. P. Cardoso, Pedro C. Diniz, Diogo R. Ferreira, Zlatko Petrov. Specifying Dynamic Adaptations for Embedded Applications Using a DSL
    53 -- 56Benjamin Carrión Schäfer, Anushree Mahapatra. S2CBench: Synthesizable SystemC Benchmark Suite for High-Level Synthesis
    57 -- 60Amrit Panda, Karam S. Chatha. An Embedded Architecture for Energy-Efficient Stream Computing
    61 -- 64Zhu Wang, Zonghua Gu, Zili Shao. Optimizated Allocation of Data Variables to PCM/DRAM-based Hybrid Main Memory for Real-Time Embedded Systems

    Volume 6, Issue 2

    17 -- 20Yijie Huangfu, Wei Zhang. PEG-C: Performance Enhancement Guaranteed Cache for Hard Real-Time Systems
    21 -- 24Arquimedes Canedo, Hartmut Ludwig, Mohammad Abdullah Al Faruque. High Communication Throughput and Low Scan Cycle Time with Multi/Many-Core Programmable Logic Controllers
    25 -- 28Frank Maker III, Rajeevan Amirtharajah, Venkatesh Akella. Runtime Adaptation of Applications Using Design Of Experiments: A Smartphone-Based Case Study
    29 -- 32Bertrand Le Gal, Christophe Jégo, Jérémie Crenne. A High Throughput Efficient Approach for Decoding LDPC Codes onto GPU Devices
    33 -- 36MyungSik Kim, Jinchul Shin, Youjip Won. Selective Segment Initialization: Exploiting NVRAM to Reduce Device Startup Latency
    37 -- 40Aydin Aysu, Ege Gulcan, Patrick Schaumont. SIMON Says: Break Area Records of Block Ciphers on FPGAs

    Volume 6, Issue 1

    2 -- 3Albert Mo Kim Cheng, Ramesh S. Guest Editorial: Special Issue on Rigorous Modeling and Analysis of Cyber-Physical Systems
    4 -- 7Sudhanshu Vyas, Chetan Kumar Ng, Joseph Zambreno, Christopher D. Gill, Ron Cytron, Phillip H. Jones. An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis
    8 -- 11Qingling Zhao, Zonghua Gu, Haibo Zeng. HLC-PCP: A Resource Synchronization Protocol for Certifiable Mixed Criticality Scheduling
    12 -- 15Yuanfan Yang, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan. Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis
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