- Vishwani D. Agrawal. Editorial. J. Electronic Testing, 42(1):1-2, February 2026.
- Tianyao Shi, Sining Chen, Haijin Chen. SRAM PUF Preselection Method Based on Neighboring Spatial Majority Voting. J. Electronic Testing, 42(1):117-128, February 2026.
- Yu Ou, Yongzhuang Wei, Changhai Ou, Enes Pasalic. PN-SCA: A High Generalization and Fast Profiled SCA Based on Prototypical Networks. J. Electronic Testing, 42(1):77-94, February 2026.
- Bijan Fadaeinia, Shahin Tajik, Amir Moradi 0001. Impedance Side-Channel Analysis of ASICs: An investigation of measurement factors. J. Electronic Testing, 42(1):57-75, February 2026.
- Azhaganantham Arulmurugan, Vivek Balasubramaniam. A Robust AES Implementation using FPGA with Enhanced Security Features. J. Electronic Testing, 42(1):3-14, February 2026.
- V. R. Rajasekar. Analysing the Energy and Power Consumption Impact of Selective Forwarding Attacks on 6LoWPANs: A Detailed Evaluation of MRHOF and OF0 Objective Functions. J. Electronic Testing, 42(1):15-36, February 2026.
- Cheng Tang, Lang Li 0002. Average Relative SNR: New Metric to Evaluate the Attack Performance of Non-Profiled Side-Channel Traces. J. Electronic Testing, 42(1):95-101, February 2026.
- Lei Zhang, Xuejun Liu, Dengyun Lei, Danpeng Liao, Yuan Liu 0022. PFSA: Pseudo Fault Sensitization Attack on Logic Locking via Key-invalidation. J. Electronic Testing, 42(1):103-116, February 2026.
- Md. Sadik Awal, Buddhipriya Gayanath, Md. Tauhidur Rahman 0001. Beyond Power Side Channels: Impedance as a Cryptographic Threat. J. Electronic Testing, 42(1):37-56, February 2026.
- Kiran Kumar Bhadavath, Vijayakumar Sajjan, Narsaiah Domala, Ashok Kumar Konduru, Sreedhar Jadapalli, Ramadevi Vemula. Correction: Enhancing Digital VLSI Circuit Debugging with Unified Neighbor aware Graph Neural Network Based Automated Error Detection. J. Electronic Testing, 42(1):129, February 2026.