Journal: Formal Methods in System Design

Volume 4, Issue 3

213 -- 242Andrew M. Bailey, George A. McCaskill, George J. Milne. An Exercise in the Automatic Verification of Asynchronous Designs
243 -- 263Alessandro Fantechi, Stefania Gnesi, Gioia Ristori, Michele Carenini, Massimo Vanocchi, Paolo Moreschini. Assisting Requirement Formalization by Means of Natural Language Translation
265 -- 310Victoria Stavridou. Gordon s Computer: A Hardware Verification Case Study in OBJ3

Volume 4, Issue 2

83 -- 97Cheryl Harkness, Elizabeth Wolf. Verifying the Summit Bus Converter Protocols with Symbolic Model Checking
99 -- 122Siegfried Fischer, Andreas Scholz. Verification in Process Algebra of the Distributed Control of Track Vehicles - A Case Study
123 -- 153Thomas F. La Porta, Mischa Schwartz. Verification of the MultiStream Potocol (MSP) Using COSPAN
155 -- 166W. M. H. M. Rovers. Description of a Design Management System for the P-ASIC Design Flow Using EXPDL
167 -- 185Bernard Plessier, Gary D. Hachtel, Fabio Somenzi. Extended BDDs: Trading off Canonicity for Structure in Verification Algorithms
187 -- 203Alessandro Fantechi, Stefania Gnesi, Gioia Ristori. Model Checking for Action-Based Logics

Volume 4, Issue 1

5 -- 31Diederik Verkest, Luc J. M. Claesen, Hugo De Man. A Proof of the Nonrestoring Division Algorithm and its Implementation on an ALU
33 -- 75Michael Kishinevsky, Alex Kondratyev, Alexander Taubin, Victor Varshavsky. Analysis and Identification of Speed-Independent Circuits on an Event Model