| 154 | -- | 164 | Sebastian Lange, Martin Middendorf. Multi task hyperreconfigurable architectures: models and reconfiguration problems |
| 165 | -- | 178 | Ali Ahmadinia, Christophe Bobda, Jürgen Teich. Online placement for dynamically reconfigurable devices |
| 179 | -- | 192 | Tyson S. Hall, Christopher M. Twigg, Paul E. Hasler, David V. Anderson. Developing large-scale field-programmable analog arrays for rapid prototyping |
| 193 | -- | 204 | Michael Ullmann, Michael Hübner, Jürgen Becker. On-demand FPGA run-time system for flexible and dynamical reconfiguration |
| 205 | -- | 217 | Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin. Symmetric encryption in reconfigurable and custom hardware |
| 218 | -- | 227 | Doris Ching, Patrick Schaumont, Ingrid Verbauwhede. Integrated modelling and generation of a reconfigurable network-on-chip |
| 228 | -- | 236 | Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo. Improving Java performance using dynamic method migration on FPGAs |
| 237 | -- | 249 | Nazar A. Saqib, Francisco Rodríguez-Henríquez, Arturo Díaz-Pérez. A reconfigurable processor for high speed point multiplication in elliptic curves |
| 250 | -- | 262 | Jing Huang, Mehdi Baradaran Tahoori, Fabrizio Lombardi. A probabilistic analysis of fault tolerance for switch block array in FPGAs |
| 263 | -- | 273 | Michael Hübner, Michael Ullmann, Jürgen Becker. Realtime configuration code decompression for dynamic FPGA self reconfiguration: evaluation and implementation |
| 274 | -- | 290 | Heiko Kalte, Boris Kettelhoit, Markus Köster, Mario Porrmann, Ulrich Rückert. A system approach for partially reconfigurable architectures |
| 291 | -- | 299 | Manish Handa, Ranga Vemuri. Hardware assisted two dimensional ultra fast online placement |