| 67 | -- | 76 | Jorge Tortato Junior, Roberto A. Hexsel. A minimalist cache coherent MPSoC designed for FPGAs |
| 77 | -- | 86 | Stefano Mor, Nicolas Maillard. Dynamic workload balancing deques for branch and bound algorithms in the message passing interface |
| 87 | -- | 97 | Alvaro Luiz Fazenda, Jairo Panetta, Daniel M. Katsurayama, Luiz Flavio Rodrigues, Luis F. G. Motta, Philippe Olivier Alexandre Navaux. Challenges and solutions to improve the scalability of an operational regional meteorological forecasting model |
| 98 | -- | 109 | Bruno Batista Boniati, Andrea Schwertner Charão, Benhur de Oliveira Stein, Gustavo Rissetti, Eduardo Kessler Piveta. Automated refactorings for high performance Fortran programmes |
| 110 | -- | 121 | Fernando Kronbauer, Sandro Rigo. Assessing the influence of data access patterns and contention management policies on the performance of software transactional memory systems |
| 122 | -- | 136 | Francieli Zanon Boito, Rodrigo Virote Kassick, Philippe Olivier Alexandre Navaux. The impact of applications' I/O strategies on the performance of the Lustre parallel file system |
| 137 | -- | 148 | Tiago A. O. Alves, Leandro A. J. Marzulo, Felipe M. G. França, Vítor Santos Costa. Trebuchet: exploring TLP with dataflow virtualisation |
| 149 | -- | 156 | Mahzad Azarmehr, Roberto Muscedere. A RISC architecture for 2DLNS-based signal processing |
| 157 | -- | 166 | Ling Wang, Chunda Ding, Shenghai Zhong, Jianwen Zhang. GNLS: a hybrid on-chip communication architecture for SoC designs |
| 167 | -- | 173 | Marcos Santana Farias, Nadia Nedjah, Luiza de Macedo Mourelle. A hardware architecture for subtractive clustering |