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| 196 | -- | 203 | Yavar Safaei Mehrabani, Zahra Zareei, Ahmad Khademzadeh. A high-speed and high-performance full adder cell based on 32-nm CNFET technology for low voltages |
| 204 | -- | 217 | Joyashree Bag, Rashmi Ranjan Sahoo, Pranab Kishore Dutta, Subir Kumar Sarkar. Design and VLSI implementation of power efficient processor for object localisation in large WSN |
| 218 | -- | 230 | Gayathri Ananthanarayanan, Geetika Malhotra, M. Balakrishnan, Smruti R. Sarangi. Amdahl's law in the era of process variation |
| 231 | -- | 241 | Shima Mehrabi, Reza Faghih Mirzaee, Sharareh Zamanzadeh, Keivan Navi, Omid Hashemipour. Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4 ≤ m ≤ 10) compressors |