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- Yuncheng Zhang, Kenichi Okada. Design of Synthesizable Digital Phase Locked Loops. IPSJ T. on System LSI Design Methodology, 17:44-54, 2024.
- Ryotaro Ohara, Atsushi Fukunaga, Masakazu Taichi, Masaya Kabuto, Riku Hamabe, Masato Ikegawa, Shintaro Izumi, Hiroshi Kawaguchi 0001. A Case Study for Improving Performances of Deep-Learning Processor with MRAM. IPSJ T. on System LSI Design Methodology, 17:7-15, 2024.
- Tadahiro Kuroda. Slashing IC Power and Democratizing IC Access for the Digital Age. IPSJ T. on System LSI Design Methodology, 17:2-6, 2024.
- Kensuke Iizuka, Kohei Ito, Ryota Yasudo, Hideharu Amano. Power Optimized Design Framework for FPGA Clusters. IPSJ T. on System LSI Design Methodology, 17:77-86, 2024.
- Hansen Wang, Dongju Li, Tsuyoshi Isshiki. A Low-Power Reconfigurable DNN Accelerator for Instruction-Extended RISC-V. IPSJ T. on System LSI Design Methodology, 17:55-66, 2024.
- Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi 0001, Mathieu Molongo, Makoto Minami, Katsuya Nishioka. Two-layer Bottleneck Channel Track Assignment for Analog VLSI. IPSJ T. on System LSI Design Methodology, 17:67-76, 2024.
- Takehiro Kitamura, Takashi Hisakado, Osami Wada, Mahfuzul Islam 0001. Design of Reference-free Flash ADC With On-chip Rank-based Comparator Selection Using Multiple Comparator Groups. IPSJ T. on System LSI Design Methodology, 17:36-43, 2024.
- Tohru Ishihara. Message from the Editor-in-Chief. IPSJ T. on System LSI Design Methodology, 17:1, 2024.
- Gaku Kataoka, Masahiro Yamamoto, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi. Feature Vectors Based on Wire Width and Distance for Lithography Hotspot Detection. IPSJ T. on System LSI Design Methodology, 16:2-11, 2023.