| 529 | -- | 541 | Shiyi Xu, Gercy P. Dias. The methodology of testability prediction for sequential circuits |
| 542 | -- | 550 | Naihong Wei, Shiyuan Yang, Shibai Tong. A neural network approach to fault diagnosis in analog circuits |
| 551 | -- | 561 | Yin Shi, Daozheng Wei. Accelerated techniques in stem fault simulation |
| 562 | -- | 569 | Zongfu Yan, Mingye Liu. The RTL binding and mapping approach of VHDL High-level synthesis system HLS/BIT |
| 570 | -- | 580 | Zhigang Zhu, Guangyou Xu. Neural networks for omni-view road image understanding |
| 581 | -- | 588 | Ke Chen, Weiquan Bao, Huisheng Chi. Speed up training of the recurrent neural network based on constrained optimization techniques |
| 589 | -- | 600 | Xianzhu Wang, Heng Liao, Sanli Li. DYNAMEM - A microarchitecture for improving memory disambiguation at run-time |
| 601 | -- | 606 | Yun Wang, Guanqun Gu, Jiyin Dui. Research on protocol migration |
| 607 | -- | 614 | Jian Liu, Zhiming Chen, Yanru Zhong, Zhong Du. Compact DC-DC converter for pocket micro-controller systems |
| 615 | -- | 621 | Jigui Sun, Xiaochun Cheng, Xuhua Liu. The global properties of valid formulas in modal logic K |