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    Journal: Journal of Systems Architecture

    Volume 36, Issue 5

    225 -- 241Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri. Delay insensitive micro-pipelined combinational logic
    243 -- 257Antonio González. A survey of branch techniques in pipelined processors
    259 -- 278Gordon B. Steven, Fleur L. Steven. ALU design and processor branch architecture

    Volume 36, Issue 4

    167 -- 178Mohammed Atiquzzaman. Performance modeling of multiprocessor systems for different data loading schemes
    179 -- 194Jaecheol Gong, Byeong Man Kim, Hyunsoo Yoon, Heungkyu Lee, Si-Yeong Hwang. An improved algorithm for protocol validation by extended circular exploration
    195 -- 204George Hassapis. High level Petri net modelling and analysis of VME-based multiprocessors
    205 -- 213Yen-Jen Oyang. Exploiting multi-way branches to boost superscalar processor performance
    215 -- 222Ruslan Raytchev. Global representation of local time measurements in transputer networks

    Volume 36, Issue 3

    109 -- 125Khoa D. Huynh, Taghi M. Khoshgoftaar, Gerald Marazas. A high-level performance analysis of the IBM subsystem control block (SCB) architecture
    127 -- 139F. Panetsos, J. Alonso, E. Barja, P. Isasi, V. Olmedo. NSL: A language for neural network simulation
    141 -- 162Anton M. van Wezenbeek, Willem Jan Withagen. A survey of memory management

    Volume 36, Issue 2

    55 -- 69Bandana Majumdar, N. Sankarayya, Arun K. Majumdar. An ASIC design for edge detection in real time
    71 -- 81Stavros D. Nikolopoulos, Roderick MacLeod. An experimental analysis of event set algorithms for discrete event simulation
    83 -- 92S. Selvakumar, C. Siva Ram Murthy. An efficient heuristic algorithm for mapping parallel programs onto multicomputers
    93 -- 104C. Siva Ram Murthy, K. N. Balasubramanya Murthy, A. Sreenivas. Scheduling of precedence-constrained parallel program tasks on multiprocessors

    Volume 36, Issue 1

    1 -- 7G. M. Chaudhry. On the bandwidth of asynchronous multiprocessors
    9 -- 25Martin S. Gilbert, Ramalingam Sridhar. AMEC - Asynchronous microprogram execution controller
    27 -- 41Behrooz Parhami. Architectural tradeoffs in the design of VLSI-based associative memories
    43 -- 48T. P. Troup, T. Donnelly, D. J. Mapps. Adaptive data interleaving using a microprocessor controlled reconfigurable gate array
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