Journal: TACO

Volume 4, Issue 4

0 -- 0Engin Ipek, Sally A. McKee, Karan Singh, Rich Caruana, Bronis R. de Supinski, Martin Schulz. Efficient architectural design space exploration via predictive modeling
0 -- 0Jun Yan, Wei Zhang. Exploiting virtual registers to reduce pressure on real registers
0 -- 0Amit Golander, Shlomo Weiss. Hiding the misprediction penalty of a resource-efficient high-performance processor
0 -- 0Zoe C. H. Yu, Francis C. M. Lau, Cho-Li Wang. Object co-location and memory reuse for Java programs
0 -- 0Yunhe Shi, Kevin Casey, M. Anton Ertl, David Gregg. Virtual machine showdown: Stack versus registers
0 -- 0Chuanjun Zhang. Reducing cache misses through programmable decoders

Volume 4, Issue 3

14 -- 0Xiaodong Li, Ritu Gupta, Sarita V. Adve, Yuanyuan Zhou. Cross-component energy management: Joint adaptation of processor and memory
15 -- 0Ron Gabor, Shlomo Weiss, Avi Mendelson. Fairness enforcement in switch on event multithreading
16 -- 0Diego Andrade, Basilio B. Fraguela, Ramon Doallo. Precise automatable analytical modeling of the cache behavior of codes with indirections
17 -- 0Kris Venstermans, Lieven Eeckhout, Koen De Bosschere. Java object header elimination for reduced memory consumption in 64-bit virtual machines
18 -- 0Shu Xiao, Edmund Ming-Kit Lai. VLIW instruction scheduling for minimal power variation
19 -- 0Sriraman Tallam, Rajiv Gupta. Unified control flow and data dependence traces

Volume 4, Issue 2

8 -- 0Fred A. Bower, Daniel J. Sorin, Sule Ozev. Online diagnosis of hard faults in microprocessors
9 -- 0Pierre Michaud, André Seznec, Damien Fetis, Yiannakis Sazeides, Theofanis Constantinou. A study of thread migration in temperature-constrained multicores
10 -- 0Yu Chen, Fuxin Zhang. Code reordering on limited branch offset
11 -- 0Andrei Terechko, Henk Corporaal. Inter-cluster communication in VLIW architectures
12 -- 0Jialin Dou, Marcelo H. Cintra. A compiler cost model for speculative parallelization
13 -- 0Wolfram Amme, Jeffery von Ronne, Michael Franz. SSA-based mobile code: Implementation and empirical evaluation

Volume 4, Issue 1

1 -- 0Brad Calder, Dean M. Tullsen. Introduction
2 -- 0Kypros Constantinides, Stephen Plaza, Jason A. Blome, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Bin Zhang, Michael Orshansky. Architecting a reliable CMP switch architecture
3 -- 0Ruchira Sasanka, Man-Lap Li, Sarita V. Adve, Yen-Kuang Chen, Eric Debes. ALP: Efficient support for all levels of parallelism for complex media applications
4 -- 0Yan Luo, Jia Yu, Jun Yang, Laxmi N. Bhuyan. Conserving network processor power consumption by exploiting traffic variability
5 -- 0Vassos Soteriou, Noel Eisley, Li-Shiuan Peh. Software-directed power-aware interconnection networks
6 -- 0Yuan-Shin Hwang, Jia-Jhe Li. Snug set-associative caches: Reducing leakage power of instruction and data caches with no performance penalties
7 -- 0Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao. Single-dimension software pipelining for multidimensional loops