1169 | -- | 1180 | Yuanyuan Yang, Gerald M. Masson. Broadcast Ring Sandwich Networks |
1181 | -- | 1193 | Wei-Kuo Liao, Chung-Ta King. Valved Routing: Efficient Flow Control for Adaptive Nonminimal Routing in Interconnection Networks |
1194 | -- | 1207 | Theodore Johnson. Characterizing the Performance of Algorithms for Lock-Free Objects |
1208 | -- | 1215 | Frank T. Hady, Bernard L. Menezes. The Performance of Crossbar-Based Binary Hypercubes |
1216 | -- | 1222 | Pierre Semal. Refinable Bounds for Large Markov Chains |
1223 | -- | 1235 | Rafael H. Saavedra, Alan Jay Smith. Measuring Cache and TLB Performance and Their Effect on Benchmark Runtimes |
1236 | -- | 1247 | Vincenzo Catania, Antonio Puliafito, Salvatore Riccobene, Lorenzo Vita. Design and Performance Analysis of a Disk Array System |
1248 | -- | 1251 | Priyalal Kulasinghe, Ahmed El-Amawy. On the Complexity of Optimal Bused Interconnections |
1251 | -- | 1256 | Mohamed Soufi, Yvon Savaria, F. Darlay, Bozena Kaminska. Producing Reliable Initialization and Test of Sequential Circuits with Pseudorandom Vectors |
1256 | -- | 1260 | K. M. Sammut, S. R. Jones. Arithmetic Unit Design for Neural Accelerators: Cost Performance Issues |
1260 | -- | 1264 | Dipanwita Roy Chowdhury, Idranil Sen Gupta, Parimal Pal Chaudhuri. A Low-Cost High-Capacity Associative Memory Design Using Cellular Automata |